blob: 81aa07c9025774e90e13eb07c54695682ba159e6 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marek Vasut05204f62015-12-05 21:07:23 +01002/*
3 * Altera SoCFPGA common board code
4 *
5 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
Marek Vasut05204f62015-12-05 21:07:23 +01006 */
7
8#include <common.h>
Tien Fong Cheea5bfce32017-12-05 15:58:07 +08009#include <asm/arch/clock_manager.h>
Tien Fong Cheef3f525c2017-12-05 15:58:08 +080010#include <asm/arch/misc.h>
Siew Chin Lim2492d592021-03-01 20:04:11 +080011#include <asm/arch/reset_manager.h>
12#include <asm/arch/secure_vab.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060013#include <asm/global_data.h>
Marek Vasut05204f62015-12-05 21:07:23 +010014#include <asm/io.h>
Siew Chin Lim2492d592021-03-01 20:04:11 +080015#include <errno.h>
16#include <fdtdec.h>
17#include <hang.h>
18#include <image.h>
19#include <init.h>
Chee Hong Ang7cfcc0c2020-12-24 18:20:56 +080020#include <log.h>
Marek Vasut05204f62015-12-05 21:07:23 +010021#include <usb.h>
22#include <usb/dwc2_udc.h>
23
24DECLARE_GLOBAL_DATA_PTR;
25
Marek Vasut72cc9582018-05-29 16:16:46 +020026void s_init(void) {
Ley Foon Tan27f05ac2018-07-12 19:13:34 +080027#ifndef CONFIG_ARM64
Marek Vasut72cc9582018-05-29 16:16:46 +020028 /*
Marek Vasut911a6652018-07-12 15:07:46 +020029 * Preconfigure ACTLR and CPACR, make sure Write Full Line of Zeroes
30 * is disabled in ACTLR.
Marek Vasut72cc9582018-05-29 16:16:46 +020031 * This is optional on CycloneV / ArriaV.
32 * This is mandatory on Arria10, otherwise Linux refuses to boot.
33 */
34 asm volatile(
35 "mcr p15, 0, %0, c1, c0, 1\n"
Marek Vasut911a6652018-07-12 15:07:46 +020036 "mcr p15, 0, %0, c1, c0, 2\n"
Marek Vasut72cc9582018-05-29 16:16:46 +020037 "isb\n"
38 "dsb\n"
39 ::"r"(0x0));
Ley Foon Tan27f05ac2018-07-12 19:13:34 +080040#endif
Marek Vasut72cc9582018-05-29 16:16:46 +020041}
Marek Vasut05204f62015-12-05 21:07:23 +010042
43/*
44 * Miscellaneous platform dependent initialisations
45 */
46int board_init(void)
47{
48 /* Address of boot parameters for ATAG (if ATAG is used) */
49 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
50
51 return 0;
52}
53
Tien Fong Chee3710de72017-12-05 15:58:01 +080054int dram_init_banksize(void)
55{
56 fdtdec_setup_memory_banksize();
57
58 return 0;
59}
60
Marek Vasut05204f62015-12-05 21:07:23 +010061#ifdef CONFIG_USB_GADGET
62struct dwc2_plat_otg_data socfpga_otg_data = {
63 .usb_gusbcfg = 0x1417,
64};
65
66int board_usb_init(int index, enum usb_init_type init)
67{
68 int node[2], count;
69 fdt_addr_t addr;
70
71 count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc",
72 COMPAT_ALTERA_SOCFPGA_DWC2USB,
73 node, 2);
74 if (count <= 0) /* No controller found. */
75 return 0;
76
77 addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg");
78 if (addr == FDT_ADDR_T_NONE) {
79 printf("UDC Controller has no 'reg' property!\n");
80 return -EINVAL;
81 }
82
83 /* Patch the address from OF into the controller pdata. */
84 socfpga_otg_data.regs_otg = addr;
85
86 return dwc2_udc_probe(&socfpga_otg_data);
87}
88
89int g_dnl_board_usb_cable_connected(void)
90{
91 return 1;
92}
93#endif
Chee Hong Ang7cfcc0c2020-12-24 18:20:56 +080094
95#ifdef CONFIG_SPL_BUILD
96__weak int board_fit_config_name_match(const char *name)
97{
98 /* Just empty function now - can't decide what to choose */
99 debug("%s: %s\n", __func__, name);
100
101 return 0;
102}
103#endif
Siew Chin Lim2492d592021-03-01 20:04:11 +0800104
105#if IS_ENABLED(CONFIG_FIT_IMAGE_POST_PROCESS)
106void board_fit_image_post_process(void **p_image, size_t *p_size)
107{
108 if (IS_ENABLED(CONFIG_SOCFPGA_SECURE_VAB_AUTH)) {
109 if (socfpga_vendor_authentication(p_image, p_size))
110 hang();
111 }
112}
113#endif
114
115#if !IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_FIT)
116void board_prep_linux(bootm_headers_t *images)
117{
118 if (!IS_ENABLED(CONFIG_SECURE_VAB_AUTH_ALLOW_NON_FIT_IMAGE)) {
119 /*
120 * Ensure the OS is always booted from FIT and with
121 * VAB signed certificate
122 */
123 if (!images->fit_uname_cfg) {
124 printf("Please use FIT with VAB signed images!\n");
125 hang();
126 }
127
128 env_set_hex("fdt_addr", (ulong)images->ft_addr);
129 debug("images->ft_addr = 0x%08lx\n", (ulong)images->ft_addr);
130 }
131
132 if (IS_ENABLED(CONFIG_CADENCE_QSPI)) {
133 if (env_get("linux_qspi_enable"))
134 run_command(env_get("linux_qspi_enable"), 0);
135 }
136}
137#endif