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git01.mediatek.com / filogic / uboot / b4b65ecba1a0fa4c0f22150737307a933a707b8b / . / arch / arm / mach-socfpga
tree: 31e45dcf2d0e0b2f50ed44eabd15f48dc190d45a [path history] [tgz]
  1. include/
  2. board.c
  3. clock_manager.c
  4. clock_manager_agilex.c
  5. clock_manager_arria10.c
  6. clock_manager_gen5.c
  7. clock_manager_s10.c
  8. firewall.c
  9. fpga_manager.c
  10. freeze_controller.c
  11. Kconfig
  12. lowlevel_init_soc64.S
  13. mailbox_s10.c
  14. Makefile
  15. misc.c
  16. misc_arria10.c
  17. misc_gen5.c
  18. misc_s10.c
  19. mmu-arm64_s10.c
  20. pinmux_arria10.c
  21. qts-filter-a10.sh
  22. qts-filter.sh
  23. reset_manager_arria10.c
  24. reset_manager_gen5.c
  25. reset_manager_s10.c
  26. scan_manager.c
  27. secure_reg_helper.c
  28. secure_vab.c
  29. smc_api.c
  30. spl_a10.c
  31. spl_agilex.c
  32. spl_gen5.c
  33. spl_s10.c
  34. system_manager_gen5.c
  35. system_manager_s10.c
  36. timer.c
  37. timer_s10.c
  38. vab.c
  39. wrap_iocsr_config.c
  40. wrap_pinmux_config.c
  41. wrap_pinmux_config_s10.c
  42. wrap_pll_config.c
  43. wrap_pll_config_s10.c
  44. wrap_sdram_config.c