Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ |
| 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include "k3-j7200-som-p0.dtsi" |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 9 | #include <dt-bindings/gpio/gpio.h> |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 10 | #include <dt-bindings/net/ti-dp83867.h> |
| 11 | #include <dt-bindings/mux/ti-serdes.h> |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 12 | |
| 13 | / { |
| 14 | chosen { |
| 15 | stdout-path = "serial2:115200n8"; |
| 16 | bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; |
| 17 | }; |
Suman Anna | e683316 | 2020-08-17 18:15:10 -0500 | [diff] [blame] | 18 | |
| 19 | aliases { |
| 20 | remoteproc0 = &mcu_r5fss0_core0; |
| 21 | remoteproc1 = &mcu_r5fss0_core1; |
Suman Anna | fff422d | 2020-08-17 18:15:11 -0500 | [diff] [blame] | 22 | remoteproc2 = &main_r5fss0_core0; |
| 23 | remoteproc3 = &main_r5fss0_core1; |
Suman Anna | e683316 | 2020-08-17 18:15:10 -0500 | [diff] [blame] | 24 | }; |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 25 | |
| 26 | vdd_mmc1: fixedregulator-sd { |
| 27 | compatible = "regulator-fixed"; |
| 28 | regulator-name = "vdd_mmc1"; |
| 29 | regulator-min-microvolt = <3300000>; |
| 30 | regulator-max-microvolt = <3300000>; |
| 31 | regulator-boot-on; |
| 32 | enable-active-high; |
| 33 | gpio = <&exp2 2 GPIO_ACTIVE_HIGH>; |
| 34 | }; |
| 35 | |
| 36 | vdd_sd_dv: gpio-regulator-vdd-sd-dv { |
| 37 | compatible = "regulator-gpio"; |
| 38 | regulator-name = "vdd_sd_dv"; |
| 39 | pinctrl-names = "default"; |
| 40 | pinctrl-0 = <&vdd_sd_dv_pins_default>; |
| 41 | regulator-min-microvolt = <1800000>; |
| 42 | regulator-max-microvolt = <3300000>; |
| 43 | regulator-boot-on; |
| 44 | gpios = <&main_gpio0 55 GPIO_ACTIVE_HIGH>; |
| 45 | states = <1800000 0x0 |
| 46 | 3300000 0x1>; |
| 47 | }; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 48 | }; |
| 49 | |
| 50 | &wkup_pmx0 { |
| 51 | wkup_i2c0_pins_default: wkup-i2c0-pins-default { |
| 52 | pinctrl-single,pins = < |
| 53 | J721E_WKUP_IOPAD(0x100, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */ |
| 54 | J721E_WKUP_IOPAD(0x104, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */ |
| 55 | >; |
| 56 | }; |
Vignesh Raghavendra | 2fae722 | 2020-08-07 00:26:58 +0530 | [diff] [blame] | 57 | |
| 58 | wkup_gpio_pins_default: wkup-gpio-pins-default { |
| 59 | pinctrl-single,pins = < |
| 60 | J721E_WKUP_IOPAD(0xd8, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */ |
| 61 | >; |
| 62 | }; |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 63 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 64 | mcu_cpsw_pins_default: mcu-cpsw-pins-default { |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 65 | pinctrl-single,pins = < |
| 66 | J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */ |
| 67 | J721E_WKUP_IOPAD(0x006c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */ |
| 68 | J721E_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */ |
| 69 | J721E_WKUP_IOPAD(0x0074, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */ |
| 70 | J721E_WKUP_IOPAD(0x0078, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */ |
| 71 | J721E_WKUP_IOPAD(0x007c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */ |
| 72 | J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */ |
| 73 | J721E_WKUP_IOPAD(0x008c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */ |
| 74 | J721E_WKUP_IOPAD(0x0090, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */ |
| 75 | J721E_WKUP_IOPAD(0x0094, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */ |
| 76 | J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_TXC */ |
| 77 | J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RXC */ |
| 78 | >; |
| 79 | }; |
| 80 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 81 | mcu_mdio_pins_default: mcu-mdio1-pins-default { |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 82 | pinctrl-single,pins = < |
| 83 | J721E_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */ |
| 84 | J721E_WKUP_IOPAD(0x0098, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ |
| 85 | >; |
| 86 | }; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 87 | }; |
| 88 | |
| 89 | &main_pmx0 { |
| 90 | main_i2c0_pins_default: main-i2c0-pins-default { |
| 91 | pinctrl-single,pins = < |
| 92 | J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ |
| 93 | J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ |
| 94 | >; |
| 95 | }; |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 96 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 97 | main_i2c1_pins_default: main-i2c1-pins-default { |
| 98 | pinctrl-single,pins = < |
| 99 | J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */ |
| 100 | J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */ |
| 101 | >; |
| 102 | }; |
| 103 | |
| 104 | main_mmc1_pins_default: main-mmc1-pins-default { |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 105 | pinctrl-single,pins = < |
| 106 | J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */ |
| 107 | J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */ |
| 108 | J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */ |
| 109 | J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */ |
| 110 | J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */ |
| 111 | J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */ |
| 112 | J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */ |
| 113 | J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */ |
| 114 | >; |
| 115 | }; |
| 116 | |
| 117 | vdd_sd_dv_pins_default: vdd_sd_dv_pins_default { |
| 118 | pinctrl-single,pins = < |
| 119 | J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */ |
| 120 | >; |
| 121 | }; |
| 122 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 123 | main_usbss0_pins_default: main-usbss0-pins-default { |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 124 | pinctrl-single,pins = < |
| 125 | J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */ |
| 126 | >; |
| 127 | }; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 128 | }; |
| 129 | |
| 130 | &wkup_uart0 { |
| 131 | /* Wakeup UART is used by System firmware */ |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 132 | status = "reserved"; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 133 | }; |
| 134 | |
| 135 | &main_uart0 { |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 136 | /* Shared with ATF on this platform */ |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 137 | power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; |
| 138 | }; |
| 139 | |
| 140 | &main_uart2 { |
| 141 | /* MAIN UART 2 is used by R5F firmware */ |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 142 | status = "reserved"; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 143 | }; |
| 144 | |
| 145 | &main_uart3 { |
| 146 | /* UART not brought out */ |
| 147 | status = "disabled"; |
| 148 | }; |
| 149 | |
| 150 | &main_uart4 { |
| 151 | /* UART not brought out */ |
| 152 | status = "disabled"; |
| 153 | }; |
| 154 | |
| 155 | &main_uart5 { |
| 156 | /* UART not brought out */ |
| 157 | status = "disabled"; |
| 158 | }; |
| 159 | |
| 160 | &main_uart6 { |
| 161 | /* UART not brought out */ |
| 162 | status = "disabled"; |
| 163 | }; |
| 164 | |
| 165 | &main_uart7 { |
| 166 | /* UART not brought out */ |
| 167 | status = "disabled"; |
| 168 | }; |
| 169 | |
| 170 | &main_uart8 { |
| 171 | /* UART not brought out */ |
| 172 | status = "disabled"; |
| 173 | }; |
| 174 | |
| 175 | &main_uart9 { |
| 176 | /* UART not brought out */ |
| 177 | status = "disabled"; |
| 178 | }; |
| 179 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 180 | &mcu_cpsw { |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 181 | pinctrl-names = "default"; |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 182 | pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 183 | }; |
| 184 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 185 | &davinci_mdio { |
| 186 | phy0: ethernet-phy@0 { |
| 187 | reg = <0>; |
| 188 | ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; |
| 189 | ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; |
| 190 | }; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 191 | }; |
| 192 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 193 | &cpsw_port1 { |
| 194 | phy-mode = "rgmii-rxid"; |
| 195 | phy-handle = <&phy0>; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 196 | }; |
| 197 | |
| 198 | &main_i2c0 { |
| 199 | pinctrl-names = "default"; |
| 200 | pinctrl-0 = <&main_i2c0_pins_default>; |
| 201 | clock-frequency = <400000>; |
| 202 | |
| 203 | exp1: gpio@20 { |
| 204 | compatible = "ti,tca6416"; |
| 205 | reg = <0x20>; |
| 206 | gpio-controller; |
| 207 | #gpio-cells = <2>; |
| 208 | }; |
| 209 | |
| 210 | exp2: gpio@22 { |
| 211 | compatible = "ti,tca6424"; |
| 212 | reg = <0x22>; |
| 213 | gpio-controller; |
| 214 | #gpio-cells = <2>; |
| 215 | }; |
| 216 | }; |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 217 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 218 | /* |
| 219 | * The j7200 CPB board is identical to the CPB used for J721E, the SOMs can be |
| 220 | * swapped on the CPB. |
| 221 | * |
| 222 | * main_i2c1 of J7200 is connected to the CPB i2c bus labeled as i2c3. |
| 223 | * The i2c1 of the CPB (as it is labeled) is not connected to j7200. |
| 224 | */ |
| 225 | &main_i2c1 { |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 226 | pinctrl-names = "default"; |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 227 | pinctrl-0 = <&main_i2c1_pins_default>; |
| 228 | clock-frequency = <400000>; |
| 229 | |
| 230 | exp3: gpio@20 { |
| 231 | compatible = "ti,tca6408"; |
| 232 | reg = <0x20>; |
| 233 | gpio-controller; |
| 234 | #gpio-cells = <2>; |
| 235 | gpio-line-names = "CODEC_RSTz", "CODEC_SPARE1", "UB926_RESETn", |
| 236 | "UB926_LOCK", "UB926_PWR_SW_CNTRL", |
| 237 | "UB926_TUNER_RESET", "UB926_GPIO_SPARE", ""; |
| 238 | }; |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 239 | }; |
| 240 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 241 | &main_sdhci0 { |
| 242 | /* eMMC */ |
| 243 | non-removable; |
| 244 | ti,driver-strength-ohm = <50>; |
| 245 | disable-wp; |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 246 | }; |
Vignesh Raghavendra | 2fae722 | 2020-08-07 00:26:58 +0530 | [diff] [blame] | 247 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 248 | &main_sdhci1 { |
| 249 | /* SD card */ |
| 250 | pinctrl-0 = <&main_mmc1_pins_default>; |
Vignesh Raghavendra | 2fae722 | 2020-08-07 00:26:58 +0530 | [diff] [blame] | 251 | pinctrl-names = "default"; |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 252 | vmmc-supply = <&vdd_mmc1>; |
| 253 | vqmmc-supply = <&vdd_sd_dv>; |
| 254 | ti,driver-strength-ohm = <50>; |
| 255 | disable-wp; |
Vignesh Raghavendra | 2fae722 | 2020-08-07 00:26:58 +0530 | [diff] [blame] | 256 | }; |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 257 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 258 | &serdes_ln_ctrl { |
| 259 | idle-states = <J7200_SERDES0_LANE0_PCIE1_LANE0>, <J7200_SERDES0_LANE1_PCIE1_LANE1>, |
| 260 | <J7200_SERDES0_LANE2_QSGMII_LANE1>, <J7200_SERDES0_LANE3_IP4_UNUSED>; |
| 261 | }; |
| 262 | |
| 263 | &usb_serdes_mux { |
| 264 | idle-states = <1>; /* USB0 to SERDES lane 3 */ |
| 265 | }; |
| 266 | |
| 267 | &usbss0 { |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 268 | pinctrl-names = "default"; |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 269 | pinctrl-0 = <&main_usbss0_pins_default>; |
| 270 | ti,vbus-divider; |
| 271 | ti,usb2-only; |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 272 | }; |
| 273 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 274 | &usb0 { |
| 275 | dr_mode = "otg"; |
| 276 | maximum-speed = "high-speed"; |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 277 | }; |
| 278 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 279 | &tscadc0 { |
| 280 | adc { |
| 281 | ti,adc-channels = <0 1 2 3 4 5 6 7>; |
| 282 | }; |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 283 | }; |