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git01.mediatek.com / filogic / uboot / b468b158c61b3710252408e603be519793139bb2 / . / arch / arm / dts / rk3588-evb1-v10.dts
blob: ac7c677b0fb9c3d6af9e7b8bcd399d9d24ef0b84 [file] [log] [blame]
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame]10#include <dt-bindings/input/input.h>
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]11#include <dt-bindings/pinctrl/rockchip.h>
12#include "rk3588.dtsi"
13
14/ {
15 model = "Rockchip RK3588 EVB1 V10 Board";
16 compatible = "rockchip,rk3588-evb1-v10", "rockchip,rk3588";
17
18 aliases {
Jonas Karlmanb468b152024-01-26 22:14:53 +0000[diff] [blame^]19 ethernet0 = &gmac0;
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]20 mmc0 = &sdhci;
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]21 };
22
23 chosen {
24 stdout-path = "serial2:1500000n8";
25 };
26
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame]27 adc-keys {
28 compatible = "adc-keys";
29 io-channels = <&saradc 1>;
30 io-channel-names = "buttons";
31 keyup-threshold-microvolt = <1800000>;
32 poll-interval = <100>;
33
34 button-vol-up {
35 label = "Volume Up";
36 linux,code = <KEY_VOLUMEUP>;
37 press-threshold-microvolt = <17000>;
38 };
39
40 button-vol-down {
41 label = "Volume Down";
42 linux,code = <KEY_VOLUMEDOWN>;
43 press-threshold-microvolt = <417000>;
44 };
45
46 button-menu {
47 label = "Menu";
48 linux,code = <KEY_MENU>;
49 press-threshold-microvolt = <890000>;
50 };
51
52 button-escape {
53 label = "Escape";
54 linux,code = <KEY_ESC>;
55 press-threshold-microvolt = <1235000>;
56 };
57 };
58
Jonas Karlmanb468b152024-01-26 22:14:53 +0000[diff] [blame^]59 analog-sound {
60 compatible = "simple-audio-card";
61 pinctrl-names = "default";
62 pinctrl-0 = <&hp_detect>;
63 simple-audio-card,name = "RK3588 EVB1 Audio";
64 simple-audio-card,aux-devs = <&amp_headphone>, <&amp_speaker>;
65 simple-audio-card,bitclock-master = <&masterdai>;
66 simple-audio-card,format = "i2s";
67 simple-audio-card,frame-master = <&masterdai>;
68 simple-audio-card,hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
69 simple-audio-card,mclk-fs = <256>;
70 simple-audio-card,pin-switches = "Headphones", "Speaker";
71 simple-audio-card,routing =
72 "Speaker Amplifier INL", "LOUT2",
73 "Speaker Amplifier INR", "ROUT2",
74 "Speaker", "Speaker Amplifier OUTL",
75 "Speaker", "Speaker Amplifier OUTR",
76 "Headphones Amplifier INL", "LOUT1",
77 "Headphones Amplifier INR", "ROUT1",
78 "Headphones", "Headphones Amplifier OUTL",
79 "Headphones", "Headphones Amplifier OUTR",
80 "LINPUT1", "Onboard Microphone",
81 "RINPUT1", "Onboard Microphone",
82 "LINPUT2", "Microphone Jack",
83 "RINPUT2", "Microphone Jack";
84 simple-audio-card,widgets =
85 "Microphone", "Microphone Jack",
86 "Microphone", "Onboard Microphone",
87 "Headphone", "Headphones",
88 "Speaker", "Speaker";
89
90 simple-audio-card,cpu {
91 sound-dai = <&i2s0_8ch>;
92 };
93
94 masterdai: simple-audio-card,codec {
95 sound-dai = <&es8388>;
96 system-clock-frequency = <12288000>;
97 };
98 };
99
100 amp_headphone: headphone-amplifier {
101 compatible = "simple-audio-amplifier";
102 enable-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
103 pinctrl-names = "default";
104 pinctrl-0 = <&headphone_amplifier_en>;
105 sound-name-prefix = "Headphones Amplifier";
106 };
107
108 amp_speaker: speaker-amplifier {
109 compatible = "simple-audio-amplifier";
110 enable-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&speaker_amplifier_en>;
113 sound-name-prefix = "Speaker Amplifier";
114 };
115
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]116 backlight: backlight {
117 compatible = "pwm-backlight";
118 power-supply = <&vcc12v_dcin>;
119 pwms = <&pwm2 0 25000 0>;
120 };
121
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame]122 pcie20_avdd0v85: pcie20-avdd0v85-regulator {
123 compatible = "regulator-fixed";
124 regulator-name = "pcie20_avdd0v85";
125 regulator-always-on;
126 regulator-boot-on;
127 regulator-min-microvolt = <850000>;
128 regulator-max-microvolt = <850000>;
129 vin-supply = <&avdd_0v85_s0>;
130 };
131
132 pcie20_avdd1v8: pcie20-avdd1v8-regulator {
133 compatible = "regulator-fixed";
134 regulator-name = "pcie20_avdd1v8";
135 regulator-always-on;
136 regulator-boot-on;
137 regulator-min-microvolt = <1800000>;
138 regulator-max-microvolt = <1800000>;
139 vin-supply = <&avcc_1v8_s0>;
140 };
141
142 pcie30_avdd0v75: pcie30-avdd0v75-regulator {
143 compatible = "regulator-fixed";
144 regulator-name = "pcie30_avdd0v75";
145 regulator-always-on;
146 regulator-boot-on;
147 regulator-min-microvolt = <750000>;
148 regulator-max-microvolt = <750000>;
149 vin-supply = <&avdd_0v75_s0>;
150 };
151
152 pcie30_avdd1v8: pcie30-avdd1v8-regulator {
153 compatible = "regulator-fixed";
154 regulator-name = "pcie30_avdd1v8";
155 regulator-always-on;
156 regulator-boot-on;
157 regulator-min-microvolt = <1800000>;
158 regulator-max-microvolt = <1800000>;
159 vin-supply = <&avcc_1v8_s0>;
160 };
161
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]162 vcc12v_dcin: vcc12v-dcin-regulator {
163 compatible = "regulator-fixed";
164 regulator-name = "vcc12v_dcin";
165 regulator-always-on;
166 regulator-boot-on;
167 regulator-min-microvolt = <12000000>;
168 regulator-max-microvolt = <12000000>;
169 };
170
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame]171 vcc3v3_pcie30: vcc3v3-pcie30-regulator {
172 compatible = "regulator-fixed";
173 regulator-name = "vcc3v3_pcie30";
174 regulator-min-microvolt = <3300000>;
175 regulator-max-microvolt = <3300000>;
176 enable-active-high;
177 gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
178 startup-delay-us = <5000>;
179 vin-supply = <&vcc12v_dcin>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&vcc3v3_pcie30_en>;
182 };
183
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]184 vcc5v0_host: vcc5v0-host-regulator {
185 compatible = "regulator-fixed";
186 regulator-name = "vcc5v0_host";
187 regulator-boot-on;
188 regulator-always-on;
189 regulator-min-microvolt = <5000000>;
190 regulator-max-microvolt = <5000000>;
191 enable-active-high;
192 gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
193 pinctrl-names = "default";
194 pinctrl-0 = <&vcc5v0_host_en>;
195 vin-supply = <&vcc5v0_usb>;
196 };
197
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]198 vcc5v0_sys: vcc5v0-sys-regulator {
199 compatible = "regulator-fixed";
200 regulator-name = "vcc5v0_sys";
201 regulator-always-on;
202 regulator-boot-on;
203 regulator-min-microvolt = <5000000>;
204 regulator-max-microvolt = <5000000>;
205 vin-supply = <&vcc12v_dcin>;
206 };
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]207
208 vcc5v0_usbdcin: vcc5v0-usbdcin-regulator {
209 compatible = "regulator-fixed";
210 regulator-name = "vcc5v0_usbdcin";
211 regulator-always-on;
212 regulator-boot-on;
213 regulator-min-microvolt = <5000000>;
214 regulator-max-microvolt = <5000000>;
215 vin-supply = <&vcc12v_dcin>;
216 };
217
218 vcc5v0_usb: vcc5v0-usb-regulator {
219 compatible = "regulator-fixed";
220 regulator-name = "vcc5v0_usb";
221 regulator-always-on;
222 regulator-boot-on;
223 regulator-min-microvolt = <5000000>;
224 regulator-max-microvolt = <5000000>;
225 vin-supply = <&vcc5v0_usbdcin>;
226 };
227};
228
229&combphy0_ps {
230 status = "okay";
231};
232
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame]233&combphy2_psu {
234 status = "okay";
235};
236
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]237&cpu_b0 {
238 cpu-supply = <&vdd_cpu_big0_s0>;
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]239};
240
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]241&cpu_b1 {
242 cpu-supply = <&vdd_cpu_big0_s0>;
243};
244
245&cpu_b2 {
246 cpu-supply = <&vdd_cpu_big1_s0>;
247};
248
249&cpu_b3 {
250 cpu-supply = <&vdd_cpu_big1_s0>;
251};
252
253&cpu_l0 {
254 cpu-supply = <&vdd_cpu_lit_s0>;
255};
256
257&cpu_l1 {
258 cpu-supply = <&vdd_cpu_lit_s0>;
259};
260
261&cpu_l2 {
262 cpu-supply = <&vdd_cpu_lit_s0>;
263};
264
265&cpu_l3 {
266 cpu-supply = <&vdd_cpu_lit_s0>;
267};
268
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]269&gmac0 {
270 clock_in_out = "output";
271 phy-handle = <&rgmii_phy>;
272 phy-mode = "rgmii-rxid";
273 pinctrl-0 = <&gmac0_miim
274 &gmac0_tx_bus2
275 &gmac0_rx_bus2
276 &gmac0_rgmii_clk
277 &gmac0_rgmii_bus>;
278 pinctrl-names = "default";
279 rx_delay = <0x00>;
280 tx_delay = <0x43>;
281 status = "okay";
282};
283
284&i2c2 {
285 status = "okay";
286
287 hym8563: rtc@51 {
288 compatible = "haoyu,hym8563";
289 reg = <0x51>;
290 #clock-cells = <0>;
291 clock-output-names = "hym8563";
292 pinctrl-names = "default";
293 pinctrl-0 = <&hym8563_int>;
294 interrupt-parent = <&gpio0>;
295 interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>;
296 wakeup-source;
297 };
298};
299
Jonas Karlmanb468b152024-01-26 22:14:53 +0000[diff] [blame^]300&i2c7 {
301 status = "okay";
302
303 es8388: audio-codec@11 {
304 compatible = "everest,es8388";
305 reg = <0x11>;
306 clocks = <&cru I2S0_8CH_MCLKOUT>;
307 assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
308 assigned-clock-rates = <12288000>;
309 AVDD-supply = <&avcc_1v8_codec_s0>;
310 DVDD-supply = <&avcc_1v8_codec_s0>;
311 HPVDD-supply = <&vcc_3v3_s0>;
312 PVDD-supply = <&vcc_3v3_s0>;
313 #sound-dai-cells = <0>;
314 };
315};
316
317&i2s0_8ch {
318 pinctrl-0 = <&i2s0_lrck
319 &i2s0_mclk
320 &i2s0_sclk
321 &i2s0_sdi0
322 &i2s0_sdo0>;
323 status = "okay";
324};
325
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]326&mdio0 {
327 rgmii_phy: ethernet-phy@1 {
328 /* RTL8211F */
329 compatible = "ethernet-phy-id001c.c916";
330 reg = <0x1>;
331 pinctrl-names = "default";
332 pinctrl-0 = <&rtl8211f_rst>;
333 reset-assert-us = <20000>;
334 reset-deassert-us = <100000>;
335 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
336 };
337};
338
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame]339&pcie2x1l1 {
340 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
341 pinctrl-names = "default";
342 pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>;
343 status = "okay";
344};
345
346&pcie30phy {
347 status = "okay";
348};
349
350&pcie3x4 {
351 pinctrl-names = "default";
352 pinctrl-0 = <&pcie3_reset>;
353 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
354 vpcie3v3-supply = <&vcc3v3_pcie30>;
355 status = "okay";
356};
357
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]358&pinctrl {
Jonas Karlmanb468b152024-01-26 22:14:53 +0000[diff] [blame^]359 audio {
360 hp_detect: headphone-detect {
361 rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
362 };
363
364 headphone_amplifier_en: headphone-amplifier-en {
365 rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
366 };
367
368 speaker_amplifier_en: speaker-amplifier-en {
369 rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
370 };
371 };
372
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame]373 rtl8111 {
374 rtl8111_isolate: rtl8111-isolate {
375 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
376 };
377 };
378
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]379 rtl8211f {
380 rtl8211f_rst: rtl8211f-rst {
381 rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
382 };
383
384 };
385
386 hym8563 {
387 hym8563_int: hym8563-int {
388 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
389 };
390 };
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]391
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame]392 pcie2 {
393 pcie2_1_rst: pcie2-1-rst {
394 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
395 };
396 };
397
398 pcie3 {
399 pcie3_reset: pcie3-reset {
400 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
401 };
402
403 vcc3v3_pcie30_en: vcc3v3-pcie30-en {
404 rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
405 };
406 };
407
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]408 usb {
409 vcc5v0_host_en: vcc5v0-host-en {
410 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
411 };
412 };
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]413};
414
415&pwm2 {
416 status = "okay";
417};
418
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame]419&saradc {
420 vref-supply = <&vcc_1v8_s0>;
421 status = "okay";
422};
423
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]424&sdhci {
425 bus-width = <8>;
426 no-sdio;
427 no-sd;
428 non-removable;
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]429 mmc-hs400-1_8v;
430 mmc-hs400-enhanced-strobe;
431 status = "okay";
432};
433
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]434&spi2 {
435 status = "okay";
436 assigned-clocks = <&cru CLK_SPI2>;
437 assigned-clock-rates = <200000000>;
438 num-cs = <2>;
439
440 pmic@0 {
441 compatible = "rockchip,rk806";
442 reg = <0x0>;
443 #gpio-cells = <2>;
444 gpio-controller;
445 interrupt-parent = <&gpio0>;
446 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
447 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
448 <&rk806_dvs2_null>, <&rk806_dvs3_null>;
449 pinctrl-names = "default";
450 spi-max-frequency = <1000000>;
451
452 vcc1-supply = <&vcc5v0_sys>;
453 vcc2-supply = <&vcc5v0_sys>;
454 vcc3-supply = <&vcc5v0_sys>;
455 vcc4-supply = <&vcc5v0_sys>;
456 vcc5-supply = <&vcc5v0_sys>;
457 vcc6-supply = <&vcc5v0_sys>;
458 vcc7-supply = <&vcc5v0_sys>;
459 vcc8-supply = <&vcc5v0_sys>;
460 vcc9-supply = <&vcc5v0_sys>;
461 vcc10-supply = <&vcc5v0_sys>;
462 vcc11-supply = <&vcc_2v0_pldo_s3>;
463 vcc12-supply = <&vcc5v0_sys>;
464 vcc13-supply = <&vcc5v0_sys>;
465 vcc14-supply = <&vcc_1v1_nldo_s3>;
466 vcca-supply = <&vcc5v0_sys>;
467
468 rk806_dvs1_null: dvs1-null-pins {
469 pins = "gpio_pwrctrl1";
470 function = "pin_fun0";
471 };
472
473 rk806_dvs2_null: dvs2-null-pins {
474 pins = "gpio_pwrctrl2";
475 function = "pin_fun0";
476 };
477
478 rk806_dvs3_null: dvs3-null-pins {
479 pins = "gpio_pwrctrl3";
480 function = "pin_fun0";
481 };
482
483
484 regulators {
485 vdd_gpu_s0: dcdc-reg1 {
486 regulator-boot-on;
487 regulator-min-microvolt = <550000>;
488 regulator-max-microvolt = <950000>;
489 regulator-ramp-delay = <12500>;
490 regulator-name = "vdd_gpu_s0";
491 regulator-enable-ramp-delay = <400>;
492 regulator-state-mem {
493 regulator-off-in-suspend;
494 };
495 };
496
497 vdd_npu_s0: dcdc-reg2 {
498 regulator-always-on;
499 regulator-boot-on;
500 regulator-min-microvolt = <550000>;
501 regulator-max-microvolt = <950000>;
502 regulator-ramp-delay = <12500>;
503 regulator-name = "vdd_npu_s0";
504 regulator-state-mem {
505 regulator-off-in-suspend;
506 };
507 };
508
509 vdd_log_s0: dcdc-reg3 {
510 regulator-always-on;
511 regulator-boot-on;
512 regulator-min-microvolt = <675000>;
513 regulator-max-microvolt = <750000>;
514 regulator-ramp-delay = <12500>;
515 regulator-name = "vdd_log_s0";
516 regulator-state-mem {
517 regulator-off-in-suspend;
518 regulator-suspend-microvolt = <750000>;
519 };
520 };
521
522 vdd_vdenc_s0: dcdc-reg4 {
523 regulator-always-on;
524 regulator-boot-on;
525 regulator-min-microvolt = <550000>;
526 regulator-max-microvolt = <950000>;
527 regulator-ramp-delay = <12500>;
528 regulator-name = "vdd_vdenc_s0";
529 regulator-state-mem {
530 regulator-off-in-suspend;
531 };
532
533 };
534
535 vdd_gpu_mem_s0: dcdc-reg5 {
536 regulator-boot-on;
537 regulator-min-microvolt = <675000>;
538 regulator-max-microvolt = <950000>;
539 regulator-ramp-delay = <12500>;
540 regulator-enable-ramp-delay = <400>;
541 regulator-name = "vdd_gpu_mem_s0";
542 regulator-state-mem {
543 regulator-off-in-suspend;
544 };
545
546 };
547
548 vdd_npu_mem_s0: dcdc-reg6 {
549 regulator-always-on;
550 regulator-boot-on;
551 regulator-min-microvolt = <675000>;
552 regulator-max-microvolt = <950000>;
553 regulator-ramp-delay = <12500>;
554 regulator-name = "vdd_npu_mem_s0";
555 regulator-state-mem {
556 regulator-off-in-suspend;
557 };
558
559 };
560
561 vcc_2v0_pldo_s3: dcdc-reg7 {
562 regulator-always-on;
563 regulator-boot-on;
564 regulator-min-microvolt = <2000000>;
565 regulator-max-microvolt = <2000000>;
566 regulator-ramp-delay = <12500>;
567 regulator-name = "vdd_2v0_pldo_s3";
568 regulator-state-mem {
569 regulator-on-in-suspend;
570 regulator-suspend-microvolt = <2000000>;
571 };
572 };
573
574 vdd_vdenc_mem_s0: dcdc-reg8 {
575 regulator-always-on;
576 regulator-boot-on;
577 regulator-min-microvolt = <675000>;
578 regulator-max-microvolt = <950000>;
579 regulator-ramp-delay = <12500>;
580 regulator-name = "vdd_vdenc_mem_s0";
581 regulator-state-mem {
582 regulator-off-in-suspend;
583 };
584 };
585
586 vdd2_ddr_s3: dcdc-reg9 {
587 regulator-always-on;
588 regulator-boot-on;
589 regulator-name = "vdd2_ddr_s3";
590 regulator-state-mem {
591 regulator-on-in-suspend;
592 };
593 };
594
595 vcc_1v1_nldo_s3: dcdc-reg10 {
596 regulator-always-on;
597 regulator-boot-on;
598 regulator-min-microvolt = <1100000>;
599 regulator-max-microvolt = <1100000>;
600 regulator-ramp-delay = <12500>;
601 regulator-name = "vcc_1v1_nldo_s3";
602 regulator-state-mem {
603 regulator-on-in-suspend;
604 regulator-suspend-microvolt = <1100000>;
605 };
606 };
607
608 avcc_1v8_s0: pldo-reg1 {
609 regulator-always-on;
610 regulator-boot-on;
611 regulator-min-microvolt = <1800000>;
612 regulator-max-microvolt = <1800000>;
613 regulator-ramp-delay = <12500>;
614 regulator-name = "avcc_1v8_s0";
615 regulator-state-mem {
616 regulator-off-in-suspend;
617 };
618 };
619
620 vdd1_1v8_ddr_s3: pldo-reg2 {
621 regulator-always-on;
622 regulator-boot-on;
623 regulator-min-microvolt = <1800000>;
624 regulator-max-microvolt = <1800000>;
625 regulator-ramp-delay = <12500>;
626 regulator-name = "vdd1_1v8_ddr_s3";
627 regulator-state-mem {
628 regulator-on-in-suspend;
629 regulator-suspend-microvolt = <1800000>;
630 };
631 };
632
633 avcc_1v8_codec_s0: pldo-reg3 {
634 regulator-always-on;
635 regulator-boot-on;
636 regulator-min-microvolt = <1800000>;
637 regulator-max-microvolt = <1800000>;
638 regulator-ramp-delay = <12500>;
639 regulator-name = "avcc_1v8_codec_s0";
640 regulator-state-mem {
641 regulator-off-in-suspend;
642 };
643 };
644
645 vcc_3v3_s3: pldo-reg4 {
646 regulator-always-on;
647 regulator-boot-on;
648 regulator-min-microvolt = <3300000>;
649 regulator-max-microvolt = <3300000>;
650 regulator-ramp-delay = <12500>;
651 regulator-name = "vcc_3v3_s3";
652 regulator-state-mem {
653 regulator-on-in-suspend;
654 regulator-suspend-microvolt = <3300000>;
655 };
656 };
657
658 vccio_sd_s0: pldo-reg5 {
659 regulator-always-on;
660 regulator-boot-on;
661 regulator-min-microvolt = <1800000>;
662 regulator-max-microvolt = <3300000>;
663 regulator-ramp-delay = <12500>;
664 regulator-name = "vccio_sd_s0";
665 regulator-state-mem {
666 regulator-off-in-suspend;
667 };
668 };
669
670 vccio_1v8_s3: pldo-reg6 {
671 regulator-always-on;
672 regulator-boot-on;
673 regulator-min-microvolt = <1800000>;
674 regulator-max-microvolt = <1800000>;
675 regulator-ramp-delay = <12500>;
676 regulator-name = "vccio_1v8_s3";
677 regulator-state-mem {
678 regulator-on-in-suspend;
679 regulator-suspend-microvolt = <1800000>;
680 };
681 };
682
683 vdd_0v75_s3: nldo-reg1 {
684 regulator-always-on;
685 regulator-boot-on;
686 regulator-min-microvolt = <750000>;
687 regulator-max-microvolt = <750000>;
688 regulator-ramp-delay = <12500>;
689 regulator-name = "vdd_0v75_s3";
690 regulator-state-mem {
691 regulator-on-in-suspend;
692 regulator-suspend-microvolt = <750000>;
693 };
694 };
695
696 vdd2l_0v9_ddr_s3: nldo-reg2 {
697 regulator-always-on;
698 regulator-boot-on;
699 regulator-min-microvolt = <900000>;
700 regulator-max-microvolt = <900000>;
701 regulator-name = "vdd2l_0v9_ddr_s3";
702 regulator-state-mem {
703 regulator-on-in-suspend;
704 regulator-suspend-microvolt = <900000>;
705 };
706 };
707
708 vdd_0v75_hdmi_edp_s0: nldo-reg3 {
709 regulator-always-on;
710 regulator-boot-on;
711 regulator-min-microvolt = <750000>;
712 regulator-max-microvolt = <750000>;
713 regulator-name = "vdd_0v75_hdmi_edp_s0";
714 regulator-state-mem {
715 regulator-off-in-suspend;
716 };
717 };
718
719 avdd_0v75_s0: nldo-reg4 {
720 regulator-always-on;
721 regulator-boot-on;
722 regulator-min-microvolt = <750000>;
723 regulator-max-microvolt = <750000>;
724 regulator-name = "avdd_0v75_s0";
725 regulator-state-mem {
726 regulator-off-in-suspend;
727 };
728 };
729
730 vdd_0v85_s0: nldo-reg5 {
731 regulator-always-on;
732 regulator-boot-on;
733 regulator-min-microvolt = <850000>;
734 regulator-max-microvolt = <850000>;
735 regulator-name = "vdd_0v85_s0";
736 regulator-state-mem {
737 regulator-off-in-suspend;
738 };
739 };
740 };
741 };
742
743 pmic@1 {
744 compatible = "rockchip,rk806";
745 reg = <0x01>;
746 #gpio-cells = <2>;
747 gpio-controller;
748 interrupt-parent = <&gpio0>;
749 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
750 pinctrl-0 = <&rk806_slave_dvs1_null>, <&rk806_slave_dvs2_null>,
751 <&rk806_slave_dvs3_null>;
752 pinctrl-names = "default";
753 spi-max-frequency = <1000000>;
754
755 vcc1-supply = <&vcc5v0_sys>;
756 vcc2-supply = <&vcc5v0_sys>;
757 vcc3-supply = <&vcc5v0_sys>;
758 vcc4-supply = <&vcc5v0_sys>;
759 vcc5-supply = <&vcc5v0_sys>;
760 vcc6-supply = <&vcc5v0_sys>;
761 vcc7-supply = <&vcc5v0_sys>;
762 vcc8-supply = <&vcc5v0_sys>;
763 vcc9-supply = <&vcc5v0_sys>;
764 vcc10-supply = <&vcc5v0_sys>;
765 vcc11-supply = <&vcc_2v0_pldo_s3>;
766 vcc12-supply = <&vcc5v0_sys>;
767 vcc13-supply = <&vcc_1v1_nldo_s3>;
768 vcc14-supply = <&vcc_2v0_pldo_s3>;
769 vcca-supply = <&vcc5v0_sys>;
770
771 rk806_slave_dvs1_null: dvs1-null-pins {
772 pins = "gpio_pwrctrl1";
773 function = "pin_fun0";
774 };
775
776 rk806_slave_dvs2_null: dvs2-null-pins {
777 pins = "gpio_pwrctrl2";
778 function = "pin_fun0";
779 };
780
781 rk806_slave_dvs3_null: dvs3-null-pins {
782 pins = "gpio_pwrctrl3";
783 function = "pin_fun0";
784 };
785
786 regulators {
787 vdd_cpu_big1_s0: dcdc-reg1 {
788 regulator-always-on;
789 regulator-boot-on;
790 regulator-min-microvolt = <550000>;
791 regulator-max-microvolt = <1050000>;
792 regulator-ramp-delay = <12500>;
793 regulator-name = "vdd_cpu_big1_s0";
794 regulator-state-mem {
795 regulator-off-in-suspend;
796 };
797 };
798
799 vdd_cpu_big0_s0: dcdc-reg2 {
800 regulator-always-on;
801 regulator-boot-on;
802 regulator-min-microvolt = <550000>;
803 regulator-max-microvolt = <1050000>;
804 regulator-ramp-delay = <12500>;
805 regulator-name = "vdd_cpu_big0_s0";
806 regulator-state-mem {
807 regulator-off-in-suspend;
808 };
809 };
810
811 vdd_cpu_lit_s0: dcdc-reg3 {
812 regulator-always-on;
813 regulator-boot-on;
814 regulator-min-microvolt = <550000>;
815 regulator-max-microvolt = <950000>;
816 regulator-ramp-delay = <12500>;
817 regulator-name = "vdd_cpu_lit_s0";
818 regulator-state-mem {
819 regulator-off-in-suspend;
820 };
821 };
822
823 vcc_3v3_s0: dcdc-reg4 {
824 regulator-always-on;
825 regulator-boot-on;
826 regulator-min-microvolt = <3300000>;
827 regulator-max-microvolt = <3300000>;
828 regulator-ramp-delay = <12500>;
829 regulator-name = "vcc_3v3_s0";
830 regulator-state-mem {
831 regulator-off-in-suspend;
832 };
833 };
834
835 vdd_cpu_big1_mem_s0: dcdc-reg5 {
836 regulator-always-on;
837 regulator-boot-on;
838 regulator-min-microvolt = <675000>;
839 regulator-max-microvolt = <1050000>;
840 regulator-ramp-delay = <12500>;
841 regulator-name = "vdd_cpu_big1_mem_s0";
842 regulator-state-mem {
843 regulator-off-in-suspend;
844 };
845 };
846
847
848 vdd_cpu_big0_mem_s0: dcdc-reg6 {
849 regulator-always-on;
850 regulator-boot-on;
851 regulator-min-microvolt = <675000>;
852 regulator-max-microvolt = <1050000>;
853 regulator-ramp-delay = <12500>;
854 regulator-name = "vdd_cpu_big0_mem_s0";
855 regulator-state-mem {
856 regulator-off-in-suspend;
857 };
858 };
859
860 vcc_1v8_s0: dcdc-reg7 {
861 regulator-always-on;
862 regulator-boot-on;
863 regulator-min-microvolt = <1800000>;
864 regulator-max-microvolt = <1800000>;
865 regulator-ramp-delay = <12500>;
866 regulator-name = "vcc_1v8_s0";
867 regulator-state-mem {
868 regulator-off-in-suspend;
869 };
870 };
871
872 vdd_cpu_lit_mem_s0: dcdc-reg8 {
873 regulator-always-on;
874 regulator-boot-on;
875 regulator-min-microvolt = <675000>;
876 regulator-max-microvolt = <950000>;
877 regulator-ramp-delay = <12500>;
878 regulator-name = "vdd_cpu_lit_mem_s0";
879 regulator-state-mem {
880 regulator-off-in-suspend;
881 };
882 };
883
884 vddq_ddr_s0: dcdc-reg9 {
885 regulator-always-on;
886 regulator-boot-on;
887 regulator-name = "vddq_ddr_s0";
888 regulator-state-mem {
889 regulator-off-in-suspend;
890 };
891 };
892
893 vdd_ddr_s0: dcdc-reg10 {
894 regulator-always-on;
895 regulator-boot-on;
896 regulator-min-microvolt = <675000>;
897 regulator-max-microvolt = <900000>;
898 regulator-ramp-delay = <12500>;
899 regulator-name = "vdd_ddr_s0";
900 regulator-state-mem {
901 regulator-off-in-suspend;
902 };
903 };
904
905 vcc_1v8_cam_s0: pldo-reg1 {
906 regulator-always-on;
907 regulator-boot-on;
908 regulator-min-microvolt = <1800000>;
909 regulator-max-microvolt = <1800000>;
910 regulator-ramp-delay = <12500>;
911 regulator-name = "vcc_1v8_cam_s0";
912 regulator-state-mem {
913 regulator-off-in-suspend;
914 };
915 };
916
917 avdd1v8_ddr_pll_s0: pldo-reg2 {
918 regulator-always-on;
919 regulator-boot-on;
920 regulator-min-microvolt = <1800000>;
921 regulator-max-microvolt = <1800000>;
922 regulator-ramp-delay = <12500>;
923 regulator-name = "avdd1v8_ddr_pll_s0";
924 regulator-state-mem {
925 regulator-off-in-suspend;
926 };
927 };
928
929 vdd_1v8_pll_s0: pldo-reg3 {
930 regulator-always-on;
931 regulator-boot-on;
932 regulator-min-microvolt = <1800000>;
933 regulator-max-microvolt = <1800000>;
934 regulator-ramp-delay = <12500>;
935 regulator-name = "vdd_1v8_pll_s0";
936 regulator-state-mem {
937 regulator-off-in-suspend;
938 };
939 };
940
941 vcc_3v3_sd_s0: pldo-reg4 {
942 regulator-always-on;
943 regulator-boot-on;
944 regulator-min-microvolt = <3300000>;
945 regulator-max-microvolt = <3300000>;
946 regulator-ramp-delay = <12500>;
947 regulator-name = "vcc_3v3_sd_s0";
948 regulator-state-mem {
949 regulator-off-in-suspend;
950 };
951 };
952
953 vcc_2v8_cam_s0: pldo-reg5 {
954 regulator-always-on;
955 regulator-boot-on;
956 regulator-min-microvolt = <2800000>;
957 regulator-max-microvolt = <2800000>;
958 regulator-ramp-delay = <12500>;
959 regulator-name = "vcc_2v8_cam_s0";
960 regulator-state-mem {
961 regulator-off-in-suspend;
962 };
963 };
964
965 pldo6_s3: pldo-reg6 {
966 regulator-always-on;
967 regulator-boot-on;
968 regulator-min-microvolt = <1800000>;
969 regulator-max-microvolt = <1800000>;
970 regulator-name = "pldo6_s3";
971 regulator-state-mem {
972 regulator-on-in-suspend;
973 regulator-suspend-microvolt = <1800000>;
974 };
975 };
976
977 vdd_0v75_pll_s0: nldo-reg1 {
978 regulator-always-on;
979 regulator-boot-on;
980 regulator-min-microvolt = <750000>;
981 regulator-max-microvolt = <750000>;
982 regulator-ramp-delay = <12500>;
983 regulator-name = "vdd_0v75_pll_s0";
984 regulator-state-mem {
985 regulator-off-in-suspend;
986 };
987 };
988
989 vdd_ddr_pll_s0: nldo-reg2 {
990 regulator-always-on;
991 regulator-boot-on;
992 regulator-min-microvolt = <850000>;
993 regulator-max-microvolt = <850000>;
994 regulator-name = "vdd_ddr_pll_s0";
995 regulator-state-mem {
996 regulator-off-in-suspend;
997 };
998 };
999
1000 avdd_0v85_s0: nldo-reg3 {
1001 regulator-always-on;
1002 regulator-boot-on;
1003 regulator-min-microvolt = <850000>;
1004 regulator-max-microvolt = <850000>;
1005 regulator-ramp-delay = <12500>;
1006 regulator-name = "avdd_0v85_s0";
1007 regulator-state-mem {
1008 regulator-off-in-suspend;
1009 };
1010 };
1011
1012 avdd_1v2_cam_s0: nldo-reg4 {
1013 regulator-always-on;
1014 regulator-boot-on;
1015 regulator-min-microvolt = <1200000>;
1016 regulator-max-microvolt = <1200000>;
1017 regulator-ramp-delay = <12500>;
1018 regulator-name = "avdd_1v2_cam_s0";
1019 regulator-state-mem {
1020 regulator-off-in-suspend;
1021 };
1022 };
1023
1024 avdd_1v2_s0: nldo-reg5 {
1025 regulator-always-on;
1026 regulator-boot-on;
1027 regulator-min-microvolt = <1200000>;
1028 regulator-max-microvolt = <1200000>;
1029 regulator-ramp-delay = <12500>;
1030 regulator-name = "avdd_1v2_s0";
1031 regulator-state-mem {
1032 regulator-off-in-suspend;
1033 };
1034 };
1035 };
1036 };
1037};
1038
1039&sata0 {
1040 status = "okay";
1041};
1042
1043&u2phy2 {
1044 status = "okay";
1045};
1046
1047&u2phy2_host {
1048 phy-supply = <&vcc5v0_host>;
1049 status = "okay";
1050};
1051
1052&u2phy3 {
1053 status = "okay";
1054};
1055
1056&u2phy3_host {
1057 phy-supply = <&vcc5v0_host>;
1058 status = "okay";
1059};
1060
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]1061&uart2 {
1062 pinctrl-0 = <&uart2m0_xfer>;
1063 status = "okay";
1064};
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]1065
1066&usb_host0_ehci {
1067 status = "okay";
1068};
1069
1070&usb_host0_ohci {
1071 status = "okay";
1072};
1073
1074&usb_host1_ehci {
1075 status = "okay";
1076};
1077
1078&usb_host1_ohci {
1079 status = "okay";
1080};