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git01.mediatek.com / filogic / uboot / f62397ac149b9afdfa7dd9d6b2b7ff390228d201 / . / arch / arm / dts / rk3588-evb1-v10.dts
blob: b9d789d57862c2def973671cb4de41ea91b0bba5 [file] [log] [blame]
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame^]10#include <dt-bindings/input/input.h>
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]11#include <dt-bindings/pinctrl/rockchip.h>
12#include "rk3588.dtsi"
13
14/ {
15 model = "Rockchip RK3588 EVB1 V10 Board";
16 compatible = "rockchip,rk3588-evb1-v10", "rockchip,rk3588";
17
18 aliases {
19 mmc0 = &sdhci;
20 serial2 = &uart2;
21 };
22
23 chosen {
24 stdout-path = "serial2:1500000n8";
25 };
26
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame^]27 adc-keys {
28 compatible = "adc-keys";
29 io-channels = <&saradc 1>;
30 io-channel-names = "buttons";
31 keyup-threshold-microvolt = <1800000>;
32 poll-interval = <100>;
33
34 button-vol-up {
35 label = "Volume Up";
36 linux,code = <KEY_VOLUMEUP>;
37 press-threshold-microvolt = <17000>;
38 };
39
40 button-vol-down {
41 label = "Volume Down";
42 linux,code = <KEY_VOLUMEDOWN>;
43 press-threshold-microvolt = <417000>;
44 };
45
46 button-menu {
47 label = "Menu";
48 linux,code = <KEY_MENU>;
49 press-threshold-microvolt = <890000>;
50 };
51
52 button-escape {
53 label = "Escape";
54 linux,code = <KEY_ESC>;
55 press-threshold-microvolt = <1235000>;
56 };
57 };
58
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]59 backlight: backlight {
60 compatible = "pwm-backlight";
61 power-supply = <&vcc12v_dcin>;
62 pwms = <&pwm2 0 25000 0>;
63 };
64
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame^]65 pcie20_avdd0v85: pcie20-avdd0v85-regulator {
66 compatible = "regulator-fixed";
67 regulator-name = "pcie20_avdd0v85";
68 regulator-always-on;
69 regulator-boot-on;
70 regulator-min-microvolt = <850000>;
71 regulator-max-microvolt = <850000>;
72 vin-supply = <&avdd_0v85_s0>;
73 };
74
75 pcie20_avdd1v8: pcie20-avdd1v8-regulator {
76 compatible = "regulator-fixed";
77 regulator-name = "pcie20_avdd1v8";
78 regulator-always-on;
79 regulator-boot-on;
80 regulator-min-microvolt = <1800000>;
81 regulator-max-microvolt = <1800000>;
82 vin-supply = <&avcc_1v8_s0>;
83 };
84
85 pcie30_avdd0v75: pcie30-avdd0v75-regulator {
86 compatible = "regulator-fixed";
87 regulator-name = "pcie30_avdd0v75";
88 regulator-always-on;
89 regulator-boot-on;
90 regulator-min-microvolt = <750000>;
91 regulator-max-microvolt = <750000>;
92 vin-supply = <&avdd_0v75_s0>;
93 };
94
95 pcie30_avdd1v8: pcie30-avdd1v8-regulator {
96 compatible = "regulator-fixed";
97 regulator-name = "pcie30_avdd1v8";
98 regulator-always-on;
99 regulator-boot-on;
100 regulator-min-microvolt = <1800000>;
101 regulator-max-microvolt = <1800000>;
102 vin-supply = <&avcc_1v8_s0>;
103 };
104
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]105 vcc12v_dcin: vcc12v-dcin-regulator {
106 compatible = "regulator-fixed";
107 regulator-name = "vcc12v_dcin";
108 regulator-always-on;
109 regulator-boot-on;
110 regulator-min-microvolt = <12000000>;
111 regulator-max-microvolt = <12000000>;
112 };
113
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame^]114 vcc3v3_pcie30: vcc3v3-pcie30-regulator {
115 compatible = "regulator-fixed";
116 regulator-name = "vcc3v3_pcie30";
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
119 enable-active-high;
120 gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
121 startup-delay-us = <5000>;
122 vin-supply = <&vcc12v_dcin>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&vcc3v3_pcie30_en>;
125 };
126
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]127 vcc5v0_host: vcc5v0-host-regulator {
128 compatible = "regulator-fixed";
129 regulator-name = "vcc5v0_host";
130 regulator-boot-on;
131 regulator-always-on;
132 regulator-min-microvolt = <5000000>;
133 regulator-max-microvolt = <5000000>;
134 enable-active-high;
135 gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
136 pinctrl-names = "default";
137 pinctrl-0 = <&vcc5v0_host_en>;
138 vin-supply = <&vcc5v0_usb>;
139 };
140
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]141 vcc5v0_sys: vcc5v0-sys-regulator {
142 compatible = "regulator-fixed";
143 regulator-name = "vcc5v0_sys";
144 regulator-always-on;
145 regulator-boot-on;
146 regulator-min-microvolt = <5000000>;
147 regulator-max-microvolt = <5000000>;
148 vin-supply = <&vcc12v_dcin>;
149 };
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]150
151 vcc5v0_usbdcin: vcc5v0-usbdcin-regulator {
152 compatible = "regulator-fixed";
153 regulator-name = "vcc5v0_usbdcin";
154 regulator-always-on;
155 regulator-boot-on;
156 regulator-min-microvolt = <5000000>;
157 regulator-max-microvolt = <5000000>;
158 vin-supply = <&vcc12v_dcin>;
159 };
160
161 vcc5v0_usb: vcc5v0-usb-regulator {
162 compatible = "regulator-fixed";
163 regulator-name = "vcc5v0_usb";
164 regulator-always-on;
165 regulator-boot-on;
166 regulator-min-microvolt = <5000000>;
167 regulator-max-microvolt = <5000000>;
168 vin-supply = <&vcc5v0_usbdcin>;
169 };
170};
171
172&combphy0_ps {
173 status = "okay";
174};
175
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame^]176&combphy2_psu {
177 status = "okay";
178};
179
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]180&cpu_b0 {
181 cpu-supply = <&vdd_cpu_big0_s0>;
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]182};
183
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]184&cpu_b1 {
185 cpu-supply = <&vdd_cpu_big0_s0>;
186};
187
188&cpu_b2 {
189 cpu-supply = <&vdd_cpu_big1_s0>;
190};
191
192&cpu_b3 {
193 cpu-supply = <&vdd_cpu_big1_s0>;
194};
195
196&cpu_l0 {
197 cpu-supply = <&vdd_cpu_lit_s0>;
198};
199
200&cpu_l1 {
201 cpu-supply = <&vdd_cpu_lit_s0>;
202};
203
204&cpu_l2 {
205 cpu-supply = <&vdd_cpu_lit_s0>;
206};
207
208&cpu_l3 {
209 cpu-supply = <&vdd_cpu_lit_s0>;
210};
211
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]212&gmac0 {
213 clock_in_out = "output";
214 phy-handle = <&rgmii_phy>;
215 phy-mode = "rgmii-rxid";
216 pinctrl-0 = <&gmac0_miim
217 &gmac0_tx_bus2
218 &gmac0_rx_bus2
219 &gmac0_rgmii_clk
220 &gmac0_rgmii_bus>;
221 pinctrl-names = "default";
222 rx_delay = <0x00>;
223 tx_delay = <0x43>;
224 status = "okay";
225};
226
227&i2c2 {
228 status = "okay";
229
230 hym8563: rtc@51 {
231 compatible = "haoyu,hym8563";
232 reg = <0x51>;
233 #clock-cells = <0>;
234 clock-output-names = "hym8563";
235 pinctrl-names = "default";
236 pinctrl-0 = <&hym8563_int>;
237 interrupt-parent = <&gpio0>;
238 interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>;
239 wakeup-source;
240 };
241};
242
243&mdio0 {
244 rgmii_phy: ethernet-phy@1 {
245 /* RTL8211F */
246 compatible = "ethernet-phy-id001c.c916";
247 reg = <0x1>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&rtl8211f_rst>;
250 reset-assert-us = <20000>;
251 reset-deassert-us = <100000>;
252 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
253 };
254};
255
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame^]256&pcie2x1l1 {
257 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
258 pinctrl-names = "default";
259 pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>;
260 status = "okay";
261};
262
263&pcie30phy {
264 status = "okay";
265};
266
267&pcie3x4 {
268 pinctrl-names = "default";
269 pinctrl-0 = <&pcie3_reset>;
270 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
271 vpcie3v3-supply = <&vcc3v3_pcie30>;
272 status = "okay";
273};
274
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]275&pinctrl {
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame^]276 rtl8111 {
277 rtl8111_isolate: rtl8111-isolate {
278 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
279 };
280 };
281
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]282 rtl8211f {
283 rtl8211f_rst: rtl8211f-rst {
284 rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
285 };
286
287 };
288
289 hym8563 {
290 hym8563_int: hym8563-int {
291 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
292 };
293 };
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]294
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame^]295 pcie2 {
296 pcie2_1_rst: pcie2-1-rst {
297 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
298 };
299 };
300
301 pcie3 {
302 pcie3_reset: pcie3-reset {
303 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
304 };
305
306 vcc3v3_pcie30_en: vcc3v3-pcie30-en {
307 rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
308 };
309 };
310
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]311 usb {
312 vcc5v0_host_en: vcc5v0-host-en {
313 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
314 };
315 };
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]316};
317
318&pwm2 {
319 status = "okay";
320};
321
Jonas Karlmanf62397a2023-10-17 17:02:08 +0000[diff] [blame^]322&saradc {
323 vref-supply = <&vcc_1v8_s0>;
324 status = "okay";
325};
326
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]327&sdhci {
328 bus-width = <8>;
329 no-sdio;
330 no-sd;
331 non-removable;
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]332 mmc-hs400-1_8v;
333 mmc-hs400-enhanced-strobe;
334 status = "okay";
335};
336
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]337&spi2 {
338 status = "okay";
339 assigned-clocks = <&cru CLK_SPI2>;
340 assigned-clock-rates = <200000000>;
341 num-cs = <2>;
342
343 pmic@0 {
344 compatible = "rockchip,rk806";
345 reg = <0x0>;
346 #gpio-cells = <2>;
347 gpio-controller;
348 interrupt-parent = <&gpio0>;
349 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
350 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
351 <&rk806_dvs2_null>, <&rk806_dvs3_null>;
352 pinctrl-names = "default";
353 spi-max-frequency = <1000000>;
354
355 vcc1-supply = <&vcc5v0_sys>;
356 vcc2-supply = <&vcc5v0_sys>;
357 vcc3-supply = <&vcc5v0_sys>;
358 vcc4-supply = <&vcc5v0_sys>;
359 vcc5-supply = <&vcc5v0_sys>;
360 vcc6-supply = <&vcc5v0_sys>;
361 vcc7-supply = <&vcc5v0_sys>;
362 vcc8-supply = <&vcc5v0_sys>;
363 vcc9-supply = <&vcc5v0_sys>;
364 vcc10-supply = <&vcc5v0_sys>;
365 vcc11-supply = <&vcc_2v0_pldo_s3>;
366 vcc12-supply = <&vcc5v0_sys>;
367 vcc13-supply = <&vcc5v0_sys>;
368 vcc14-supply = <&vcc_1v1_nldo_s3>;
369 vcca-supply = <&vcc5v0_sys>;
370
371 rk806_dvs1_null: dvs1-null-pins {
372 pins = "gpio_pwrctrl1";
373 function = "pin_fun0";
374 };
375
376 rk806_dvs2_null: dvs2-null-pins {
377 pins = "gpio_pwrctrl2";
378 function = "pin_fun0";
379 };
380
381 rk806_dvs3_null: dvs3-null-pins {
382 pins = "gpio_pwrctrl3";
383 function = "pin_fun0";
384 };
385
386
387 regulators {
388 vdd_gpu_s0: dcdc-reg1 {
389 regulator-boot-on;
390 regulator-min-microvolt = <550000>;
391 regulator-max-microvolt = <950000>;
392 regulator-ramp-delay = <12500>;
393 regulator-name = "vdd_gpu_s0";
394 regulator-enable-ramp-delay = <400>;
395 regulator-state-mem {
396 regulator-off-in-suspend;
397 };
398 };
399
400 vdd_npu_s0: dcdc-reg2 {
401 regulator-always-on;
402 regulator-boot-on;
403 regulator-min-microvolt = <550000>;
404 regulator-max-microvolt = <950000>;
405 regulator-ramp-delay = <12500>;
406 regulator-name = "vdd_npu_s0";
407 regulator-state-mem {
408 regulator-off-in-suspend;
409 };
410 };
411
412 vdd_log_s0: dcdc-reg3 {
413 regulator-always-on;
414 regulator-boot-on;
415 regulator-min-microvolt = <675000>;
416 regulator-max-microvolt = <750000>;
417 regulator-ramp-delay = <12500>;
418 regulator-name = "vdd_log_s0";
419 regulator-state-mem {
420 regulator-off-in-suspend;
421 regulator-suspend-microvolt = <750000>;
422 };
423 };
424
425 vdd_vdenc_s0: dcdc-reg4 {
426 regulator-always-on;
427 regulator-boot-on;
428 regulator-min-microvolt = <550000>;
429 regulator-max-microvolt = <950000>;
430 regulator-ramp-delay = <12500>;
431 regulator-name = "vdd_vdenc_s0";
432 regulator-state-mem {
433 regulator-off-in-suspend;
434 };
435
436 };
437
438 vdd_gpu_mem_s0: dcdc-reg5 {
439 regulator-boot-on;
440 regulator-min-microvolt = <675000>;
441 regulator-max-microvolt = <950000>;
442 regulator-ramp-delay = <12500>;
443 regulator-enable-ramp-delay = <400>;
444 regulator-name = "vdd_gpu_mem_s0";
445 regulator-state-mem {
446 regulator-off-in-suspend;
447 };
448
449 };
450
451 vdd_npu_mem_s0: dcdc-reg6 {
452 regulator-always-on;
453 regulator-boot-on;
454 regulator-min-microvolt = <675000>;
455 regulator-max-microvolt = <950000>;
456 regulator-ramp-delay = <12500>;
457 regulator-name = "vdd_npu_mem_s0";
458 regulator-state-mem {
459 regulator-off-in-suspend;
460 };
461
462 };
463
464 vcc_2v0_pldo_s3: dcdc-reg7 {
465 regulator-always-on;
466 regulator-boot-on;
467 regulator-min-microvolt = <2000000>;
468 regulator-max-microvolt = <2000000>;
469 regulator-ramp-delay = <12500>;
470 regulator-name = "vdd_2v0_pldo_s3";
471 regulator-state-mem {
472 regulator-on-in-suspend;
473 regulator-suspend-microvolt = <2000000>;
474 };
475 };
476
477 vdd_vdenc_mem_s0: dcdc-reg8 {
478 regulator-always-on;
479 regulator-boot-on;
480 regulator-min-microvolt = <675000>;
481 regulator-max-microvolt = <950000>;
482 regulator-ramp-delay = <12500>;
483 regulator-name = "vdd_vdenc_mem_s0";
484 regulator-state-mem {
485 regulator-off-in-suspend;
486 };
487 };
488
489 vdd2_ddr_s3: dcdc-reg9 {
490 regulator-always-on;
491 regulator-boot-on;
492 regulator-name = "vdd2_ddr_s3";
493 regulator-state-mem {
494 regulator-on-in-suspend;
495 };
496 };
497
498 vcc_1v1_nldo_s3: dcdc-reg10 {
499 regulator-always-on;
500 regulator-boot-on;
501 regulator-min-microvolt = <1100000>;
502 regulator-max-microvolt = <1100000>;
503 regulator-ramp-delay = <12500>;
504 regulator-name = "vcc_1v1_nldo_s3";
505 regulator-state-mem {
506 regulator-on-in-suspend;
507 regulator-suspend-microvolt = <1100000>;
508 };
509 };
510
511 avcc_1v8_s0: pldo-reg1 {
512 regulator-always-on;
513 regulator-boot-on;
514 regulator-min-microvolt = <1800000>;
515 regulator-max-microvolt = <1800000>;
516 regulator-ramp-delay = <12500>;
517 regulator-name = "avcc_1v8_s0";
518 regulator-state-mem {
519 regulator-off-in-suspend;
520 };
521 };
522
523 vdd1_1v8_ddr_s3: pldo-reg2 {
524 regulator-always-on;
525 regulator-boot-on;
526 regulator-min-microvolt = <1800000>;
527 regulator-max-microvolt = <1800000>;
528 regulator-ramp-delay = <12500>;
529 regulator-name = "vdd1_1v8_ddr_s3";
530 regulator-state-mem {
531 regulator-on-in-suspend;
532 regulator-suspend-microvolt = <1800000>;
533 };
534 };
535
536 avcc_1v8_codec_s0: pldo-reg3 {
537 regulator-always-on;
538 regulator-boot-on;
539 regulator-min-microvolt = <1800000>;
540 regulator-max-microvolt = <1800000>;
541 regulator-ramp-delay = <12500>;
542 regulator-name = "avcc_1v8_codec_s0";
543 regulator-state-mem {
544 regulator-off-in-suspend;
545 };
546 };
547
548 vcc_3v3_s3: pldo-reg4 {
549 regulator-always-on;
550 regulator-boot-on;
551 regulator-min-microvolt = <3300000>;
552 regulator-max-microvolt = <3300000>;
553 regulator-ramp-delay = <12500>;
554 regulator-name = "vcc_3v3_s3";
555 regulator-state-mem {
556 regulator-on-in-suspend;
557 regulator-suspend-microvolt = <3300000>;
558 };
559 };
560
561 vccio_sd_s0: pldo-reg5 {
562 regulator-always-on;
563 regulator-boot-on;
564 regulator-min-microvolt = <1800000>;
565 regulator-max-microvolt = <3300000>;
566 regulator-ramp-delay = <12500>;
567 regulator-name = "vccio_sd_s0";
568 regulator-state-mem {
569 regulator-off-in-suspend;
570 };
571 };
572
573 vccio_1v8_s3: pldo-reg6 {
574 regulator-always-on;
575 regulator-boot-on;
576 regulator-min-microvolt = <1800000>;
577 regulator-max-microvolt = <1800000>;
578 regulator-ramp-delay = <12500>;
579 regulator-name = "vccio_1v8_s3";
580 regulator-state-mem {
581 regulator-on-in-suspend;
582 regulator-suspend-microvolt = <1800000>;
583 };
584 };
585
586 vdd_0v75_s3: nldo-reg1 {
587 regulator-always-on;
588 regulator-boot-on;
589 regulator-min-microvolt = <750000>;
590 regulator-max-microvolt = <750000>;
591 regulator-ramp-delay = <12500>;
592 regulator-name = "vdd_0v75_s3";
593 regulator-state-mem {
594 regulator-on-in-suspend;
595 regulator-suspend-microvolt = <750000>;
596 };
597 };
598
599 vdd2l_0v9_ddr_s3: nldo-reg2 {
600 regulator-always-on;
601 regulator-boot-on;
602 regulator-min-microvolt = <900000>;
603 regulator-max-microvolt = <900000>;
604 regulator-name = "vdd2l_0v9_ddr_s3";
605 regulator-state-mem {
606 regulator-on-in-suspend;
607 regulator-suspend-microvolt = <900000>;
608 };
609 };
610
611 vdd_0v75_hdmi_edp_s0: nldo-reg3 {
612 regulator-always-on;
613 regulator-boot-on;
614 regulator-min-microvolt = <750000>;
615 regulator-max-microvolt = <750000>;
616 regulator-name = "vdd_0v75_hdmi_edp_s0";
617 regulator-state-mem {
618 regulator-off-in-suspend;
619 };
620 };
621
622 avdd_0v75_s0: nldo-reg4 {
623 regulator-always-on;
624 regulator-boot-on;
625 regulator-min-microvolt = <750000>;
626 regulator-max-microvolt = <750000>;
627 regulator-name = "avdd_0v75_s0";
628 regulator-state-mem {
629 regulator-off-in-suspend;
630 };
631 };
632
633 vdd_0v85_s0: nldo-reg5 {
634 regulator-always-on;
635 regulator-boot-on;
636 regulator-min-microvolt = <850000>;
637 regulator-max-microvolt = <850000>;
638 regulator-name = "vdd_0v85_s0";
639 regulator-state-mem {
640 regulator-off-in-suspend;
641 };
642 };
643 };
644 };
645
646 pmic@1 {
647 compatible = "rockchip,rk806";
648 reg = <0x01>;
649 #gpio-cells = <2>;
650 gpio-controller;
651 interrupt-parent = <&gpio0>;
652 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
653 pinctrl-0 = <&rk806_slave_dvs1_null>, <&rk806_slave_dvs2_null>,
654 <&rk806_slave_dvs3_null>;
655 pinctrl-names = "default";
656 spi-max-frequency = <1000000>;
657
658 vcc1-supply = <&vcc5v0_sys>;
659 vcc2-supply = <&vcc5v0_sys>;
660 vcc3-supply = <&vcc5v0_sys>;
661 vcc4-supply = <&vcc5v0_sys>;
662 vcc5-supply = <&vcc5v0_sys>;
663 vcc6-supply = <&vcc5v0_sys>;
664 vcc7-supply = <&vcc5v0_sys>;
665 vcc8-supply = <&vcc5v0_sys>;
666 vcc9-supply = <&vcc5v0_sys>;
667 vcc10-supply = <&vcc5v0_sys>;
668 vcc11-supply = <&vcc_2v0_pldo_s3>;
669 vcc12-supply = <&vcc5v0_sys>;
670 vcc13-supply = <&vcc_1v1_nldo_s3>;
671 vcc14-supply = <&vcc_2v0_pldo_s3>;
672 vcca-supply = <&vcc5v0_sys>;
673
674 rk806_slave_dvs1_null: dvs1-null-pins {
675 pins = "gpio_pwrctrl1";
676 function = "pin_fun0";
677 };
678
679 rk806_slave_dvs2_null: dvs2-null-pins {
680 pins = "gpio_pwrctrl2";
681 function = "pin_fun0";
682 };
683
684 rk806_slave_dvs3_null: dvs3-null-pins {
685 pins = "gpio_pwrctrl3";
686 function = "pin_fun0";
687 };
688
689 regulators {
690 vdd_cpu_big1_s0: dcdc-reg1 {
691 regulator-always-on;
692 regulator-boot-on;
693 regulator-min-microvolt = <550000>;
694 regulator-max-microvolt = <1050000>;
695 regulator-ramp-delay = <12500>;
696 regulator-name = "vdd_cpu_big1_s0";
697 regulator-state-mem {
698 regulator-off-in-suspend;
699 };
700 };
701
702 vdd_cpu_big0_s0: dcdc-reg2 {
703 regulator-always-on;
704 regulator-boot-on;
705 regulator-min-microvolt = <550000>;
706 regulator-max-microvolt = <1050000>;
707 regulator-ramp-delay = <12500>;
708 regulator-name = "vdd_cpu_big0_s0";
709 regulator-state-mem {
710 regulator-off-in-suspend;
711 };
712 };
713
714 vdd_cpu_lit_s0: dcdc-reg3 {
715 regulator-always-on;
716 regulator-boot-on;
717 regulator-min-microvolt = <550000>;
718 regulator-max-microvolt = <950000>;
719 regulator-ramp-delay = <12500>;
720 regulator-name = "vdd_cpu_lit_s0";
721 regulator-state-mem {
722 regulator-off-in-suspend;
723 };
724 };
725
726 vcc_3v3_s0: dcdc-reg4 {
727 regulator-always-on;
728 regulator-boot-on;
729 regulator-min-microvolt = <3300000>;
730 regulator-max-microvolt = <3300000>;
731 regulator-ramp-delay = <12500>;
732 regulator-name = "vcc_3v3_s0";
733 regulator-state-mem {
734 regulator-off-in-suspend;
735 };
736 };
737
738 vdd_cpu_big1_mem_s0: dcdc-reg5 {
739 regulator-always-on;
740 regulator-boot-on;
741 regulator-min-microvolt = <675000>;
742 regulator-max-microvolt = <1050000>;
743 regulator-ramp-delay = <12500>;
744 regulator-name = "vdd_cpu_big1_mem_s0";
745 regulator-state-mem {
746 regulator-off-in-suspend;
747 };
748 };
749
750
751 vdd_cpu_big0_mem_s0: dcdc-reg6 {
752 regulator-always-on;
753 regulator-boot-on;
754 regulator-min-microvolt = <675000>;
755 regulator-max-microvolt = <1050000>;
756 regulator-ramp-delay = <12500>;
757 regulator-name = "vdd_cpu_big0_mem_s0";
758 regulator-state-mem {
759 regulator-off-in-suspend;
760 };
761 };
762
763 vcc_1v8_s0: dcdc-reg7 {
764 regulator-always-on;
765 regulator-boot-on;
766 regulator-min-microvolt = <1800000>;
767 regulator-max-microvolt = <1800000>;
768 regulator-ramp-delay = <12500>;
769 regulator-name = "vcc_1v8_s0";
770 regulator-state-mem {
771 regulator-off-in-suspend;
772 };
773 };
774
775 vdd_cpu_lit_mem_s0: dcdc-reg8 {
776 regulator-always-on;
777 regulator-boot-on;
778 regulator-min-microvolt = <675000>;
779 regulator-max-microvolt = <950000>;
780 regulator-ramp-delay = <12500>;
781 regulator-name = "vdd_cpu_lit_mem_s0";
782 regulator-state-mem {
783 regulator-off-in-suspend;
784 };
785 };
786
787 vddq_ddr_s0: dcdc-reg9 {
788 regulator-always-on;
789 regulator-boot-on;
790 regulator-name = "vddq_ddr_s0";
791 regulator-state-mem {
792 regulator-off-in-suspend;
793 };
794 };
795
796 vdd_ddr_s0: dcdc-reg10 {
797 regulator-always-on;
798 regulator-boot-on;
799 regulator-min-microvolt = <675000>;
800 regulator-max-microvolt = <900000>;
801 regulator-ramp-delay = <12500>;
802 regulator-name = "vdd_ddr_s0";
803 regulator-state-mem {
804 regulator-off-in-suspend;
805 };
806 };
807
808 vcc_1v8_cam_s0: pldo-reg1 {
809 regulator-always-on;
810 regulator-boot-on;
811 regulator-min-microvolt = <1800000>;
812 regulator-max-microvolt = <1800000>;
813 regulator-ramp-delay = <12500>;
814 regulator-name = "vcc_1v8_cam_s0";
815 regulator-state-mem {
816 regulator-off-in-suspend;
817 };
818 };
819
820 avdd1v8_ddr_pll_s0: pldo-reg2 {
821 regulator-always-on;
822 regulator-boot-on;
823 regulator-min-microvolt = <1800000>;
824 regulator-max-microvolt = <1800000>;
825 regulator-ramp-delay = <12500>;
826 regulator-name = "avdd1v8_ddr_pll_s0";
827 regulator-state-mem {
828 regulator-off-in-suspend;
829 };
830 };
831
832 vdd_1v8_pll_s0: pldo-reg3 {
833 regulator-always-on;
834 regulator-boot-on;
835 regulator-min-microvolt = <1800000>;
836 regulator-max-microvolt = <1800000>;
837 regulator-ramp-delay = <12500>;
838 regulator-name = "vdd_1v8_pll_s0";
839 regulator-state-mem {
840 regulator-off-in-suspend;
841 };
842 };
843
844 vcc_3v3_sd_s0: pldo-reg4 {
845 regulator-always-on;
846 regulator-boot-on;
847 regulator-min-microvolt = <3300000>;
848 regulator-max-microvolt = <3300000>;
849 regulator-ramp-delay = <12500>;
850 regulator-name = "vcc_3v3_sd_s0";
851 regulator-state-mem {
852 regulator-off-in-suspend;
853 };
854 };
855
856 vcc_2v8_cam_s0: pldo-reg5 {
857 regulator-always-on;
858 regulator-boot-on;
859 regulator-min-microvolt = <2800000>;
860 regulator-max-microvolt = <2800000>;
861 regulator-ramp-delay = <12500>;
862 regulator-name = "vcc_2v8_cam_s0";
863 regulator-state-mem {
864 regulator-off-in-suspend;
865 };
866 };
867
868 pldo6_s3: pldo-reg6 {
869 regulator-always-on;
870 regulator-boot-on;
871 regulator-min-microvolt = <1800000>;
872 regulator-max-microvolt = <1800000>;
873 regulator-name = "pldo6_s3";
874 regulator-state-mem {
875 regulator-on-in-suspend;
876 regulator-suspend-microvolt = <1800000>;
877 };
878 };
879
880 vdd_0v75_pll_s0: nldo-reg1 {
881 regulator-always-on;
882 regulator-boot-on;
883 regulator-min-microvolt = <750000>;
884 regulator-max-microvolt = <750000>;
885 regulator-ramp-delay = <12500>;
886 regulator-name = "vdd_0v75_pll_s0";
887 regulator-state-mem {
888 regulator-off-in-suspend;
889 };
890 };
891
892 vdd_ddr_pll_s0: nldo-reg2 {
893 regulator-always-on;
894 regulator-boot-on;
895 regulator-min-microvolt = <850000>;
896 regulator-max-microvolt = <850000>;
897 regulator-name = "vdd_ddr_pll_s0";
898 regulator-state-mem {
899 regulator-off-in-suspend;
900 };
901 };
902
903 avdd_0v85_s0: nldo-reg3 {
904 regulator-always-on;
905 regulator-boot-on;
906 regulator-min-microvolt = <850000>;
907 regulator-max-microvolt = <850000>;
908 regulator-ramp-delay = <12500>;
909 regulator-name = "avdd_0v85_s0";
910 regulator-state-mem {
911 regulator-off-in-suspend;
912 };
913 };
914
915 avdd_1v2_cam_s0: nldo-reg4 {
916 regulator-always-on;
917 regulator-boot-on;
918 regulator-min-microvolt = <1200000>;
919 regulator-max-microvolt = <1200000>;
920 regulator-ramp-delay = <12500>;
921 regulator-name = "avdd_1v2_cam_s0";
922 regulator-state-mem {
923 regulator-off-in-suspend;
924 };
925 };
926
927 avdd_1v2_s0: nldo-reg5 {
928 regulator-always-on;
929 regulator-boot-on;
930 regulator-min-microvolt = <1200000>;
931 regulator-max-microvolt = <1200000>;
932 regulator-ramp-delay = <12500>;
933 regulator-name = "avdd_1v2_s0";
934 regulator-state-mem {
935 regulator-off-in-suspend;
936 };
937 };
938 };
939 };
940};
941
942&sata0 {
943 status = "okay";
944};
945
946&u2phy2 {
947 status = "okay";
948};
949
950&u2phy2_host {
951 phy-supply = <&vcc5v0_host>;
952 status = "okay";
953};
954
955&u2phy3 {
956 status = "okay";
957};
958
959&u2phy3_host {
960 phy-supply = <&vcc5v0_host>;
961 status = "okay";
962};
963
Kever Yange25c0452023-03-02 15:12:57 +0800[diff] [blame]964&uart2 {
965 pinctrl-0 = <&uart2m0_xfer>;
966 status = "okay";
967};
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900[diff] [blame]968
969&usb_host0_ehci {
970 status = "okay";
971};
972
973&usb_host0_ohci {
974 status = "okay";
975};
976
977&usb_host1_ehci {
978 status = "okay";
979};
980
981&usb_host1_ohci {
982 status = "okay";
983};