blob: c0b0bd6f2c7821669bbaa90d6f996ebfe2059180 [file] [log] [blame]
Hou Zhiqiang7c3f83d2019-08-20 09:35:24 +00001// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * T2080RDB Device Tree Source
4 *
5 * Copyright 2013 - 2015 Freescale Semiconductor Inc.
Camelia Groza15300482023-07-11 15:49:16 +03006 * Copyright 2019-2023 NXP
Hou Zhiqiang7c3f83d2019-08-20 09:35:24 +00007 */
8
9/include/ "t2080.dtsi"
10
11/ {
12 model = "fsl,T2080RDB";
13 compatible = "fsl,T2080RDB";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&mpic>;
Xiaowei Bao258f3692020-06-04 23:16:58 +080017
18 aliases {
19 spi0 = &espi0;
Camelia Groza15300482023-07-11 15:49:16 +030020 serial0 = &serial0;
21 serial1 = &serial1;
22 serial2 = &serial2;
23 serial3 = &serial3;
Xiaowei Bao258f3692020-06-04 23:16:58 +080024 };
25};
26
Camelia Groza621bd512021-04-13 19:47:56 +030027&soc {
28 fman@400000 {
29 ethernet@e0000 {
30 phy-handle = <&xg_aq1202_phy3>;
31 phy-connection-type = "xgmii";
32 };
33
34 ethernet@e2000 {
35 phy-handle = <&xg_aq1202_phy4>;
36 phy-connection-type = "xgmii";
37 };
38
39 ethernet@e4000 {
40 phy-handle = <&rgmii_phy1>;
41 phy-connection-type = "rgmii";
42 };
43
44 ethernet@e6000 {
45 phy-handle = <&rgmii_phy2>;
46 phy-connection-type = "rgmii";
47 };
48
49 ethernet@f0000 {
50 phy-handle = <&xg_cs4315_phy2>;
51 phy-connection-type = "xgmii";
52 };
53
54 ethernet@f2000 {
55 phy-handle = <&xg_cs4315_phy1>;
56 phy-connection-type = "xgmii";
57 };
58
59 mdio@fc000 {
60 rgmii_phy1: ethernet-phy@1 {
61 reg = <0x1>;
62 };
63 rgmii_phy2: ethernet-phy@2 {
64 reg = <0x2>;
65 };
66 };
67
68 mdio@fd000 {
69 xg_cs4315_phy1: ethernet-phy@c {
70 compatible = "ethernet-phy-id13e5.1002";
71 reg = <0xc>;
72 };
73
74 xg_cs4315_phy2: ethernet-phy@d {
75 compatible = "ethernet-phy-id13e5.1002";
76 reg = <0xd>;
77 };
78
79 xg_aq1202_phy3: ethernet-phy@0 {
80 compatible = "ethernet-phy-ieee802.3-c45";
81 reg = <0x0>;
82 };
83
Camelia Groza9bf4db62021-06-11 15:28:08 +030084#ifdef CONFIG_T2080RDB_REV_D
85 xg_aq1202_phy4: ethernet-phy@8 {
86 compatible = "ethernet-phy-ieee802.3-c45";
87 reg = <0x8>;
88 };
89#else
Camelia Groza621bd512021-04-13 19:47:56 +030090 xg_aq1202_phy4: ethernet-phy@1 {
91 compatible = "ethernet-phy-ieee802.3-c45";
92 reg = <0x1>;
93 };
Camelia Groza9bf4db62021-06-11 15:28:08 +030094#endif
Camelia Groza621bd512021-04-13 19:47:56 +030095 };
96 };
97};
98
Xiaowei Bao258f3692020-06-04 23:16:58 +080099&espi0 {
100 status = "okay";
101 flash@0 {
102 compatible = "jedec,spi-nor"; /* 16MB */
103 #address-cells = <1>;
104 #size-cells = <1>;
105 reg = <0>;
106 spi-max-frequency = <10000000>; /* input clock */
107 };
Hou Zhiqiang7c3f83d2019-08-20 09:35:24 +0000108};
Chris Packham92790a52021-03-03 14:09:45 +1300109
110&i2c0 {
111 status = "okay";
112 rtc@68 {
113 compatible = "dallas,ds1339";
114 reg = <0x68>;
115 };
116};
Camelia Groza621bd512021-04-13 19:47:56 +0300117
118/include/ "t2080si-post.dtsi"