Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2016 Freescale Semiconductor |
Yangbo Lu | bb32e68 | 2021-06-03 10:51:19 +0800 | [diff] [blame] | 4 | * Copyright 2019-2021 NXP |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __LS1046A_COMMON_H |
| 8 | #define __LS1046A_COMMON_H |
| 9 | |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 10 | /* SPL build */ |
| 11 | #ifdef CONFIG_SPL_BUILD |
| 12 | #define SPL_NO_QBMAN |
| 13 | #define SPL_NO_FMAN |
| 14 | #define SPL_NO_ENV |
| 15 | #define SPL_NO_MISC |
| 16 | #define SPL_NO_QSPI |
| 17 | #define SPL_NO_USB |
| 18 | #define SPL_NO_SATA |
| 19 | #endif |
York Sun | 3e512d8 | 2018-06-26 14:48:29 -0700 | [diff] [blame] | 20 | #if defined(CONFIG_SPL_BUILD) && \ |
| 21 | (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT)) |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 22 | #define SPL_NO_MMC |
| 23 | #endif |
York Sun | c5c8e1e | 2018-06-08 16:37:27 -0700 | [diff] [blame] | 24 | #if defined(CONFIG_SPL_BUILD) && \ |
York Sun | c5c8e1e | 2018-06-08 16:37:27 -0700 | [diff] [blame] | 25 | !defined(CONFIG_SPL_FSL_LS_PPA) |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 26 | #define SPL_NO_IFC |
| 27 | #endif |
| 28 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 29 | #include <asm/arch/config.h> |
Bharat Bhushan | c882dd7 | 2017-03-22 12:06:28 +0530 | [diff] [blame] | 30 | #include <asm/arch/stream_id_lsch2.h> |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 31 | |
| 32 | /* Link Definitions */ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 33 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 34 | #define CONFIG_VERY_BIG_RAM |
| 35 | #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 |
| 36 | #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 |
| 37 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE |
| 38 | #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL |
| 39 | |
Michael Walle | f056e0f | 2020-06-01 21:53:26 +0200 | [diff] [blame] | 40 | #define CPU_RELEASE_ADDR secondary_boot_addr |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 41 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 42 | /* Serial Port */ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 43 | #define CONFIG_SYS_NS16550_SERIAL |
| 44 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
Hou Zhiqiang | 3f91cda | 2017-01-10 16:44:15 +0800 | [diff] [blame] | 45 | #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 46 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 47 | /* SD boot SPL */ |
| 48 | #ifdef CONFIG_SD_BOOT |
Udit Agarwal | 22ec238 | 2019-11-07 16:11:32 +0000 | [diff] [blame] | 49 | #ifdef CONFIG_NXP_ESBC |
Ruchika Gupta | 0009c8f | 2017-04-17 18:07:19 +0530 | [diff] [blame] | 50 | #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) |
| 51 | /* |
| 52 | * HDR would be appended at end of image and copied to DDR along |
| 53 | * with U-Boot image. Here u-boot max. size is 512K. So if binary |
| 54 | * size increases then increase this size in case of secure boot as |
| 55 | * it uses raw u-boot image instead of fit image. |
| 56 | */ |
| 57 | #define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) |
| 58 | #else |
| 59 | #define CONFIG_SYS_MONITOR_LEN 0x100000 |
Udit Agarwal | 22ec238 | 2019-11-07 16:11:32 +0000 | [diff] [blame] | 60 | #endif /* ifdef CONFIG_NXP_ESBC */ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 61 | #endif |
| 62 | |
York Sun | 3e512d8 | 2018-06-26 14:48:29 -0700 | [diff] [blame] | 63 | #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL) |
York Sun | 3e512d8 | 2018-06-26 14:48:29 -0700 | [diff] [blame] | 64 | #define CONFIG_SYS_MONITOR_LEN 0x100000 |
York Sun | 3e512d8 | 2018-06-26 14:48:29 -0700 | [diff] [blame] | 65 | #endif |
| 66 | |
Shaohui Xie | 085ac1c | 2016-09-07 17:56:14 +0800 | [diff] [blame] | 67 | /* NAND SPL */ |
| 68 | #ifdef CONFIG_NAND_BOOT |
Shaohui Xie | 085ac1c | 2016-09-07 17:56:14 +0800 | [diff] [blame] | 69 | #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE |
| 70 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
| 71 | |
Shaohui Xie | 085ac1c | 2016-09-07 17:56:14 +0800 | [diff] [blame] | 72 | #define CONFIG_SYS_MONITOR_LEN 0xa0000 |
| 73 | #endif |
| 74 | |
Biwen Li | 479b9bd | 2021-02-05 19:02:01 +0800 | [diff] [blame] | 75 | /* GPIO */ |
Biwen Li | 479b9bd | 2021-02-05 19:02:01 +0800 | [diff] [blame] | 76 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 77 | /* I2C */ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 78 | |
Yuantian Tang | d24716d | 2018-01-03 15:53:09 +0800 | [diff] [blame] | 79 | /* SATA */ |
| 80 | #ifndef SPL_NO_SATA |
Yuantian Tang | d24716d | 2018-01-03 15:53:09 +0800 | [diff] [blame] | 81 | #define CONFIG_SYS_SATA AHCI_BASE_ADDR |
Yuantian Tang | d24716d | 2018-01-03 15:53:09 +0800 | [diff] [blame] | 82 | #endif |
| 83 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 84 | /* FMan ucode */ |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 85 | #ifndef SPL_NO_FMAN |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 86 | #define CONFIG_SYS_DPAA_FMAN |
| 87 | #ifdef CONFIG_SYS_DPAA_FMAN |
| 88 | #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 89 | #endif |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 90 | #endif |
| 91 | |
| 92 | /* Miscellaneous configurable options */ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 93 | |
| 94 | #define CONFIG_HWCONFIG |
| 95 | #define HWCONFIG_BUFFER_SIZE 128 |
| 96 | |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 97 | #define BOOT_TARGET_DEVICES(func) \ |
Yuantian Tang | d24716d | 2018-01-03 15:53:09 +0800 | [diff] [blame] | 98 | func(SCSI, scsi, 0) \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 99 | func(MMC, mmc, 0) \ |
Mian Yousaf Kaukab | e172158 | 2019-01-29 16:38:37 +0100 | [diff] [blame] | 100 | func(USB, usb, 0) \ |
| 101 | func(DHCP, dhcp, na) |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 102 | #include <config_distro_bootcmd.h> |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 103 | |
Vabhav Sharma | 5164191 | 2019-06-06 12:35:28 +0000 | [diff] [blame] | 104 | #if defined(CONFIG_TARGET_LS1046AFRWY) |
| 105 | #define LS1046A_BOOT_SRC_AND_HDR\ |
| 106 | "boot_scripts=ls1046afrwy_boot.scr\0" \ |
| 107 | "boot_script_hdr=hdr_ls1046afrwy_bs.out\0" |
Biwen Li | 88dd2e8 | 2020-04-20 18:29:06 +0800 | [diff] [blame] | 108 | #elif defined(CONFIG_TARGET_LS1046AQDS) |
| 109 | #define LS1046A_BOOT_SRC_AND_HDR\ |
| 110 | "boot_scripts=ls1046aqds_boot.scr\0" \ |
| 111 | "boot_script_hdr=hdr_ls1046aqds_bs.out\0" |
Vabhav Sharma | 5164191 | 2019-06-06 12:35:28 +0000 | [diff] [blame] | 112 | #else |
| 113 | #define LS1046A_BOOT_SRC_AND_HDR\ |
| 114 | "boot_scripts=ls1046ardb_boot.scr\0" \ |
| 115 | "boot_script_hdr=hdr_ls1046ardb_bs.out\0" |
| 116 | #endif |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 117 | #ifndef SPL_NO_MISC |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 118 | /* Initial environment variables */ |
| 119 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 120 | "hwconfig=fsl_ddr:bank_intlv=auto\0" \ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 121 | "ramdisk_addr=0x800000\0" \ |
| 122 | "ramdisk_size=0x2000000\0" \ |
Yuantian Tang | e1786d3 | 2020-02-19 17:02:22 +0800 | [diff] [blame] | 123 | "bootm_size=0x10000000\0" \ |
Biwen Li | 88dd2e8 | 2020-04-20 18:29:06 +0800 | [diff] [blame] | 124 | "kernel_addr=0x61000000\0" \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 125 | "scriptaddr=0x80000000\0" \ |
Sumit Garg | 860a3bd | 2017-06-06 20:50:29 +0530 | [diff] [blame] | 126 | "scripthdraddr=0x80080000\0" \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 127 | "fdtheader_addr_r=0x80100000\0" \ |
| 128 | "kernelheader_addr_r=0x80200000\0" \ |
| 129 | "load_addr=0xa0000000\0" \ |
Sumit Garg | 860a3bd | 2017-06-06 20:50:29 +0530 | [diff] [blame] | 130 | "kernel_addr_r=0x81000000\0" \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 131 | "fdt_addr_r=0x90000000\0" \ |
| 132 | "ramdisk_addr_r=0xa0000000\0" \ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 133 | "kernel_start=0x1000000\0" \ |
Priyanka Singh | a83b8db | 2020-01-22 10:29:46 +0000 | [diff] [blame] | 134 | "kernelheader_start=0x600000\0" \ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 135 | "kernel_load=0xa0000000\0" \ |
| 136 | "kernel_size=0x2800000\0" \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 137 | "kernelheader_size=0x40000\0" \ |
Shengzhou Liu | 47e7e03 | 2017-11-09 17:57:56 +0800 | [diff] [blame] | 138 | "kernel_addr_sd=0x8000\0" \ |
| 139 | "kernel_size_sd=0x14000\0" \ |
Priyanka Singh | a83b8db | 2020-01-22 10:29:46 +0000 | [diff] [blame] | 140 | "kernelhdr_addr_sd=0x3000\0" \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 141 | "kernelhdr_size_sd=0x10\0" \ |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 142 | "console=ttyS0,115200\0" \ |
Tom Rini | 5ad8e11 | 2017-10-22 17:55:07 -0400 | [diff] [blame] | 143 | CONFIG_MTDPARTS_DEFAULT "\0" \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 144 | BOOTENV \ |
Vabhav Sharma | 5164191 | 2019-06-06 12:35:28 +0000 | [diff] [blame] | 145 | LS1046A_BOOT_SRC_AND_HDR \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 146 | "scan_dev_for_boot_part=" \ |
| 147 | "part list ${devtype} ${devnum} devplist; " \ |
| 148 | "env exists devplist || setenv devplist 1; " \ |
| 149 | "for distro_bootpart in ${devplist}; do " \ |
| 150 | "if fstype ${devtype} " \ |
| 151 | "${devnum}:${distro_bootpart} " \ |
| 152 | "bootfstype; then " \ |
| 153 | "run scan_dev_for_boot; " \ |
| 154 | "fi; " \ |
| 155 | "done\0" \ |
Sumit Garg | 860a3bd | 2017-06-06 20:50:29 +0530 | [diff] [blame] | 156 | "boot_a_script=" \ |
| 157 | "load ${devtype} ${devnum}:${distro_bootpart} " \ |
| 158 | "${scriptaddr} ${prefix}${script}; " \ |
| 159 | "env exists secureboot && load ${devtype} " \ |
| 160 | "${devnum}:${distro_bootpart} " \ |
Vinitha V Pillai | 25355ec | 2019-04-23 05:52:17 +0000 | [diff] [blame] | 161 | "${scripthdraddr} ${prefix}${boot_script_hdr}; " \ |
| 162 | "env exists secureboot " \ |
| 163 | "&& esbc_validate ${scripthdraddr};" \ |
Sumit Garg | 860a3bd | 2017-06-06 20:50:29 +0530 | [diff] [blame] | 164 | "source ${scriptaddr}\0" \ |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 165 | "qspi_bootcmd=echo Trying load from qspi..;" \ |
| 166 | "sf probe && sf read $load_addr " \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 167 | "$kernel_start $kernel_size; env exists secureboot " \ |
| 168 | "&& sf read $kernelheader_addr_r $kernelheader_start " \ |
| 169 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ |
| 170 | "bootm $load_addr#$board\0" \ |
Biwen Li | 88dd2e8 | 2020-04-20 18:29:06 +0800 | [diff] [blame] | 171 | "nand_bootcmd=echo Trying load from nand..;" \ |
| 172 | "nand info; nand read $load_addr " \ |
| 173 | "$kernel_start $kernel_size; env exists secureboot " \ |
| 174 | "&& nand read $kernelheader_addr_r $kernelheader_start " \ |
| 175 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ |
| 176 | "bootm $load_addr#$board\0" \ |
| 177 | "nor_bootcmd=echo Trying load from nor..;" \ |
| 178 | "cp.b $kernel_addr $load_addr " \ |
| 179 | "$kernel_size; env exists secureboot " \ |
| 180 | "&& cp.b $kernelheader_addr $kernelheader_addr_r " \ |
| 181 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ |
| 182 | "bootm $load_addr#$board\0" \ |
Shengzhou Liu | 47e7e03 | 2017-11-09 17:57:56 +0800 | [diff] [blame] | 183 | "sd_bootcmd=echo Trying load from SD ..;" \ |
| 184 | "mmcinfo; mmc read $load_addr " \ |
| 185 | "$kernel_addr_sd $kernel_size_sd && " \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 186 | "env exists secureboot && mmc read $kernelheader_addr_r " \ |
| 187 | "$kernelhdr_addr_sd $kernelhdr_size_sd " \ |
| 188 | " && esbc_validate ${kernelheader_addr_r};" \ |
Shengzhou Liu | 47e7e03 | 2017-11-09 17:57:56 +0800 | [diff] [blame] | 189 | "bootm $load_addr#$board\0" |
Qianyu Gong | 6264ab6 | 2017-06-15 11:10:09 +0800 | [diff] [blame] | 190 | |
Sumit Garg | c064fc7 | 2017-03-30 09:53:13 +0530 | [diff] [blame] | 191 | #endif |
| 192 | |
Simon Glass | 89e0a3a | 2017-05-17 08:23:10 -0600 | [diff] [blame] | 193 | #include <asm/arch/soc.h> |
| 194 | |
Mingkai Hu | d239651 | 2016-09-07 18:47:28 +0800 | [diff] [blame] | 195 | #endif /* __LS1046A_COMMON_H */ |