Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 Google, Inc |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <debug_uart.h> |
| 8 | #include <dm.h> |
| 9 | #include <fdtdec.h> |
Wadim Egorov | 6ee2d01 | 2017-06-19 12:36:40 +0200 | [diff] [blame] | 10 | #include <i2c.h> |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 11 | #include <led.h> |
| 12 | #include <malloc.h> |
| 13 | #include <ram.h> |
| 14 | #include <spl.h> |
| 15 | #include <asm/gpio.h> |
| 16 | #include <asm/io.h> |
Heiko Stübner | 5c43acb | 2017-02-18 19:46:26 +0100 | [diff] [blame] | 17 | #include <asm/arch/bootrom.h> |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 18 | #include <asm/arch/clock.h> |
| 19 | #include <asm/arch/hardware.h> |
| 20 | #include <asm/arch/periph.h> |
Jagan Teki | 536e4d3 | 2017-09-27 23:03:14 +0530 | [diff] [blame] | 21 | #include <asm/arch/pmu_rk3288.h> |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 22 | #include <asm/arch/sdram.h> |
Jagan Teki | 536e4d3 | 2017-09-27 23:03:14 +0530 | [diff] [blame] | 23 | #include <asm/arch/sdram_common.h> |
Jagan Teki | b0f5295 | 2017-09-27 23:03:11 +0530 | [diff] [blame] | 24 | #include <asm/arch/sys_proto.h> |
huang lin | 8db3e24 | 2015-11-17 14:20:09 +0800 | [diff] [blame] | 25 | #include <asm/arch/timer.h> |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 26 | #include <dm/pinctrl.h> |
| 27 | #include <dm/root.h> |
| 28 | #include <dm/test.h> |
| 29 | #include <dm/util.h> |
| 30 | #include <power/regulator.h> |
Wadim Egorov | 6ee2d01 | 2017-06-19 12:36:40 +0200 | [diff] [blame] | 31 | #include <power/rk8xx_pmic.h> |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 32 | |
| 33 | DECLARE_GLOBAL_DATA_PTR; |
| 34 | |
| 35 | u32 spl_boot_device(void) |
| 36 | { |
Simon Glass | 26158ef | 2016-07-04 11:58:32 -0600 | [diff] [blame] | 37 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 38 | const void *blob = gd->fdt_blob; |
| 39 | struct udevice *dev; |
| 40 | const char *bootdev; |
| 41 | int node; |
| 42 | int ret; |
| 43 | |
| 44 | bootdev = fdtdec_get_config_string(blob, "u-boot,boot0"); |
| 45 | debug("Boot device %s\n", bootdev); |
| 46 | if (!bootdev) |
| 47 | goto fallback; |
| 48 | |
| 49 | node = fdt_path_offset(blob, bootdev); |
| 50 | if (node < 0) { |
| 51 | debug("node=%d\n", node); |
| 52 | goto fallback; |
| 53 | } |
Jean-Jacques Hiblot | a7b0d6a | 2018-08-09 16:17:44 +0200 | [diff] [blame] | 54 | ret = device_get_global_by_ofnode(offset_to_ofnode(node), &dev); |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 55 | if (ret) { |
| 56 | debug("device at node %s/%d not found: %d\n", bootdev, node, |
| 57 | ret); |
| 58 | goto fallback; |
| 59 | } |
| 60 | debug("Found device %s\n", dev->name); |
| 61 | switch (device_get_uclass_id(dev)) { |
| 62 | case UCLASS_SPI_FLASH: |
| 63 | return BOOT_DEVICE_SPI; |
| 64 | case UCLASS_MMC: |
| 65 | return BOOT_DEVICE_MMC1; |
| 66 | default: |
| 67 | debug("Booting from device uclass '%s' not supported\n", |
| 68 | dev_get_uclass_name(dev)); |
| 69 | } |
| 70 | |
| 71 | fallback: |
Simon Glass | bf8d7bf | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 72 | #elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ |
Simon Glass | e51b2e7 | 2016-11-13 14:24:54 -0700 | [diff] [blame] | 73 | defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ |
Marty E. Plummer | 2708698 | 2019-01-05 20:12:08 -0600 | [diff] [blame] | 74 | defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \ |
| 75 | defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) |
Simon Glass | 6f9087c | 2016-11-13 14:21:57 -0700 | [diff] [blame] | 76 | return BOOT_DEVICE_SPI; |
Simon Glass | 26158ef | 2016-07-04 11:58:32 -0600 | [diff] [blame] | 77 | #endif |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 78 | return BOOT_DEVICE_MMC1; |
| 79 | } |
| 80 | |
Wadim Egorov | 6ee2d01 | 2017-06-19 12:36:40 +0200 | [diff] [blame] | 81 | #if !defined(CONFIG_SPL_OF_PLATDATA) |
| 82 | static int phycore_init(void) |
| 83 | { |
| 84 | struct udevice *pmic; |
| 85 | int ret; |
| 86 | |
| 87 | ret = uclass_first_device_err(UCLASS_PMIC, &pmic); |
| 88 | if (ret) |
| 89 | return ret; |
| 90 | |
| 91 | #if defined(CONFIG_SPL_POWER_SUPPORT) |
| 92 | /* Increase USB input current to 2A */ |
| 93 | ret = rk818_spl_configure_usb_input_current(pmic, 2000); |
| 94 | if (ret) |
| 95 | return ret; |
| 96 | |
| 97 | /* Close charger when USB lower then 3.26V */ |
| 98 | ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000); |
| 99 | if (ret) |
| 100 | return ret; |
| 101 | #endif |
| 102 | |
| 103 | return 0; |
| 104 | } |
| 105 | #endif |
| 106 | |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 107 | void board_init_f(ulong dummy) |
| 108 | { |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 109 | struct udevice *dev; |
| 110 | int ret; |
| 111 | |
| 112 | /* Example code showing how to enable the debug UART on RK3288 */ |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 113 | #include <asm/arch/grf_rk3288.h> |
| 114 | /* Enable early UART on the RK3288 */ |
| 115 | #define GRF_BASE 0xff770000 |
| 116 | struct rk3288_grf * const grf = (void *)GRF_BASE; |
| 117 | |
| 118 | rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT | |
| 119 | GPIO7C6_MASK << GPIO7C6_SHIFT, |
| 120 | GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT | |
| 121 | GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); |
| 122 | /* |
| 123 | * Debug UART can be used from here if required: |
| 124 | * |
| 125 | * debug_uart_init(); |
| 126 | * printch('a'); |
| 127 | * printhex8(0x1234); |
| 128 | * printascii("string"); |
| 129 | */ |
| 130 | debug_uart_init(); |
Eddie Cai | 9d62e82 | 2017-04-18 19:17:27 +0800 | [diff] [blame] | 131 | debug("\nspl:debug uart enabled in %s\n", __func__); |
Eddie Cai | 3e2b61c | 2017-03-15 08:43:29 -0600 | [diff] [blame] | 132 | ret = spl_early_init(); |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 133 | if (ret) { |
Eddie Cai | 3e2b61c | 2017-03-15 08:43:29 -0600 | [diff] [blame] | 134 | debug("spl_early_init() failed: %d\n", ret); |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 135 | hang(); |
| 136 | } |
| 137 | |
huang lin | 8db3e24 | 2015-11-17 14:20:09 +0800 | [diff] [blame] | 138 | rockchip_timer_init(); |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 139 | configure_l2ctlr(); |
| 140 | |
Simon Glass | ae8fe41 | 2016-07-17 15:23:17 -0600 | [diff] [blame] | 141 | ret = rockchip_get_clk(&dev); |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 142 | if (ret) { |
| 143 | debug("CLK init failed: %d\n", ret); |
| 144 | return; |
| 145 | } |
| 146 | |
Wadim Egorov | 6ee2d01 | 2017-06-19 12:36:40 +0200 | [diff] [blame] | 147 | #if !defined(CONFIG_SPL_OF_PLATDATA) |
| 148 | if (of_machine_is_compatible("phytec,rk3288-phycore-som")) { |
| 149 | ret = phycore_init(); |
| 150 | if (ret) { |
| 151 | debug("Failed to set up phycore power settings: %d\n", |
| 152 | ret); |
| 153 | return; |
| 154 | } |
| 155 | } |
| 156 | #endif |
| 157 | |
Jagan Teki | 387fd4b | 2017-09-27 23:03:12 +0530 | [diff] [blame] | 158 | #if !defined(CONFIG_SUPPORT_TPL) |
Eddie Cai | 9d62e82 | 2017-04-18 19:17:27 +0800 | [diff] [blame] | 159 | debug("\nspl:init dram\n"); |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 160 | ret = uclass_get_device(UCLASS_RAM, 0, &dev); |
| 161 | if (ret) { |
| 162 | debug("DRAM init failed: %d\n", ret); |
| 163 | return; |
| 164 | } |
Jagan Teki | 387fd4b | 2017-09-27 23:03:12 +0530 | [diff] [blame] | 165 | #endif |
| 166 | |
Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 167 | #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) |
Philipp Tomsich | 7234c73 | 2017-10-10 16:21:16 +0200 | [diff] [blame] | 168 | back_to_bootrom(BROM_BOOT_NEXTSTAGE); |
Xu Ziyuan | 5401eb8 | 2016-07-12 19:09:49 +0800 | [diff] [blame] | 169 | #endif |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 170 | } |
| 171 | |
| 172 | static int setup_led(void) |
| 173 | { |
| 174 | #ifdef CONFIG_SPL_LED |
| 175 | struct udevice *dev; |
| 176 | char *led_name; |
| 177 | int ret; |
| 178 | |
| 179 | led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led"); |
| 180 | if (!led_name) |
| 181 | return 0; |
| 182 | ret = led_get_by_label(led_name, &dev); |
| 183 | if (ret) { |
| 184 | debug("%s: get=%d\n", __func__, ret); |
| 185 | return ret; |
| 186 | } |
| 187 | ret = led_set_on(dev, 1); |
| 188 | if (ret) |
| 189 | return ret; |
| 190 | #endif |
| 191 | |
| 192 | return 0; |
| 193 | } |
| 194 | |
| 195 | void spl_board_init(void) |
| 196 | { |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 197 | int ret; |
| 198 | |
| 199 | ret = setup_led(); |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 200 | if (ret) { |
| 201 | debug("LED ret=%d\n", ret); |
| 202 | hang(); |
| 203 | } |
| 204 | |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 205 | preloader_console_init(); |
Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 206 | #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) |
Philipp Tomsich | 7234c73 | 2017-10-10 16:21:16 +0200 | [diff] [blame] | 207 | back_to_bootrom(BROM_BOOT_NEXTSTAGE); |
Sandy Patterson | a9e92ee | 2016-08-10 10:21:47 -0400 | [diff] [blame] | 208 | #endif |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 209 | return; |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 210 | } |
Jagan Teki | 536e4d3 | 2017-09-27 23:03:14 +0530 | [diff] [blame] | 211 | |
| 212 | #ifdef CONFIG_SPL_OS_BOOT |
| 213 | |
| 214 | #define PMU_BASE 0xff730000 |
| 215 | int dram_init_banksize(void) |
| 216 | { |
| 217 | struct rk3288_pmu *const pmu = (void *)PMU_BASE; |
| 218 | size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]); |
| 219 | |
| 220 | gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; |
| 221 | gd->bd->bi_dram[0].size = size; |
| 222 | |
| 223 | return 0; |
| 224 | } |
| 225 | #endif |