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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass2cffe662015-08-30 16:55:38 -06002/*
3 * (C) Copyright 2015 Google, Inc
Simon Glass2cffe662015-08-30 16:55:38 -06004 */
5
6#include <common.h>
7#include <debug_uart.h>
8#include <dm.h>
9#include <fdtdec.h>
Wadim Egorov6ee2d012017-06-19 12:36:40 +020010#include <i2c.h>
Simon Glass2cffe662015-08-30 16:55:38 -060011#include <led.h>
12#include <malloc.h>
13#include <ram.h>
14#include <spl.h>
15#include <asm/gpio.h>
16#include <asm/io.h>
Heiko Stübner5c43acb2017-02-18 19:46:26 +010017#include <asm/arch/bootrom.h>
Simon Glass2cffe662015-08-30 16:55:38 -060018#include <asm/arch/clock.h>
19#include <asm/arch/hardware.h>
20#include <asm/arch/periph.h>
Jagan Teki536e4d32017-09-27 23:03:14 +053021#include <asm/arch/pmu_rk3288.h>
Simon Glass2cffe662015-08-30 16:55:38 -060022#include <asm/arch/sdram.h>
Jagan Teki536e4d32017-09-27 23:03:14 +053023#include <asm/arch/sdram_common.h>
Jagan Tekib0f52952017-09-27 23:03:11 +053024#include <asm/arch/sys_proto.h>
huang lin8db3e242015-11-17 14:20:09 +080025#include <asm/arch/timer.h>
Simon Glass2cffe662015-08-30 16:55:38 -060026#include <dm/pinctrl.h>
27#include <dm/root.h>
28#include <dm/test.h>
29#include <dm/util.h>
30#include <power/regulator.h>
Wadim Egorov6ee2d012017-06-19 12:36:40 +020031#include <power/rk8xx_pmic.h>
Simon Glass2cffe662015-08-30 16:55:38 -060032
33DECLARE_GLOBAL_DATA_PTR;
34
35u32 spl_boot_device(void)
36{
Simon Glass26158ef2016-07-04 11:58:32 -060037#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Simon Glass2cffe662015-08-30 16:55:38 -060038 const void *blob = gd->fdt_blob;
39 struct udevice *dev;
40 const char *bootdev;
41 int node;
42 int ret;
43
44 bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
45 debug("Boot device %s\n", bootdev);
46 if (!bootdev)
47 goto fallback;
48
49 node = fdt_path_offset(blob, bootdev);
50 if (node < 0) {
51 debug("node=%d\n", node);
52 goto fallback;
53 }
Jean-Jacques Hiblota7b0d6a2018-08-09 16:17:44 +020054 ret = device_get_global_by_ofnode(offset_to_ofnode(node), &dev);
Simon Glass2cffe662015-08-30 16:55:38 -060055 if (ret) {
56 debug("device at node %s/%d not found: %d\n", bootdev, node,
57 ret);
58 goto fallback;
59 }
60 debug("Found device %s\n", dev->name);
61 switch (device_get_uclass_id(dev)) {
62 case UCLASS_SPI_FLASH:
63 return BOOT_DEVICE_SPI;
64 case UCLASS_MMC:
65 return BOOT_DEVICE_MMC1;
66 default:
67 debug("Booting from device uclass '%s' not supported\n",
68 dev_get_uclass_name(dev));
69 }
70
71fallback:
Simon Glassbf8d7bf2016-11-13 14:22:16 -070072#elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
Simon Glasse51b2e72016-11-13 14:24:54 -070073 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
Marty E. Plummer27086982019-01-05 20:12:08 -060074 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
75 defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY)
Simon Glass6f9087c2016-11-13 14:21:57 -070076 return BOOT_DEVICE_SPI;
Simon Glass26158ef2016-07-04 11:58:32 -060077#endif
Simon Glass2cffe662015-08-30 16:55:38 -060078 return BOOT_DEVICE_MMC1;
79}
80
Wadim Egorov6ee2d012017-06-19 12:36:40 +020081#if !defined(CONFIG_SPL_OF_PLATDATA)
82static int phycore_init(void)
83{
84 struct udevice *pmic;
85 int ret;
86
87 ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
88 if (ret)
89 return ret;
90
91#if defined(CONFIG_SPL_POWER_SUPPORT)
92 /* Increase USB input current to 2A */
93 ret = rk818_spl_configure_usb_input_current(pmic, 2000);
94 if (ret)
95 return ret;
96
97 /* Close charger when USB lower then 3.26V */
98 ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
99 if (ret)
100 return ret;
101#endif
102
103 return 0;
104}
105#endif
106
Simon Glass2cffe662015-08-30 16:55:38 -0600107void board_init_f(ulong dummy)
108{
Simon Glass2cffe662015-08-30 16:55:38 -0600109 struct udevice *dev;
110 int ret;
111
112 /* Example code showing how to enable the debug UART on RK3288 */
Simon Glass2cffe662015-08-30 16:55:38 -0600113#include <asm/arch/grf_rk3288.h>
114 /* Enable early UART on the RK3288 */
115#define GRF_BASE 0xff770000
116 struct rk3288_grf * const grf = (void *)GRF_BASE;
117
118 rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
119 GPIO7C6_MASK << GPIO7C6_SHIFT,
120 GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
121 GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
122 /*
123 * Debug UART can be used from here if required:
124 *
125 * debug_uart_init();
126 * printch('a');
127 * printhex8(0x1234);
128 * printascii("string");
129 */
130 debug_uart_init();
Eddie Cai9d62e822017-04-18 19:17:27 +0800131 debug("\nspl:debug uart enabled in %s\n", __func__);
Eddie Cai3e2b61c2017-03-15 08:43:29 -0600132 ret = spl_early_init();
Simon Glass2cffe662015-08-30 16:55:38 -0600133 if (ret) {
Eddie Cai3e2b61c2017-03-15 08:43:29 -0600134 debug("spl_early_init() failed: %d\n", ret);
Simon Glass2cffe662015-08-30 16:55:38 -0600135 hang();
136 }
137
huang lin8db3e242015-11-17 14:20:09 +0800138 rockchip_timer_init();
Simon Glass2cffe662015-08-30 16:55:38 -0600139 configure_l2ctlr();
140
Simon Glassae8fe412016-07-17 15:23:17 -0600141 ret = rockchip_get_clk(&dev);
Simon Glass2cffe662015-08-30 16:55:38 -0600142 if (ret) {
143 debug("CLK init failed: %d\n", ret);
144 return;
145 }
146
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200147#if !defined(CONFIG_SPL_OF_PLATDATA)
148 if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
149 ret = phycore_init();
150 if (ret) {
151 debug("Failed to set up phycore power settings: %d\n",
152 ret);
153 return;
154 }
155 }
156#endif
157
Jagan Teki387fd4b2017-09-27 23:03:12 +0530158#if !defined(CONFIG_SUPPORT_TPL)
Eddie Cai9d62e822017-04-18 19:17:27 +0800159 debug("\nspl:init dram\n");
Simon Glass2cffe662015-08-30 16:55:38 -0600160 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
161 if (ret) {
162 debug("DRAM init failed: %d\n", ret);
163 return;
164 }
Jagan Teki387fd4b2017-09-27 23:03:12 +0530165#endif
166
Philipp Tomsich798370f2017-06-29 11:21:15 +0200167#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
Philipp Tomsich7234c732017-10-10 16:21:16 +0200168 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800169#endif
Simon Glass2cffe662015-08-30 16:55:38 -0600170}
171
172static int setup_led(void)
173{
174#ifdef CONFIG_SPL_LED
175 struct udevice *dev;
176 char *led_name;
177 int ret;
178
179 led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
180 if (!led_name)
181 return 0;
182 ret = led_get_by_label(led_name, &dev);
183 if (ret) {
184 debug("%s: get=%d\n", __func__, ret);
185 return ret;
186 }
187 ret = led_set_on(dev, 1);
188 if (ret)
189 return ret;
190#endif
191
192 return 0;
193}
194
195void spl_board_init(void)
196{
Simon Glass2cffe662015-08-30 16:55:38 -0600197 int ret;
198
199 ret = setup_led();
Simon Glass2cffe662015-08-30 16:55:38 -0600200 if (ret) {
201 debug("LED ret=%d\n", ret);
202 hang();
203 }
204
Simon Glass2cffe662015-08-30 16:55:38 -0600205 preloader_console_init();
Philipp Tomsich798370f2017-06-29 11:21:15 +0200206#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
Philipp Tomsich7234c732017-10-10 16:21:16 +0200207 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
Sandy Pattersona9e92ee2016-08-10 10:21:47 -0400208#endif
Simon Glass2cffe662015-08-30 16:55:38 -0600209 return;
Simon Glass2cffe662015-08-30 16:55:38 -0600210}
Jagan Teki536e4d32017-09-27 23:03:14 +0530211
212#ifdef CONFIG_SPL_OS_BOOT
213
214#define PMU_BASE 0xff730000
215int dram_init_banksize(void)
216{
217 struct rk3288_pmu *const pmu = (void *)PMU_BASE;
218 size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]);
219
220 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
221 gd->bd->bi_dram[0].size = size;
222
223 return 0;
224}
225#endif