Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: USB2 ChipIdea USB controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Xu Yang <xu.yang_2@nxp.com> |
| 11 | - Peng Fan <peng.fan@nxp.com> |
| 12 | |
| 13 | properties: |
| 14 | compatible: |
| 15 | oneOf: |
| 16 | - enum: |
| 17 | - chipidea,usb2 |
| 18 | - fsl,imx27-usb |
| 19 | - lsi,zevio-usb |
| 20 | - nuvoton,npcm750-udc |
| 21 | - nvidia,tegra20-ehci |
| 22 | - nvidia,tegra20-udc |
| 23 | - nvidia,tegra30-ehci |
| 24 | - nvidia,tegra30-udc |
| 25 | - nvidia,tegra114-udc |
| 26 | - nvidia,tegra124-udc |
| 27 | - qcom,ci-hdrc |
| 28 | - items: |
| 29 | - enum: |
| 30 | - nvidia,tegra114-ehci |
| 31 | - nvidia,tegra124-ehci |
| 32 | - nvidia,tegra210-ehci |
| 33 | - const: nvidia,tegra30-ehci |
| 34 | - items: |
| 35 | - enum: |
| 36 | - fsl,imx23-usb |
| 37 | - fsl,imx25-usb |
| 38 | - fsl,imx28-usb |
| 39 | - fsl,imx35-usb |
| 40 | - fsl,imx50-usb |
| 41 | - fsl,imx51-usb |
| 42 | - fsl,imx53-usb |
| 43 | - fsl,imx6q-usb |
| 44 | - fsl,imx6sl-usb |
| 45 | - fsl,imx6sx-usb |
| 46 | - fsl,imx6ul-usb |
| 47 | - fsl,imx7d-usb |
| 48 | - fsl,vf610-usb |
| 49 | - const: fsl,imx27-usb |
| 50 | - items: |
| 51 | - enum: |
| 52 | - fsl,imx8dxl-usb |
| 53 | - fsl,imx8ulp-usb |
| 54 | - const: fsl,imx7ulp-usb |
| 55 | - const: fsl,imx6ul-usb |
| 56 | - items: |
| 57 | - enum: |
| 58 | - fsl,imx8mm-usb |
| 59 | - fsl,imx8mn-usb |
| 60 | - const: fsl,imx7d-usb |
| 61 | - const: fsl,imx27-usb |
| 62 | - items: |
| 63 | - enum: |
| 64 | - fsl,imx6sll-usb |
| 65 | - fsl,imx7ulp-usb |
| 66 | - const: fsl,imx6ul-usb |
| 67 | - const: fsl,imx27-usb |
| 68 | - items: |
| 69 | - const: xlnx,zynq-usb-2.20a |
| 70 | - const: chipidea,usb2 |
| 71 | - items: |
| 72 | - enum: |
| 73 | - nuvoton,npcm845-udc |
| 74 | - const: nuvoton,npcm750-udc |
| 75 | |
| 76 | reg: |
| 77 | minItems: 1 |
| 78 | maxItems: 2 |
| 79 | |
| 80 | interrupts: |
| 81 | minItems: 1 |
| 82 | maxItems: 2 |
| 83 | |
| 84 | clocks: |
| 85 | minItems: 1 |
| 86 | maxItems: 3 |
| 87 | |
| 88 | clock-names: |
| 89 | minItems: 1 |
| 90 | maxItems: 3 |
| 91 | |
| 92 | dr_mode: true |
| 93 | |
| 94 | power-domains: |
| 95 | maxItems: 1 |
| 96 | |
| 97 | resets: |
| 98 | maxItems: 1 |
| 99 | |
| 100 | reset-names: |
| 101 | maxItems: 1 |
| 102 | |
| 103 | "#reset-cells": |
| 104 | const: 1 |
| 105 | |
| 106 | phy_type: true |
| 107 | |
| 108 | itc-setting: |
| 109 | description: |
| 110 | interrupt threshold control register control, the setting should be |
| 111 | aligned with ITC bits at register USBCMD. |
| 112 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 113 | |
| 114 | ahb-burst-config: |
| 115 | description: |
| 116 | it is vendor dependent, the required value should be aligned with |
| 117 | AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is |
| 118 | used to change AHB burst configuration, check the chipidea spec for |
| 119 | meaning of each value. If this property is not existed, it will use |
| 120 | the reset value. |
| 121 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 122 | minimum: 0x0 |
| 123 | maximum: 0x7 |
| 124 | |
| 125 | tx-burst-size-dword: |
| 126 | description: |
| 127 | it is vendor dependent, the tx burst size in dword (4 bytes), This |
| 128 | register represents the maximum length of a the burst in 32-bit |
| 129 | words while moving data from system memory to the USB bus, the value |
| 130 | of this property will only take effect if property "ahb-burst-config" |
| 131 | is set to 0, if this property is missing the reset default of the |
| 132 | hardware implementation will be used. |
| 133 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 134 | minimum: 0x0 |
| 135 | maximum: 0x20 |
| 136 | |
| 137 | rx-burst-size-dword: |
| 138 | description: |
| 139 | it is vendor dependent, the rx burst size in dword (4 bytes), This |
| 140 | register represents the maximum length of a the burst in 32-bit words |
| 141 | while moving data from the USB bus to system memory, the value of |
| 142 | this property will only take effect if property "ahb-burst-config" |
| 143 | is set to 0, if this property is missing the reset default of the |
| 144 | hardware implementation will be used. |
| 145 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 146 | minimum: 0x0 |
| 147 | maximum: 0x20 |
| 148 | |
| 149 | extcon: |
| 150 | description: |
| 151 | Phandles to external connector devices. First phandle should point |
| 152 | to external connector, which provide "USB" cable events, the second |
| 153 | should point to external connector device, which provide "USB-HOST" |
| 154 | cable events. If one of the external connector devices is not |
| 155 | required, empty <0> phandle should be specified. |
| 156 | $ref: /schemas/types.yaml#/definitions/phandle-array |
| 157 | minItems: 1 |
| 158 | items: |
| 159 | - description: vbus extcon |
| 160 | - description: id extcon |
| 161 | |
| 162 | phy-clkgate-delay-us: |
| 163 | description: |
| 164 | The delay time (us) between putting the PHY into low power mode and |
| 165 | gating the PHY clock. |
| 166 | |
| 167 | non-zero-ttctrl-ttha: |
| 168 | description: |
| 169 | After setting this property, the value of register ttctrl.ttha |
| 170 | will be 0x7f; if not, the value will be 0x0, this is the default |
| 171 | value. It needs to be very carefully for setting this property, it |
| 172 | is recommended that consult with your IC engineer before setting |
| 173 | this value. On the most of chipidea platforms, the "usage_tt" flag |
| 174 | at RTL is 0, so this property only affects siTD. |
| 175 | |
| 176 | If this property is not set, the max packet size is 1023 bytes, and |
| 177 | if the total of packet size for previous transactions are more than |
| 178 | 256 bytes, it can't accept any transactions within this frame. The |
| 179 | use case is single transaction, but higher frame rate. |
| 180 | |
| 181 | If this property is set, the max packet size is 188 bytes, it can |
| 182 | handle more transactions than above case, it can accept transactions |
| 183 | until it considers the left room size within frame is less than 188 |
| 184 | bytes, software needs to make sure it does not send more than 90% |
| 185 | maximum_periodic_data_per_frame. The use case is multiple |
| 186 | transactions, but less frame rate. |
| 187 | type: boolean |
| 188 | |
| 189 | mux-controls: |
| 190 | description: |
| 191 | The mux control for toggling host/device output of this controller. |
| 192 | It's expected that a mux state of 0 indicates device mode and a mux |
| 193 | state of 1 indicates host mode. |
| 194 | maxItems: 1 |
| 195 | |
| 196 | mux-control-names: |
| 197 | const: usb_switch |
| 198 | |
| 199 | operating-points-v2: |
| 200 | description: A phandle to the OPP table containing the performance states. |
| 201 | $ref: /schemas/types.yaml#/definitions/phandle |
| 202 | |
| 203 | pinctrl-names: |
| 204 | description: |
| 205 | Names for optional pin modes in "default", "host", "device". |
| 206 | In case of HSIC-mode, "idle" and "active" pin modes are mandatory. |
| 207 | In this case, the "idle" state needs to pull down the data and |
| 208 | strobe pin and the "active" state needs to pull up the strobe pin. |
| 209 | oneOf: |
| 210 | - items: |
| 211 | - const: idle |
| 212 | - const: active |
| 213 | - items: |
| 214 | - const: default |
| 215 | - enum: |
| 216 | - host |
| 217 | - device |
| 218 | - items: |
| 219 | - const: default |
| 220 | |
| 221 | pinctrl-0: |
| 222 | maxItems: 1 |
| 223 | |
| 224 | pinctrl-1: |
| 225 | maxItems: 1 |
| 226 | |
| 227 | phys: |
| 228 | maxItems: 1 |
| 229 | |
| 230 | phy-names: |
| 231 | const: usb-phy |
| 232 | |
| 233 | phy-select: |
| 234 | description: |
| 235 | Phandler of TCSR node with two argument that indicate register |
| 236 | offset, and phy index |
| 237 | $ref: /schemas/types.yaml#/definitions/phandle-array |
| 238 | items: |
| 239 | - description: phandle to TCSR node |
| 240 | - description: register offset |
| 241 | - description: phy index |
| 242 | |
| 243 | vbus-supply: |
| 244 | description: reference to the VBUS regulator. |
| 245 | |
| 246 | fsl,usbmisc: |
| 247 | description: |
| 248 | Phandler of non-core register device, with one argument that |
| 249 | indicate usb controller index |
| 250 | $ref: /schemas/types.yaml#/definitions/phandle-array |
| 251 | items: |
| 252 | - items: |
| 253 | - description: phandle to usbmisc node |
| 254 | - description: index of usb controller |
| 255 | |
| 256 | fsl,anatop: |
| 257 | description: phandle for the anatop node. |
| 258 | $ref: /schemas/types.yaml#/definitions/phandle |
| 259 | |
| 260 | disable-over-current: |
| 261 | type: boolean |
| 262 | description: disable over current detect |
| 263 | |
| 264 | over-current-active-low: |
| 265 | type: boolean |
| 266 | description: over current signal polarity is active low |
| 267 | |
| 268 | over-current-active-high: |
| 269 | type: boolean |
| 270 | description: |
| 271 | Over current signal polarity is active high. It's recommended to |
| 272 | specify the over current polarity. |
| 273 | |
| 274 | power-active-high: |
| 275 | type: boolean |
| 276 | description: power signal polarity is active high |
| 277 | |
| 278 | external-vbus-divider: |
| 279 | type: boolean |
| 280 | description: enables off-chip resistor divider for Vbus |
| 281 | |
| 282 | samsung,picophy-pre-emp-curr-control: |
| 283 | description: |
| 284 | HS Transmitter Pre-Emphasis Current Control. This signal controls |
| 285 | the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN |
| 286 | pins after a J-to-K or K-to-J transition. The range is from 0x0 to |
| 287 | 0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0 |
| 288 | bits of USBNC_n_PHY_CFG1. |
| 289 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 290 | minimum: 0x0 |
| 291 | maximum: 0x3 |
| 292 | |
| 293 | samsung,picophy-dc-vol-level-adjust: |
| 294 | description: |
| 295 | HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC |
| 296 | level voltage. The range is from 0x0 to 0xf, the default value is |
| 297 | 0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1. |
| 298 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 299 | minimum: 0x0 |
| 300 | maximum: 0xf |
| 301 | |
| 302 | fsl,picophy-rise-fall-time-adjust: |
| 303 | description: |
| 304 | HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times |
| 305 | of the high-speed transmitter waveform. It has no unit. The rise/fall |
| 306 | time will be increased or decreased by a certain percentage relative |
| 307 | to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%) |
| 308 | Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1. |
| 309 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 310 | minimum: 0 |
| 311 | maximum: 3 |
| 312 | default: 1 |
| 313 | |
| 314 | usb-phy: |
| 315 | description: phandle for the PHY device. Use "phys" instead. |
| 316 | $ref: /schemas/types.yaml#/definitions/phandle |
| 317 | deprecated: true |
| 318 | |
| 319 | fsl,usbphy: |
| 320 | description: phandle of usb phy that connects to the port. Use "phys" instead. |
| 321 | $ref: /schemas/types.yaml#/definitions/phandle |
| 322 | deprecated: true |
| 323 | |
| 324 | nvidia,phy: |
| 325 | description: phandle of usb phy that connects to the port. Use "phys" instead. |
| 326 | $ref: /schemas/types.yaml#/definitions/phandle |
| 327 | deprecated: true |
| 328 | |
| 329 | nvidia,needs-double-reset: |
| 330 | description: Indicates double reset or not. |
| 331 | type: boolean |
| 332 | deprecated: true |
| 333 | |
| 334 | port: |
| 335 | description: |
| 336 | Any connector to the data bus of this controller should be modelled |
| 337 | using the OF graph bindings specified, if the "usb-role-switch" |
| 338 | property is used. |
| 339 | $ref: /schemas/graph.yaml#/properties/port |
| 340 | |
| 341 | reset-gpios: |
| 342 | maxItems: 1 |
| 343 | |
| 344 | ulpi: |
| 345 | type: object |
| 346 | additionalProperties: false |
| 347 | patternProperties: |
| 348 | "^phy(-[0-9])?$": |
| 349 | description: The phy child node for Qcom chips. |
| 350 | type: object |
| 351 | $ref: /schemas/phy/qcom,usb-hs-phy.yaml |
| 352 | |
| 353 | dependencies: |
| 354 | port: [ usb-role-switch ] |
| 355 | mux-controls: [ mux-control-names ] |
| 356 | |
| 357 | required: |
| 358 | - compatible |
| 359 | - reg |
| 360 | - interrupts |
| 361 | |
| 362 | allOf: |
| 363 | - $ref: usb-hcd.yaml# |
| 364 | - $ref: usb-drd.yaml# |
| 365 | - if: |
| 366 | properties: |
| 367 | phy_type: |
| 368 | const: hsic |
| 369 | required: |
| 370 | - phy_type |
| 371 | then: |
| 372 | properties: |
| 373 | pinctrl-names: |
| 374 | items: |
| 375 | - const: idle |
| 376 | - const: active |
| 377 | else: |
| 378 | properties: |
| 379 | pinctrl-names: |
| 380 | minItems: 1 |
| 381 | maxItems: 2 |
| 382 | oneOf: |
| 383 | - items: |
| 384 | - const: default |
| 385 | - enum: |
| 386 | - host |
| 387 | - device |
| 388 | - items: |
| 389 | - const: default |
| 390 | - if: |
| 391 | properties: |
| 392 | compatible: |
| 393 | contains: |
| 394 | enum: |
| 395 | - chipidea,usb2 |
| 396 | - lsi,zevio-usb |
| 397 | - nuvoton,npcm750-udc |
| 398 | - nvidia,tegra20-udc |
| 399 | - nvidia,tegra30-udc |
| 400 | - nvidia,tegra114-udc |
| 401 | - nvidia,tegra124-udc |
| 402 | - qcom,ci-hdrc |
| 403 | - xlnx,zynq-usb-2.20a |
| 404 | then: |
| 405 | properties: |
| 406 | fsl,usbmisc: false |
| 407 | disable-over-current: false |
| 408 | over-current-active-low: false |
| 409 | over-current-active-high: false |
| 410 | power-active-high: false |
| 411 | external-vbus-divider: false |
| 412 | samsung,picophy-pre-emp-curr-control: false |
| 413 | samsung,picophy-dc-vol-level-adjust: false |
| 414 | |
| 415 | unevaluatedProperties: false |
| 416 | |
| 417 | examples: |
| 418 | - | |
| 419 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 420 | #include <dt-bindings/clock/berlin2.h> |
| 421 | |
| 422 | usb@f7ed0000 { |
| 423 | compatible = "chipidea,usb2"; |
| 424 | reg = <0xf7ed0000 0x10000>; |
| 425 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; |
| 426 | clocks = <&chip CLKID_USB0>; |
| 427 | phys = <&usb_phy0>; |
| 428 | phy-names = "usb-phy"; |
| 429 | vbus-supply = <®_usb0_vbus>; |
| 430 | itc-setting = <0x4>; /* 4 micro-frames */ |
| 431 | /* Incremental burst of unspecified length */ |
| 432 | ahb-burst-config = <0x0>; |
| 433 | tx-burst-size-dword = <0x10>; /* 64 bytes */ |
| 434 | rx-burst-size-dword = <0x10>; |
| 435 | extcon = <0>, <&usb_id>; |
| 436 | phy-clkgate-delay-us = <400>; |
| 437 | mux-controls = <&usb_switch>; |
| 438 | mux-control-names = "usb_switch"; |
| 439 | }; |
| 440 | |
| 441 | # Example for HSIC: |
| 442 | - | |
| 443 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 444 | #include <dt-bindings/clock/imx6qdl-clock.h> |
| 445 | |
| 446 | usb@2184400 { |
| 447 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 448 | reg = <0x02184400 0x200>; |
| 449 | interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; |
| 450 | clocks = <&clks IMX6QDL_CLK_USBOH3>; |
| 451 | fsl,usbphy = <&usbphynop1>; |
| 452 | fsl,usbmisc = <&usbmisc 2>; |
| 453 | phy_type = "hsic"; |
| 454 | dr_mode = "host"; |
| 455 | ahb-burst-config = <0x0>; |
| 456 | tx-burst-size-dword = <0x10>; |
| 457 | rx-burst-size-dword = <0x10>; |
| 458 | pinctrl-names = "idle", "active"; |
| 459 | pinctrl-0 = <&pinctrl_usbh2_idle>; |
| 460 | pinctrl-1 = <&pinctrl_usbh2_active>; |
| 461 | #address-cells = <1>; |
| 462 | #size-cells = <0>; |
| 463 | |
| 464 | ethernet@1 { |
| 465 | compatible = "usb424,9730"; |
| 466 | reg = <1>; |
| 467 | }; |
| 468 | }; |
| 469 | |
| 470 | ... |