blob: 0eb0c1ba8710dc14984c489696c2949cda680867 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/fsl,xcvr.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP Audio Transceiver (XCVR) Controller
8
9maintainers:
10 - Viorel Suman <viorel.suman@nxp.com>
11
12description: |
13 NXP XCVR (Audio Transceiver) is a on-chip functional module
14 that allows CPU to receive and transmit digital audio via
15 HDMI2.1 eARC, HDMI1.4 ARC and SPDIF.
16
17properties:
18 $nodename:
19 pattern: "^xcvr@.*"
20
21 compatible:
22 enum:
23 - fsl,imx8mp-xcvr
24 - fsl,imx93-xcvr
25
26 reg:
27 items:
28 - description: 20K RAM for code and data
29 - description: registers space
30 - description: RX FIFO address
31 - description: TX FIFO address
32
33 reg-names:
34 items:
35 - const: ram
36 - const: regs
37 - const: rxfifo
38 - const: txfifo
39
40 interrupts:
Tom Rini93743d22024-04-01 09:08:13 -040041 items:
42 - description: WAKEUPMIX Audio XCVR Interrupt 1
43 - description: WAKEUPMIX Audio XCVR Interrupt 2
44 minItems: 1
Tom Rini53633a82024-02-29 12:33:36 -050045
46 clocks:
47 items:
48 - description: Peripheral clock
49 - description: PHY clock
50 - description: SPBA clock
51 - description: PLL clock
52
53 clock-names:
54 items:
55 - const: ipg
56 - const: phy
57 - const: spba
58 - const: pll_ipg
59
60 dmas:
61 items:
62 - description: DMA controller phandle and request line for RX
63 - description: DMA controller phandle and request line for TX
64
65 dma-names:
66 items:
67 - const: rx
68 - const: tx
69
70 resets:
71 maxItems: 1
72
73required:
74 - compatible
75 - reg
76 - reg-names
77 - interrupts
78 - clocks
79 - clock-names
80 - dmas
81 - dma-names
82 - resets
83
Tom Rini93743d22024-04-01 09:08:13 -040084allOf:
85 - if:
86 properties:
87 compatible:
88 contains:
89 enum:
90 - fsl,imx93-xcvr
91 then:
92 properties:
93 interrupts:
94 minItems: 2
95 maxItems: 2
96 else:
97 properties:
98 interrupts:
99 maxItems: 1
100
Tom Rini53633a82024-02-29 12:33:36 -0500101additionalProperties: false
102
103examples:
104 - |
105 #include <dt-bindings/interrupt-controller/arm-gic.h>
106 #include <dt-bindings/clock/imx8mp-clock.h>
107 #include <dt-bindings/reset/imx8mp-reset.h>
108
109 xcvr: xcvr@30cc0000 {
110 compatible = "fsl,imx8mp-xcvr";
111 reg = <0x30cc0000 0x800>,
112 <0x30cc0800 0x400>,
113 <0x30cc0c00 0x080>,
114 <0x30cc0e00 0x080>;
115 reg-names = "ram", "regs", "rxfifo", "txfifo";
116 interrupts = <0x0 128 IRQ_TYPE_LEVEL_HIGH>;
117 clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_IPG>,
118 <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_PHY>,
119 <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT>,
120 <&audiomix_clk IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT>;
121 clock-names = "ipg", "phy", "spba", "pll_ipg";
122 dmas = <&sdma2 30 2 0>, <&sdma2 31 2 0>;
123 dma-names = "rx", "tx";
124 resets = <&audiomix_reset 0>;
125 };