blob: 799b362ba4987c77b39e2e1d368a88c9d74e8e02 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/fsl,xcvr.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP Audio Transceiver (XCVR) Controller
8
9maintainers:
10 - Viorel Suman <viorel.suman@nxp.com>
11
12description: |
13 NXP XCVR (Audio Transceiver) is a on-chip functional module
14 that allows CPU to receive and transmit digital audio via
15 HDMI2.1 eARC, HDMI1.4 ARC and SPDIF.
16
17properties:
18 $nodename:
19 pattern: "^xcvr@.*"
20
21 compatible:
22 enum:
23 - fsl,imx8mp-xcvr
24 - fsl,imx93-xcvr
25
26 reg:
27 items:
28 - description: 20K RAM for code and data
29 - description: registers space
30 - description: RX FIFO address
31 - description: TX FIFO address
32
33 reg-names:
34 items:
35 - const: ram
36 - const: regs
37 - const: rxfifo
38 - const: txfifo
39
40 interrupts:
41 maxItems: 1
42
43 clocks:
44 items:
45 - description: Peripheral clock
46 - description: PHY clock
47 - description: SPBA clock
48 - description: PLL clock
49
50 clock-names:
51 items:
52 - const: ipg
53 - const: phy
54 - const: spba
55 - const: pll_ipg
56
57 dmas:
58 items:
59 - description: DMA controller phandle and request line for RX
60 - description: DMA controller phandle and request line for TX
61
62 dma-names:
63 items:
64 - const: rx
65 - const: tx
66
67 resets:
68 maxItems: 1
69
70required:
71 - compatible
72 - reg
73 - reg-names
74 - interrupts
75 - clocks
76 - clock-names
77 - dmas
78 - dma-names
79 - resets
80
81additionalProperties: false
82
83examples:
84 - |
85 #include <dt-bindings/interrupt-controller/arm-gic.h>
86 #include <dt-bindings/clock/imx8mp-clock.h>
87 #include <dt-bindings/reset/imx8mp-reset.h>
88
89 xcvr: xcvr@30cc0000 {
90 compatible = "fsl,imx8mp-xcvr";
91 reg = <0x30cc0000 0x800>,
92 <0x30cc0800 0x400>,
93 <0x30cc0c00 0x080>,
94 <0x30cc0e00 0x080>;
95 reg-names = "ram", "regs", "rxfifo", "txfifo";
96 interrupts = <0x0 128 IRQ_TYPE_LEVEL_HIGH>;
97 clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_IPG>,
98 <&audiomix_clk IMX8MP_CLK_AUDIOMIX_EARC_PHY>,
99 <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT>,
100 <&audiomix_clk IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT>;
101 clock-names = "ipg", "phy", "spba", "pll_ipg";
102 dmas = <&sdma2 30 2 0>, <&sdma2 31 2 0>;
103 dma-names = "rx", "tx";
104 resets = <&audiomix_reset 0>;
105 };