Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> |
| 3 | * |
| 4 | * (C) Copyright 2007-2011 |
| 5 | * Allwinner Technology Co., Ltd. <www.allwinnertech.com> |
| 6 | * Tom Cubie <tangliang@allwinnertech.com> |
| 7 | * |
| 8 | * Configuration settings for the Allwinner sunxi series of boards. |
| 9 | * |
| 10 | * SPDX-License-Identifier: GPL-2.0+ |
| 11 | */ |
| 12 | |
| 13 | #ifndef _SUNXI_COMMON_CONFIG_H |
| 14 | #define _SUNXI_COMMON_CONFIG_H |
| 15 | |
Hans de Goede | 22a1a53 | 2015-09-13 17:29:33 +0200 | [diff] [blame] | 16 | #include <asm/arch/cpu.h> |
Hans de Goede | d241ecf | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 17 | #include <linux/stringify.h> |
| 18 | |
Siarhei Siamashka | 15aca90 | 2015-02-21 07:34:09 +0200 | [diff] [blame] | 19 | #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT |
| 20 | /* |
| 21 | * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the |
| 22 | * expense of restricting some features, so the regular machine id values can |
| 23 | * be used. |
| 24 | */ |
| 25 | # define CONFIG_MACH_TYPE_COMPAT_REV 0 |
| 26 | #else |
| 27 | /* |
| 28 | * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. |
| 29 | * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass |
| 30 | * beyond the machine id check. |
| 31 | */ |
| 32 | # define CONFIG_MACH_TYPE_COMPAT_REV 1 |
| 33 | #endif |
| 34 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 35 | /* |
| 36 | * High Level Configuration Options |
| 37 | */ |
| 38 | #define CONFIG_SUNXI /* sunxi family */ |
Ian Campbell | 140d832 | 2014-05-05 11:52:30 +0100 | [diff] [blame] | 39 | #ifdef CONFIG_SPL_BUILD |
Ian Campbell | 140d832 | 2014-05-05 11:52:30 +0100 | [diff] [blame] | 40 | #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ |
| 41 | #endif |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 42 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 43 | /* Serial & console */ |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 44 | #define CONFIG_SYS_NS16550_SERIAL |
| 45 | /* ns16550 reg in the low bits of cpu reg */ |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 46 | #define CONFIG_SYS_NS16550_CLK 24000000 |
Thomas Chou | 00ad1f0 | 2015-11-19 21:48:13 +0800 | [diff] [blame] | 47 | #ifndef CONFIG_DM_SERIAL |
Simon Glass | 6664898 | 2014-10-30 20:25:50 -0600 | [diff] [blame] | 48 | # define CONFIG_SYS_NS16550_REG_SIZE -4 |
| 49 | # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE |
| 50 | # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE |
| 51 | # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE |
| 52 | # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE |
| 53 | # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE |
| 54 | #endif |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 55 | |
Paul Kocialkowski | de05f94 | 2015-05-16 19:52:11 +0200 | [diff] [blame] | 56 | /* CPU */ |
Hans de Goede | 22a1a53 | 2015-09-13 17:29:33 +0200 | [diff] [blame] | 57 | #define CONFIG_DISPLAY_CPUINFO |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 58 | #define CONFIG_TIMER_CLK_FREQ 24000000 |
Paul Kocialkowski | de05f94 | 2015-05-16 19:52:11 +0200 | [diff] [blame] | 59 | |
Hans de Goede | d241ecf | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 60 | /* |
| 61 | * The DRAM Base differs between some models. We cannot use macros for the |
| 62 | * CONFIG_FOO defines which contain the DRAM base address since they end |
| 63 | * up unexpanded in include/autoconf.mk . |
| 64 | * |
| 65 | * So we have to have this #ifdef #else #endif block for these. |
| 66 | */ |
| 67 | #ifdef CONFIG_MACH_SUN9I |
| 68 | #define SDRAM_OFFSET(x) 0x2##x |
| 69 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 70 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ |
| 71 | #define CONFIG_SYS_TEXT_BASE 0x2a000000 |
| 72 | #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 |
Hans de Goede | 66ab79d | 2015-09-13 13:02:48 +0200 | [diff] [blame] | 73 | /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here |
| 74 | * since it needs to fit in with the other values. By also #defining it |
| 75 | * we get warnings if the Kconfig value mismatches. */ |
| 76 | #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000 |
Hans de Goede | d241ecf | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 77 | #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 |
| 78 | #else |
| 79 | #define SDRAM_OFFSET(x) 0x4##x |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 80 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
Hans de Goede | d241ecf | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 81 | #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ |
| 82 | #define CONFIG_SYS_TEXT_BASE 0x4a000000 |
| 83 | #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 |
Hans de Goede | 66ab79d | 2015-09-13 13:02:48 +0200 | [diff] [blame] | 84 | /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here |
| 85 | * since it needs to fit in with the other values. By also #defining it |
| 86 | * we get warnings if the Kconfig value mismatches. */ |
| 87 | #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000 |
Hans de Goede | d241ecf | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 88 | #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 |
| 89 | #endif |
| 90 | |
| 91 | #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ |
Hans de Goede | d241ecf | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 92 | |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 93 | #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) |
Hans de Goede | 0b95a28 | 2015-05-20 15:27:16 +0200 | [diff] [blame] | 94 | /* |
| 95 | * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is |
| 96 | * slightly bigger. Note that it is possible to map the first 32 KiB of the |
| 97 | * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the |
| 98 | * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and |
| 99 | * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. |
| 100 | */ |
| 101 | #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 |
Siarhei Siamashka | b8f999e | 2016-05-31 01:48:06 +0300 | [diff] [blame] | 102 | #define CONFIG_SYS_INIT_RAM_SIZE 0xA000 /* 40 KiB */ |
Hans de Goede | 0b95a28 | 2015-05-20 15:27:16 +0200 | [diff] [blame] | 103 | #else |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 104 | #define CONFIG_SYS_INIT_RAM_ADDR 0x0 |
| 105 | #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ |
Hans de Goede | 0b95a28 | 2015-05-20 15:27:16 +0200 | [diff] [blame] | 106 | #endif |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 107 | |
| 108 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 109 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 110 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 111 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 112 | |
| 113 | #define CONFIG_NR_DRAM_BANKS 1 |
| 114 | #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE |
| 115 | #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ |
| 116 | |
Ian Campbell | a2ebf92 | 2014-07-18 20:38:41 +0100 | [diff] [blame] | 117 | #ifdef CONFIG_AHCI |
| 118 | #define CONFIG_LIBATA |
| 119 | #define CONFIG_SCSI_AHCI |
| 120 | #define CONFIG_SCSI_AHCI_PLAT |
| 121 | #define CONFIG_SUNXI_AHCI |
Bernhard Nortmann | b4946db | 2015-06-10 10:51:40 +0200 | [diff] [blame] | 122 | #define CONFIG_SYS_64BIT_LBA |
Ian Campbell | a2ebf92 | 2014-07-18 20:38:41 +0100 | [diff] [blame] | 123 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 |
| 124 | #define CONFIG_SYS_SCSI_MAX_LUN 1 |
| 125 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ |
| 126 | CONFIG_SYS_SCSI_MAX_LUN) |
Simon Glass | 8706b81 | 2016-05-01 11:36:02 -0600 | [diff] [blame] | 127 | #define CONFIG_SCSI |
Ian Campbell | a2ebf92 | 2014-07-18 20:38:41 +0100 | [diff] [blame] | 128 | #endif |
| 129 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 130 | #define CONFIG_SETUP_MEMORY_TAGS |
| 131 | #define CONFIG_CMDLINE_TAG |
| 132 | #define CONFIG_INITRD_TAG |
Paul Kocialkowski | 99ae0f6 | 2015-03-28 18:35:36 +0100 | [diff] [blame] | 133 | #define CONFIG_SERIAL_TAG |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 134 | |
Hans de Goede | 3ce35f9 | 2015-08-16 14:48:22 +0200 | [diff] [blame] | 135 | #ifdef CONFIG_NAND_SUNXI |
Boris Brezillon | 94754ad | 2016-06-15 21:09:27 +0200 | [diff] [blame] | 136 | #define CONFIG_SYS_NAND_MAX_ECCPOS 1664 |
Hans de Goede | 0f3ddbf | 2015-08-15 09:38:22 +0200 | [diff] [blame] | 137 | #define CONFIG_SPL_NAND_SUPPORT 1 |
Boris Brezillon | 57f2038 | 2016-06-15 21:09:23 +0200 | [diff] [blame] | 138 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 139 | #define CONFIG_SYS_MAX_NAND_DEVICE 8 |
Piotr Zierhoffer | e2b662b | 2015-07-23 14:33:03 +0200 | [diff] [blame] | 140 | #endif |
| 141 | |
Siarhei Siamashka | 6f3ea20 | 2016-06-07 14:28:34 +0300 | [diff] [blame] | 142 | #ifdef CONFIG_SPL_SPI_SUNXI |
| 143 | #define CONFIG_SPL_SPI_FLASH_SUPPORT 1 |
| 144 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 |
| 145 | #endif |
| 146 | |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 147 | /* mmc config */ |
Maxime Ripard | e0c7aa4 | 2015-10-15 22:04:07 +0200 | [diff] [blame] | 148 | #ifdef CONFIG_MMC |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 149 | #define CONFIG_GENERIC_MMC |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 150 | #define CONFIG_MMC_SUNXI |
| 151 | #define CONFIG_MMC_SUNXI_SLOT 0 |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 152 | #define CONFIG_ENV_IS_IN_MMC |
| 153 | #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ |
Chen-Yu Tsai | d4ea92b | 2014-10-22 16:47:42 +0800 | [diff] [blame] | 154 | #endif |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 155 | |
Hans de Goede | 9f7dc80 | 2015-09-13 17:16:54 +0200 | [diff] [blame] | 156 | /* 64MB of malloc() pool */ |
| 157 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20)) |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 158 | |
| 159 | /* |
| 160 | * Miscellaneous configurable options |
| 161 | */ |
Ian Campbell | 428734e | 2014-10-07 14:20:30 +0100 | [diff] [blame] | 162 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 163 | #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 164 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 165 | |
| 166 | /* Boot Argument Buffer Size */ |
| 167 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 168 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 169 | /* standalone support */ |
Hans de Goede | d241ecf | 2015-05-19 22:12:31 +0200 | [diff] [blame] | 170 | #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 171 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 172 | /* baudrate */ |
| 173 | #define CONFIG_BAUDRATE 115200 |
| 174 | |
| 175 | /* The stack sizes are set up in start.S using the settings below */ |
| 176 | #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ |
| 177 | |
| 178 | /* FLASH and environment organization */ |
| 179 | |
| 180 | #define CONFIG_SYS_NO_FLASH |
| 181 | |
Boris Brezillon | 8646f2a | 2015-07-27 16:21:26 +0200 | [diff] [blame] | 182 | #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 183 | #define CONFIG_IDENT_STRING " Allwinner Technology" |
Simon Glass | d5f4d99 | 2016-02-22 22:55:46 -0700 | [diff] [blame] | 184 | #define CONFIG_DISPLAY_BOARDINFO |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 185 | |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 186 | #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 187 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
| 188 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 189 | #define CONFIG_FAT_WRITE /* enable write access */ |
| 190 | |
| 191 | #define CONFIG_SPL_FRAMEWORK |
| 192 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| 193 | #define CONFIG_SPL_SERIAL_SUPPORT |
| 194 | #define CONFIG_SPL_LIBGENERIC_SUPPORT |
| 195 | |
Simon Glass | 5debe1f | 2015-02-07 10:47:30 -0700 | [diff] [blame] | 196 | #define CONFIG_SPL_BOARD_LOAD_IMAGE |
| 197 | |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 198 | #if defined(CONFIG_MACH_SUN9I) |
Siarhei Siamashka | 08e978b | 2016-05-14 04:13:26 +0300 | [diff] [blame] | 199 | #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ |
| 200 | #define CONFIG_SPL_MAX_SIZE 0x5fc0 /* ? KiB on sun9i */ |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 201 | #elif defined(CONFIG_MACH_SUN50I) |
Siarhei Siamashka | 08e978b | 2016-05-14 04:13:26 +0300 | [diff] [blame] | 202 | #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ |
| 203 | #define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB on sun50i */ |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 204 | #else |
Siarhei Siamashka | 08e978b | 2016-05-14 04:13:26 +0300 | [diff] [blame] | 205 | #define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */ |
| 206 | #define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */ |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 207 | #endif |
Ian Campbell | 140d832 | 2014-05-05 11:52:30 +0100 | [diff] [blame] | 208 | |
| 209 | #define CONFIG_SPL_LIBDISK_SUPPORT |
Siarhei Siamashka | 121161f | 2014-12-25 02:34:47 +0200 | [diff] [blame] | 210 | |
Maxime Ripard | e0c7aa4 | 2015-10-15 22:04:07 +0200 | [diff] [blame] | 211 | #ifdef CONFIG_MMC |
Ian Campbell | 140d832 | 2014-05-05 11:52:30 +0100 | [diff] [blame] | 212 | #define CONFIG_SPL_MMC_SUPPORT |
Siarhei Siamashka | 121161f | 2014-12-25 02:34:47 +0200 | [diff] [blame] | 213 | #endif |
Ian Campbell | 140d832 | 2014-05-05 11:52:30 +0100 | [diff] [blame] | 214 | |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 215 | #ifndef CONFIG_ARM64 |
Ian Campbell | 140d832 | 2014-05-05 11:52:30 +0100 | [diff] [blame] | 216 | #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 217 | #endif |
Ian Campbell | 140d832 | 2014-05-05 11:52:30 +0100 | [diff] [blame] | 218 | |
| 219 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ |
| 220 | #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ |
| 221 | |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 222 | #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) |
Siarhei Siamashka | b8f999e | 2016-05-31 01:48:06 +0300 | [diff] [blame] | 223 | #define LOW_LEVEL_SRAM_STACK 0x0001A000 |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 224 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK |
| 225 | #else |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 226 | /* end of 32 KiB in sram */ |
| 227 | #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ |
| 228 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 229 | #endif |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 230 | |
Hans de Goede | 3352b22 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 231 | /* I2C */ |
Jelle van der Waa | 3f3a309 | 2016-02-23 18:47:19 +0100 | [diff] [blame] | 232 | #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ |
| 233 | defined CONFIG_SY8106A_POWER |
Hans de Goede | 3352b22 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 234 | #define CONFIG_SPL_I2C_SUPPORT |
Hans de Goede | 606fa4a | 2015-01-23 15:28:22 +0100 | [diff] [blame] | 235 | #endif |
| 236 | |
Paul Kocialkowski | 0a3ec0a | 2015-04-10 23:09:52 +0200 | [diff] [blame] | 237 | #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ |
| 238 | defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ |
Jelle van der Waa | 8d3d7c1 | 2016-01-14 14:06:26 +0100 | [diff] [blame] | 239 | defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE |
Hans de Goede | 6ef998d | 2015-04-23 17:47:22 +0200 | [diff] [blame] | 240 | #define CONFIG_SYS_I2C |
Hans de Goede | 3352b22 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 241 | #define CONFIG_SYS_I2C_MVTWSI |
| 242 | #define CONFIG_SYS_I2C_SPEED 400000 |
| 243 | #define CONFIG_SYS_I2C_SLAVE 0x7f |
Hans de Goede | 6ef998d | 2015-04-23 17:47:22 +0200 | [diff] [blame] | 244 | #endif |
Hans de Goede | a5b4cfe | 2015-02-16 17:23:25 +0100 | [diff] [blame] | 245 | |
| 246 | #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) |
| 247 | #define CONFIG_SYS_I2C_SOFT |
| 248 | #define CONFIG_SYS_I2C_SOFT_SPEED 50000 |
| 249 | #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 |
Hans de Goede | a5b4cfe | 2015-02-16 17:23:25 +0100 | [diff] [blame] | 250 | /* We use pin names in Kconfig and sunxi_name_to_gpio() */ |
| 251 | #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda |
| 252 | #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl |
| 253 | #ifndef __ASSEMBLY__ |
| 254 | extern int soft_i2c_gpio_sda; |
| 255 | extern int soft_i2c_gpio_scl; |
| 256 | #endif |
Hans de Goede | 6de9f76 | 2015-03-07 12:00:02 +0100 | [diff] [blame] | 257 | #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ |
| 258 | #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ |
| 259 | #else |
| 260 | #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ |
| 261 | #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ |
Hans de Goede | a5b4cfe | 2015-02-16 17:23:25 +0100 | [diff] [blame] | 262 | #endif |
| 263 | |
Henrik Nordstrom | aa382ad | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 264 | /* PMU */ |
vishnupatekar | 1895dfd | 2015-11-29 01:07:22 +0800 | [diff] [blame] | 265 | #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ |
Jelle van der Waa | 3f3a309 | 2016-02-23 18:47:19 +0100 | [diff] [blame] | 266 | defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \ |
| 267 | defined CONFIG_SY8106A_POWER |
Henrik Nordstrom | aa382ad | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 268 | #define CONFIG_SPL_POWER_SUPPORT |
| 269 | #endif |
| 270 | |
Hans de Goede | 8c1c782 | 2014-06-09 11:36:58 +0200 | [diff] [blame] | 271 | #ifndef CONFIG_CONS_INDEX |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 272 | #define CONFIG_CONS_INDEX 1 /* UART0 */ |
Hans de Goede | 8c1c782 | 2014-06-09 11:36:58 +0200 | [diff] [blame] | 273 | #endif |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 274 | |
Hans de Goede | c7ab3f5 | 2015-08-01 14:44:29 +0200 | [diff] [blame] | 275 | #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE |
Hans de Goede | 2ab05fe | 2015-02-20 16:55:12 +0100 | [diff] [blame] | 276 | #if CONFIG_CONS_INDEX == 1 |
| 277 | #ifdef CONFIG_MACH_SUN9I |
| 278 | #define OF_STDOUT_PATH "/soc/serial@07000000:115200" |
| 279 | #else |
| 280 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" |
| 281 | #endif |
| 282 | #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) |
| 283 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" |
Laurent Itti | 20dfe00 | 2015-05-05 17:02:00 -0700 | [diff] [blame] | 284 | #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) |
| 285 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" |
Hans de Goede | 2ab05fe | 2015-02-20 16:55:12 +0100 | [diff] [blame] | 286 | #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) |
| 287 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" |
| 288 | #else |
| 289 | #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. |
| 290 | #endif |
Hans de Goede | c7ab3f5 | 2015-08-01 14:44:29 +0200 | [diff] [blame] | 291 | #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */ |
Hans de Goede | 2ab05fe | 2015-02-20 16:55:12 +0100 | [diff] [blame] | 292 | |
Ian Campbell | af47147 | 2014-06-05 19:00:15 +0100 | [diff] [blame] | 293 | /* GPIO */ |
| 294 | #define CONFIG_SUNXI_GPIO |
Hans de Goede | 7412ef8 | 2014-10-02 20:29:26 +0200 | [diff] [blame] | 295 | #define CONFIG_SPL_GPIO_SUPPORT |
Ian Campbell | af47147 | 2014-06-05 19:00:15 +0100 | [diff] [blame] | 296 | |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 297 | #ifdef CONFIG_VIDEO |
| 298 | /* |
Hans de Goede | 6c91286 | 2015-02-02 17:13:29 +0100 | [diff] [blame] | 299 | * The amount of RAM to keep free at the top of RAM when relocating u-boot, |
| 300 | * to use as framebuffer. This must be a multiple of 4096. |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 301 | */ |
Hans de Goede | 9f7dc80 | 2015-09-13 17:16:54 +0200 | [diff] [blame] | 302 | #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20) |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 303 | |
Luc Verhaegen | 4869a8c | 2014-08-13 07:55:07 +0200 | [diff] [blame] | 304 | /* Do we want to initialize a simple FB? */ |
| 305 | #define CONFIG_VIDEO_DT_SIMPLEFB |
| 306 | |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 307 | #define CONFIG_VIDEO_SUNXI |
| 308 | |
| 309 | #define CONFIG_CFB_CONSOLE |
| 310 | #define CONFIG_VIDEO_SW_CURSOR |
| 311 | #define CONFIG_VIDEO_LOGO |
Hans de Goede | ccb0ed5 | 2014-12-19 13:46:33 +0100 | [diff] [blame] | 312 | #define CONFIG_VIDEO_STD_TIMINGS |
Hans de Goede | a5aa95f | 2014-12-19 16:05:12 +0100 | [diff] [blame] | 313 | #define CONFIG_I2C_EDID |
Hans de Goede | d955f44 | 2015-08-05 00:06:47 +0200 | [diff] [blame] | 314 | #define VIDEO_LINE_LEN (pGD->plnSizeX) |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 315 | |
| 316 | /* allow both serial and cfb console. */ |
| 317 | #define CONFIG_CONSOLE_MUX |
| 318 | /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ |
| 319 | #define CONFIG_VGA_AS_SINGLE_DEVICE |
| 320 | |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 321 | #endif /* CONFIG_VIDEO */ |
| 322 | |
Hans de Goede | 73d7d42 | 2014-06-09 11:37:00 +0200 | [diff] [blame] | 323 | /* Ethernet support */ |
| 324 | #ifdef CONFIG_SUNXI_EMAC |
Hans de Goede | 81174e1 | 2015-04-16 21:47:06 +0200 | [diff] [blame] | 325 | #define CONFIG_PHY_ADDR 1 |
Hans de Goede | 73d7d42 | 2014-06-09 11:37:00 +0200 | [diff] [blame] | 326 | #define CONFIG_MII /* MII PHY management */ |
Hans de Goede | 81174e1 | 2015-04-16 21:47:06 +0200 | [diff] [blame] | 327 | #define CONFIG_PHYLIB |
Hans de Goede | 73d7d42 | 2014-06-09 11:37:00 +0200 | [diff] [blame] | 328 | #endif |
| 329 | |
Ian Campbell | ba8311f | 2014-05-05 11:52:28 +0100 | [diff] [blame] | 330 | #ifdef CONFIG_SUNXI_GMAC |
Ian Campbell | ba8311f | 2014-05-05 11:52:28 +0100 | [diff] [blame] | 331 | #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ |
| 332 | #define CONFIG_PHY_ADDR 1 |
| 333 | #define CONFIG_MII /* MII PHY management */ |
Hans de Goede | 6e16a93 | 2016-03-16 13:46:22 +0100 | [diff] [blame] | 334 | #define CONFIG_PHY_REALTEK |
Ian Campbell | ba8311f | 2014-05-05 11:52:28 +0100 | [diff] [blame] | 335 | #endif |
| 336 | |
Paul Kocialkowski | 00529e3 | 2015-08-04 17:04:09 +0200 | [diff] [blame] | 337 | #ifdef CONFIG_USB_EHCI_HCD |
Hans de Goede | 804fa57 | 2015-05-10 14:10:27 +0200 | [diff] [blame] | 338 | #define CONFIG_USB_OHCI_NEW |
| 339 | #define CONFIG_USB_OHCI_SUNXI |
| 340 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 |
Roman Byshko | 3c09160 | 2014-07-24 22:54:22 +0200 | [diff] [blame] | 341 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 |
Hans de Goede | f494cad | 2015-01-11 17:17:00 +0100 | [diff] [blame] | 342 | #endif |
| 343 | |
| 344 | #ifdef CONFIG_USB_MUSB_SUNXI |
Paul Kocialkowski | f34dfcb | 2015-08-04 17:04:06 +0200 | [diff] [blame] | 345 | #define CONFIG_USB_MUSB_PIO_ONLY |
Hans de Goede | f494cad | 2015-01-11 17:17:00 +0100 | [diff] [blame] | 346 | #endif |
| 347 | |
Paul Kocialkowski | a5310eb | 2015-08-04 17:04:11 +0200 | [diff] [blame] | 348 | #ifdef CONFIG_USB_MUSB_GADGET |
Sam Protsenko | 4d2439d | 2016-04-13 14:20:26 +0300 | [diff] [blame] | 349 | #define CONFIG_USB_FUNCTION_DFU |
| 350 | #define CONFIG_USB_FUNCTION_FASTBOOT |
| 351 | #define CONFIG_USB_FUNCTION_MASS_STORAGE |
Paul Kocialkowski | a5310eb | 2015-08-04 17:04:11 +0200 | [diff] [blame] | 352 | #endif |
| 353 | |
Siarhei Siamashka | db41834 | 2015-10-25 06:44:46 +0200 | [diff] [blame] | 354 | #ifdef CONFIG_USB_FUNCTION_DFU |
Siarhei Siamashka | db41834 | 2015-10-25 06:44:46 +0200 | [diff] [blame] | 355 | #define CONFIG_DFU_RAM |
| 356 | #endif |
| 357 | |
Paul Kocialkowski | a5310eb | 2015-08-04 17:04:11 +0200 | [diff] [blame] | 358 | #ifdef CONFIG_USB_FUNCTION_FASTBOOT |
| 359 | #define CONFIG_CMD_FASTBOOT |
| 360 | #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR |
| 361 | #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000 |
Maxime Ripard | c0931d0 | 2015-10-15 14:34:20 +0200 | [diff] [blame] | 362 | #define CONFIG_ANDROID_BOOT_IMAGE |
Paul Kocialkowski | a5310eb | 2015-08-04 17:04:11 +0200 | [diff] [blame] | 363 | |
| 364 | #define CONFIG_FASTBOOT_FLASH |
Maxime Ripard | e0c7aa4 | 2015-10-15 22:04:07 +0200 | [diff] [blame] | 365 | |
| 366 | #ifdef CONFIG_MMC |
Paul Kocialkowski | a5310eb | 2015-08-04 17:04:11 +0200 | [diff] [blame] | 367 | #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 |
| 368 | #define CONFIG_EFI_PARTITION |
| 369 | #endif |
Maxime Ripard | e0c7aa4 | 2015-10-15 22:04:07 +0200 | [diff] [blame] | 370 | #endif |
Paul Kocialkowski | a5310eb | 2015-08-04 17:04:11 +0200 | [diff] [blame] | 371 | |
| 372 | #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE |
Paul Kocialkowski | a5310eb | 2015-08-04 17:04:11 +0200 | [diff] [blame] | 373 | #endif |
| 374 | |
Hans de Goede | 1603082 | 2014-09-18 21:03:34 +0200 | [diff] [blame] | 375 | #ifdef CONFIG_USB_KEYBOARD |
| 376 | #define CONFIG_CONSOLE_MUX |
| 377 | #define CONFIG_PREBOOT |
| 378 | #define CONFIG_SYS_STDIO_DEREGISTER |
Hans de Goede | 8050873 | 2015-05-13 14:42:18 +0200 | [diff] [blame] | 379 | #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE |
Hans de Goede | 1603082 | 2014-09-18 21:03:34 +0200 | [diff] [blame] | 380 | #endif |
| 381 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 382 | #if !defined CONFIG_ENV_IS_IN_MMC && \ |
| 383 | !defined CONFIG_ENV_IS_IN_NAND && \ |
| 384 | !defined CONFIG_ENV_IS_IN_FAT && \ |
| 385 | !defined CONFIG_ENV_IS_IN_SPI_FLASH |
| 386 | #define CONFIG_ENV_IS_NOWHERE |
| 387 | #endif |
| 388 | |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 389 | #define CONFIG_MISC_INIT_R |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 390 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 391 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 392 | #ifndef CONFIG_SPL_BUILD |
| 393 | #include <config_distro_defaults.h> |
Hans de Goede | 6f2da07 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 394 | |
Siarhei Siamashka | c8907a3 | 2015-01-08 09:02:32 +0200 | [diff] [blame] | 395 | /* Enable pre-console buffer to get complete log on the VGA console */ |
| 396 | #define CONFIG_PRE_CONSOLE_BUFFER |
Hans de Goede | e355da0 | 2015-05-05 13:13:36 +0200 | [diff] [blame] | 397 | #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ |
Siarhei Siamashka | c8907a3 | 2015-01-08 09:02:32 +0200 | [diff] [blame] | 398 | |
Andre Przywara | 65d2d1d | 2016-05-04 22:15:32 +0100 | [diff] [blame] | 399 | #ifdef CONFIG_ARM64 |
| 400 | /* |
| 401 | * Boards seem to come with at least 512MB of DRAM. |
| 402 | * The kernel should go at 512K, which is the default text offset (that will |
| 403 | * be adjusted at runtime if needed). |
| 404 | * There is no compression for arm64 kernels (yet), so leave some space |
| 405 | * for really big kernels, say 256MB for now. |
| 406 | * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd. |
| 407 | * Align the initrd to a 2MB page. |
| 408 | */ |
| 409 | #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) |
| 410 | #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) |
| 411 | #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) |
| 412 | #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) |
| 413 | #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000)) |
| 414 | |
| 415 | #else |
Hans de Goede | 3400a7c | 2014-12-24 16:08:30 +0100 | [diff] [blame] | 416 | /* |
Hans de Goede | 9f7dc80 | 2015-09-13 17:16:54 +0200 | [diff] [blame] | 417 | * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. |
Hans de Goede | 3400a7c | 2014-12-24 16:08:30 +0100 | [diff] [blame] | 418 | * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, |
| 419 | * 1M script, 1M pxe and the ramdisk at the end. |
| 420 | */ |
Siarhei Siamashka | db41834 | 2015-10-25 06:44:46 +0200 | [diff] [blame] | 421 | |
| 422 | #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) |
| 423 | #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) |
| 424 | #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) |
| 425 | #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) |
| 426 | #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000)) |
Andre Przywara | 65d2d1d | 2016-05-04 22:15:32 +0100 | [diff] [blame] | 427 | #endif |
Siarhei Siamashka | db41834 | 2015-10-25 06:44:46 +0200 | [diff] [blame] | 428 | |
Hans de Goede | 2f60c31 | 2014-08-01 09:37:58 +0200 | [diff] [blame] | 429 | #define MEM_LAYOUT_ENV_SETTINGS \ |
Hans de Goede | 9f7dc80 | 2015-09-13 17:16:54 +0200 | [diff] [blame] | 430 | "bootm_size=0xa000000\0" \ |
Siarhei Siamashka | db41834 | 2015-10-25 06:44:46 +0200 | [diff] [blame] | 431 | "kernel_addr_r=" KERNEL_ADDR_R "\0" \ |
| 432 | "fdt_addr_r=" FDT_ADDR_R "\0" \ |
| 433 | "scriptaddr=" SCRIPT_ADDR_R "\0" \ |
| 434 | "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ |
| 435 | "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" |
| 436 | |
| 437 | #define DFU_ALT_INFO_RAM \ |
| 438 | "dfu_alt_info_ram=" \ |
| 439 | "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ |
| 440 | "fdt ram " FDT_ADDR_R " 0x100000;" \ |
| 441 | "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0" |
Hans de Goede | 2f60c31 | 2014-08-01 09:37:58 +0200 | [diff] [blame] | 442 | |
Chen-Yu Tsai | 4fb00c7 | 2014-10-07 15:11:49 +0800 | [diff] [blame] | 443 | #ifdef CONFIG_MMC |
| 444 | #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) |
Karsten Merker | 16b9163 | 2015-12-16 20:59:40 +0100 | [diff] [blame] | 445 | #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 |
| 446 | #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1) |
| 447 | #else |
| 448 | #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) |
| 449 | #endif |
Chen-Yu Tsai | 4fb00c7 | 2014-10-07 15:11:49 +0800 | [diff] [blame] | 450 | #else |
| 451 | #define BOOT_TARGET_DEVICES_MMC(func) |
Karsten Merker | 16b9163 | 2015-12-16 20:59:40 +0100 | [diff] [blame] | 452 | #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) |
Chen-Yu Tsai | 4fb00c7 | 2014-10-07 15:11:49 +0800 | [diff] [blame] | 453 | #endif |
| 454 | |
Hans de Goede | 6f2da07 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 455 | #ifdef CONFIG_AHCI |
| 456 | #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) |
| 457 | #else |
| 458 | #define BOOT_TARGET_DEVICES_SCSI(func) |
| 459 | #endif |
| 460 | |
Paul Kocialkowski | 00529e3 | 2015-08-04 17:04:09 +0200 | [diff] [blame] | 461 | #ifdef CONFIG_USB_STORAGE |
Chen-Yu Tsai | ee0cf16 | 2014-10-03 20:16:22 +0800 | [diff] [blame] | 462 | #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) |
| 463 | #else |
| 464 | #define BOOT_TARGET_DEVICES_USB(func) |
| 465 | #endif |
| 466 | |
Bernhard Nortmann | 8fd443c | 2015-09-17 18:52:53 +0200 | [diff] [blame] | 467 | /* FEL boot support, auto-execute boot.scr if a script address was provided */ |
| 468 | #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \ |
| 469 | "bootcmd_fel=" \ |
| 470 | "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \ |
| 471 | "echo '(FEL boot)'; " \ |
| 472 | "source ${fel_scriptaddr}; " \ |
| 473 | "fi\0" |
| 474 | #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \ |
| 475 | "fel " |
| 476 | |
Hans de Goede | 6f2da07 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 477 | #define BOOT_TARGET_DEVICES(func) \ |
Bernhard Nortmann | 8fd443c | 2015-09-17 18:52:53 +0200 | [diff] [blame] | 478 | func(FEL, fel, na) \ |
Chen-Yu Tsai | 4fb00c7 | 2014-10-07 15:11:49 +0800 | [diff] [blame] | 479 | BOOT_TARGET_DEVICES_MMC(func) \ |
Karsten Merker | 16b9163 | 2015-12-16 20:59:40 +0100 | [diff] [blame] | 480 | BOOT_TARGET_DEVICES_MMC_EXTRA(func) \ |
Hans de Goede | 6f2da07 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 481 | BOOT_TARGET_DEVICES_SCSI(func) \ |
Chen-Yu Tsai | ee0cf16 | 2014-10-03 20:16:22 +0800 | [diff] [blame] | 482 | BOOT_TARGET_DEVICES_USB(func) \ |
Hans de Goede | 6f2da07 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 483 | func(PXE, pxe, na) \ |
| 484 | func(DHCP, dhcp, na) |
| 485 | |
Hans de Goede | 8ff8bc8 | 2015-10-09 17:11:15 +0100 | [diff] [blame] | 486 | #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT |
| 487 | #define BOOTCMD_SUNXI_COMPAT \ |
| 488 | "bootcmd_sunxi_compat=" \ |
| 489 | "setenv root /dev/mmcblk0p3 rootwait; " \ |
| 490 | "if ext2load mmc 0 0x44000000 uEnv.txt; then " \ |
| 491 | "echo Loaded environment from uEnv.txt; " \ |
| 492 | "env import -t 0x44000000 ${filesize}; " \ |
| 493 | "fi; " \ |
| 494 | "setenv bootargs console=${console} root=${root} ${extraargs}; " \ |
| 495 | "ext2load mmc 0 0x43000000 script.bin && " \ |
| 496 | "ext2load mmc 0 0x48000000 uImage && " \ |
| 497 | "bootm 0x48000000\0" |
| 498 | #else |
| 499 | #define BOOTCMD_SUNXI_COMPAT |
| 500 | #endif |
| 501 | |
Hans de Goede | 6f2da07 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 502 | #include <config_distro_bootcmd.h> |
| 503 | |
Hans de Goede | 1603082 | 2014-09-18 21:03:34 +0200 | [diff] [blame] | 504 | #ifdef CONFIG_USB_KEYBOARD |
| 505 | #define CONSOLE_STDIN_SETTINGS \ |
| 506 | "preboot=usb start\0" \ |
| 507 | "stdin=serial,usbkbd\0" |
| 508 | #else |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 509 | #define CONSOLE_STDIN_SETTINGS \ |
| 510 | "stdin=serial\0" |
Hans de Goede | 1603082 | 2014-09-18 21:03:34 +0200 | [diff] [blame] | 511 | #endif |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 512 | |
| 513 | #ifdef CONFIG_VIDEO |
| 514 | #define CONSOLE_STDOUT_SETTINGS \ |
| 515 | "stdout=serial,vga\0" \ |
| 516 | "stderr=serial,vga\0" |
| 517 | #else |
| 518 | #define CONSOLE_STDOUT_SETTINGS \ |
| 519 | "stdout=serial\0" \ |
| 520 | "stderr=serial\0" |
| 521 | #endif |
| 522 | |
| 523 | #define CONSOLE_ENV_SETTINGS \ |
| 524 | CONSOLE_STDIN_SETTINGS \ |
| 525 | CONSOLE_STDOUT_SETTINGS |
| 526 | |
Hans de Goede | 6f2da07 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 527 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Luc Verhaegen | b01df1e | 2014-08-13 07:55:06 +0200 | [diff] [blame] | 528 | CONSOLE_ENV_SETTINGS \ |
Hans de Goede | 2f60c31 | 2014-08-01 09:37:58 +0200 | [diff] [blame] | 529 | MEM_LAYOUT_ENV_SETTINGS \ |
Siarhei Siamashka | db41834 | 2015-10-25 06:44:46 +0200 | [diff] [blame] | 530 | DFU_ALT_INFO_RAM \ |
Hans de Goede | 58bf2c0 | 2015-04-18 23:32:23 +0200 | [diff] [blame] | 531 | "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ |
Hans de Goede | 2f60c31 | 2014-08-01 09:37:58 +0200 | [diff] [blame] | 532 | "console=ttyS0,115200\0" \ |
Hans de Goede | 8ff8bc8 | 2015-10-09 17:11:15 +0100 | [diff] [blame] | 533 | BOOTCMD_SUNXI_COMPAT \ |
Hans de Goede | 6f2da07 | 2014-07-31 23:04:45 +0200 | [diff] [blame] | 534 | BOOTENV |
| 535 | |
| 536 | #else /* ifndef CONFIG_SPL_BUILD */ |
| 537 | #define CONFIG_EXTRA_ENV_SETTINGS |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 538 | #endif |
| 539 | |
| 540 | #endif /* _SUNXI_COMMON_CONFIG_H */ |