Jean-Christophe PLAGNIOL-VILLARD | f7e9f92 | 2009-05-22 20:23:51 +0200 | [diff] [blame] | 1 | /* |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame] | 2 | * (C) Copyright 2010 |
| 3 | * Reinhard Meyer, reinhard.meyer@emk-elektronik.de |
Jean-Christophe PLAGNIOL-VILLARD | f7e9f92 | 2009-05-22 20:23:51 +0200 | [diff] [blame] | 4 | * (C) Copyright 2009 |
| 5 | * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 26 | #include <common.h> |
Jens Scharsig | a4db1ca | 2010-02-03 22:46:58 +0100 | [diff] [blame] | 27 | |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 28 | #include <asm/arch/hardware.h> |
| 29 | #include <asm/arch/at91_pmc.h> |
Alexander Stein | 696c73b | 2010-09-13 08:26:39 +0200 | [diff] [blame] | 30 | #include <asm/arch/at91_pit.h> |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame] | 31 | #include <asm/arch/at91_gpbr.h> |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 32 | #include <asm/arch/clk.h> |
| 33 | #include <asm/arch/io.h> |
| 34 | |
Achim Ehrlich | 443873d | 2010-02-24 10:29:16 +0100 | [diff] [blame] | 35 | #ifndef CONFIG_SYS_AT91_MAIN_CLOCK |
| 36 | #define CONFIG_SYS_AT91_MAIN_CLOCK 0 |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 37 | #endif |
| 38 | |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 39 | int arch_cpu_init(void) |
| 40 | { |
Achim Ehrlich | 443873d | 2010-02-24 10:29:16 +0100 | [diff] [blame] | 41 | return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 42 | } |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 43 | |
Alexander Stein | 696c73b | 2010-09-13 08:26:39 +0200 | [diff] [blame] | 44 | void arch_preboot_os(void) |
| 45 | { |
| 46 | ulong cpiv; |
Reinhard Meyer | e260d0b | 2010-11-03 15:39:55 +0100 | [diff] [blame] | 47 | at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT; |
Alexander Stein | 696c73b | 2010-09-13 08:26:39 +0200 | [diff] [blame] | 48 | |
| 49 | cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir)); |
| 50 | |
| 51 | /* |
| 52 | * Disable PITC |
| 53 | * Add 0x1000 to current counter to stop it faster |
| 54 | * without waiting for wrapping back to 0 |
| 55 | */ |
| 56 | writel(cpiv + 0x1000, &pit->mr); |
| 57 | } |
| 58 | |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 59 | #if defined(CONFIG_DISPLAY_CPUINFO) |
| 60 | int print_cpuinfo(void) |
| 61 | { |
| 62 | char buf[32]; |
| 63 | |
Reinhard Meyer | e260d0b | 2010-11-03 15:39:55 +0100 | [diff] [blame] | 64 | printf("CPU: %s\n", ATMEL_CPU_NAME); |
Jean-Christophe PLAGNIOL-VILLARD | df6d53b | 2009-05-31 14:53:18 +0200 | [diff] [blame] | 65 | printf("Crystal frequency: %8s MHz\n", |
| 66 | strmhz(buf, get_main_clk_rate())); |
| 67 | printf("CPU clock : %8s MHz\n", |
| 68 | strmhz(buf, get_cpu_clk_rate())); |
| 69 | printf("Master clock : %8s MHz\n", |
| 70 | strmhz(buf, get_mck_clk_rate())); |
| 71 | |
| 72 | return 0; |
| 73 | } |
| 74 | #endif |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 75 | |
| 76 | #ifdef CONFIG_BOOTCOUNT_LIMIT |
| 77 | /* |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame] | 78 | * We combine the BOOTCOUNT_MAGIC and bootcount in one 32-bit register. |
| 79 | * This is done so we need to use only one of the four GPBR registers. |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 80 | */ |
| 81 | void bootcount_store (ulong a) |
| 82 | { |
Reinhard Meyer | e260d0b | 2010-11-03 15:39:55 +0100 | [diff] [blame] | 83 | at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 84 | |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame] | 85 | writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff), |
| 86 | &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 87 | } |
| 88 | |
| 89 | ulong bootcount_load (void) |
| 90 | { |
Reinhard Meyer | e260d0b | 2010-11-03 15:39:55 +0100 | [diff] [blame] | 91 | at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 92 | |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame] | 93 | ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); |
| 94 | if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 95 | return 0; |
| 96 | else |
Reinhard Meyer | db364ae | 2010-09-14 16:38:57 +0200 | [diff] [blame] | 97 | return val & 0x0000ffff; |
Anders Darander | e15c073 | 2010-02-25 15:57:03 +0100 | [diff] [blame] | 98 | } |
| 99 | |
| 100 | #endif /* CONFIG_BOOTCOUNT_LIMIT */ |