blob: 068340aa96499ef917b953141ed3ff504e0cd856 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ian Campbell6efe3692014-05-05 11:52:26 +01002/*
3 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 *
5 * (C) Copyright 2007-2011
6 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
7 * Tom Cubie <tangliang@allwinnertech.com>
8 *
9 * Configuration settings for the Allwinner sunxi series of boards.
Ian Campbell6efe3692014-05-05 11:52:26 +010010 */
11
12#ifndef _SUNXI_COMMON_CONFIG_H
13#define _SUNXI_COMMON_CONFIG_H
14
Hans de Goede22a1a532015-09-13 17:29:33 +020015#include <asm/arch/cpu.h>
Hans de Goeded241ecf2015-05-19 22:12:31 +020016#include <linux/stringify.h>
17
Andre Przywarad8362162017-04-26 01:32:48 +010018#ifdef CONFIG_ARM64
Jagan Tekia4e696b2017-11-10 22:21:09 +053019#define CONFIG_SYS_BOOTM_LEN (32 << 20)
Andre Przywarad8362162017-04-26 01:32:48 +010020#endif
21
Ian Campbell6efe3692014-05-05 11:52:26 +010022/* Serial & console */
Ian Campbell6efe3692014-05-05 11:52:26 +010023#define CONFIG_SYS_NS16550_SERIAL
24/* ns16550 reg in the low bits of cpu reg */
Icenowy Zhengb00ef022022-01-29 10:23:06 -050025#ifdef CONFIG_MACH_SUNIV
26/* suniv doesn't have apb2 and uart is connected to apb1 */
27#define CONFIG_SYS_NS16550_CLK 100000000
28#else
Ian Campbell6efe3692014-05-05 11:52:26 +010029#define CONFIG_SYS_NS16550_CLK 24000000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050030#endif
Thomas Chou00ad1f02015-11-19 21:48:13 +080031#ifndef CONFIG_DM_SERIAL
Simon Glass66648982014-10-30 20:25:50 -060032# define CONFIG_SYS_NS16550_REG_SIZE -4
33# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
34# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
35# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
36# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
37# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
38#endif
Ian Campbell6efe3692014-05-05 11:52:26 +010039
Paul Kocialkowskide05f942015-05-16 19:52:11 +020040/* CPU */
Paul Kocialkowskide05f942015-05-16 19:52:11 +020041
Hans de Goeded241ecf2015-05-19 22:12:31 +020042/*
43 * The DRAM Base differs between some models. We cannot use macros for the
44 * CONFIG_FOO defines which contain the DRAM base address since they end
45 * up unexpanded in include/autoconf.mk .
46 *
47 * So we have to have this #ifdef #else #endif block for these.
48 */
49#ifdef CONFIG_MACH_SUN9I
50#define SDRAM_OFFSET(x) 0x2##x
51#define CONFIG_SYS_SDRAM_BASE 0x20000000
Hans de Goeded241ecf2015-05-19 22:12:31 +020052#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050053#elif defined(CONFIG_MACH_SUNIV)
54#define SDRAM_OFFSET(x) 0x8##x
55#define CONFIG_SYS_SDRAM_BASE 0x80000000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050056#define CONFIG_SPL_BSS_START_ADDR 0x81f80000
Hans de Goeded241ecf2015-05-19 22:12:31 +020057#else
58#define SDRAM_OFFSET(x) 0x4##x
Ian Campbell6efe3692014-05-05 11:52:26 +010059#define CONFIG_SYS_SDRAM_BASE 0x40000000
Icenowy Zheng52e61882017-04-08 15:30:12 +080060/* V3s do not have enough memory to place code at 0x4a000000 */
Hans de Goeded241ecf2015-05-19 22:12:31 +020061#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
62#endif
63
64#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
Hans de Goeded241ecf2015-05-19 22:12:31 +020065
Hans de Goede0b95a282015-05-20 15:27:16 +020066/*
67 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
68 * slightly bigger. Note that it is possible to map the first 32 KiB of the
69 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
70 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
71 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080072 * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register
73 * is known yet.
74 * H6 has SRAM A1 at 0x00020000.
Hans de Goede0b95a282015-05-20 15:27:16 +020075 */
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080076#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
77/* FIXME: this may be larger on some SoCs */
78#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +010079
80#define CONFIG_SYS_INIT_SP_OFFSET \
81 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
82#define CONFIG_SYS_INIT_SP_ADDR \
83 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
84
Ian Campbell6efe3692014-05-05 11:52:26 +010085#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
86#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
87
Ian Campbella2ebf922014-07-18 20:38:41 +010088#ifdef CONFIG_AHCI
Bernhard Nortmannb4946db2015-06-10 10:51:40 +020089#define CONFIG_SYS_64BIT_LBA
Ian Campbella2ebf922014-07-18 20:38:41 +010090#endif
91
Hans de Goede3ce35f92015-08-16 14:48:22 +020092#ifdef CONFIG_NAND_SUNXI
Boris Brezillon94754ad2016-06-15 21:09:27 +020093#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
Boris Brezillon57f20382016-06-15 21:09:23 +020094#define CONFIG_SYS_MAX_NAND_DEVICE 8
Piotr Zierhoffere2b662b2015-07-23 14:33:03 +020095#endif
96
Ian Campbellb4e9f2f2014-05-05 14:42:31 +010097/* mmc config */
Ian Campbellb4e9f2f2014-05-05 14:42:31 +010098#define CONFIG_MMC_SUNXI_SLOT 0
Maxime Ripardd780cdc2017-02-27 18:22:03 +010099
Emmanuel Vadot63b45782016-11-05 20:51:11 +0100100#define CONFIG_SYS_MMC_MAX_DEVICE 4
Ian Campbellb4e9f2f2014-05-05 14:42:31 +0100101
Ian Campbell6efe3692014-05-05 11:52:26 +0100102/*
103 * Miscellaneous configurable options
104 */
Ian Campbell428734e2014-10-07 14:20:30 +0100105#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
106#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
Ian Campbell6efe3692014-05-05 11:52:26 +0100107
Ian Campbell6efe3692014-05-05 11:52:26 +0100108/* standalone support */
Hans de Goeded241ecf2015-05-19 22:12:31 +0200109#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
Ian Campbell6efe3692014-05-05 11:52:26 +0100110
Ian Campbell6efe3692014-05-05 11:52:26 +0100111/* FLASH and environment organization */
112
Boris Brezillon8646f2a2015-07-27 16:21:26 +0200113#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +0100114
Icenowy Zheng5e6dd272018-07-21 16:20:20 +0800115/*
116 * We cannot use expressions here, because expressions won't be evaluated in
117 * autoconf.mk.
118 */
119#if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000
Siarhei Siamashka6b0cd012017-04-26 01:32:49 +0100120#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
Andre Przywaracced7482017-04-26 01:32:42 +0100121#ifdef CONFIG_ARM64
122/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
123#define LOW_LEVEL_SRAM_STACK 0x00054000
124#else
Andre Przywarade454ec2017-02-16 01:20:23 +0000125#define LOW_LEVEL_SRAM_STACK 0x00018000
Andre Przywaracced7482017-04-26 01:32:42 +0100126#endif /* !CONFIG_ARM64 */
Icenowy Zheng73210762018-07-21 16:20:24 +0800127#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
Jernej Skrabece638e052021-01-11 21:11:46 +0100128#ifdef CONFIG_MACH_SUN50I_H616
129#define CONFIG_SPL_MAX_SIZE 0xbfa0 /* 48 KiB */
130#define LOW_LEVEL_SRAM_STACK 0x58000
131#else
Icenowy Zheng73210762018-07-21 16:20:24 +0800132#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
133/* end of SRAM A2 on H6 for now */
134#define LOW_LEVEL_SRAM_STACK 0x00118000
Jernej Skrabece638e052021-01-11 21:11:46 +0100135#endif
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200136#else
Siarhei Siamashka6b0cd012017-04-26 01:32:49 +0100137#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
Andre Przywarade454ec2017-02-16 01:20:23 +0000138#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200139#endif
Ian Campbell140d8322014-05-05 11:52:30 +0100140
Andre Przywarade454ec2017-02-16 01:20:23 +0000141#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
142
Jernej Skrabece638e052021-01-11 21:11:46 +0100143#ifndef CONFIG_MACH_SUN50I_H616
Ian Campbell140d8322014-05-05 11:52:30 +0100144#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
Jernej Skrabece638e052021-01-11 21:11:46 +0100145#endif
Ian Campbell140d8322014-05-05 11:52:30 +0100146
Hans de Goede73d7d422014-06-09 11:37:00 +0200147/* Ethernet support */
Hans de Goede73d7d422014-06-09 11:37:00 +0200148
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200149#ifdef CONFIG_USB_EHCI_HCD
Hans de Goede804fa572015-05-10 14:10:27 +0200150#define CONFIG_USB_OHCI_NEW
Hans de Goede804fa572015-05-10 14:10:27 +0200151#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Hans de Goedef494cad2015-01-11 17:17:00 +0100152#endif
153
Ian Campbell6efe3692014-05-05 11:52:26 +0100154#ifndef CONFIG_SPL_BUILD
Hans de Goede6f2da072014-07-31 23:04:45 +0200155
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100156#ifdef CONFIG_ARM64
157/*
158 * Boards seem to come with at least 512MB of DRAM.
159 * The kernel should go at 512K, which is the default text offset (that will
160 * be adjusted at runtime if needed).
161 * There is no compression for arm64 kernels (yet), so leave some space
162 * for really big kernels, say 256MB for now.
163 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100164 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100165#define BOOTM_SIZE __stringify(0xa000000)
166#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100167#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000))
168#define KERNEL_COMP_SIZE __stringify(0xb000000)
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100169#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
170#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
171#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
172#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
173#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000))
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100174
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500175#elif defined(CONFIG_MACH_SUN8I_V3S)
176/*
177 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
178 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
179 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
180 */
181#define BOOTM_SIZE __stringify(0x2e00000)
182#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
183#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
184#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
185#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
186#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
187#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000))
188
189#elif defined(CONFIG_MACH_SUNIV)
190/*
191 * 32M RAM minus 1MB heap + 8MB for u-boot, stack, fb, etc.
192 * 8M uncompressed kernel, 4M compressed kernel, 512K fdt,
193 * 512K script, 512K pxe and the ramdisk at the end.
194 */
195#define BOOTM_SIZE __stringify(0x1700000)
196#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0500000))
197#define FDT_ADDR_R __stringify(SDRAM_OFFSET(0C00000))
198#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(0C50000))
199#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(0D00000))
200#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(0D50000))
201#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(0D60000))
202
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100203#else
Hans de Goede3400a7c2014-12-24 16:08:30 +0100204/*
Hans de Goede9f7dc802015-09-13 17:16:54 +0200205 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
Hans de Goede3400a7c2014-12-24 16:08:30 +0100206 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100207 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
Hans de Goede3400a7c2014-12-24 16:08:30 +0100208 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100209#define BOOTM_SIZE __stringify(0xa000000)
210#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
211#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
212#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
213#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
214#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000))
215#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000))
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100216#endif
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200217
Hans de Goede2f60c312014-08-01 09:37:58 +0200218#define MEM_LAYOUT_ENV_SETTINGS \
Icenowy Zheng52e61882017-04-08 15:30:12 +0800219 "bootm_size=" BOOTM_SIZE "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200220 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
221 "fdt_addr_r=" FDT_ADDR_R "\0" \
222 "scriptaddr=" SCRIPT_ADDR_R "\0" \
223 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100224 "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200225 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
226
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100227#ifdef CONFIG_ARM64
228
229#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
230 "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
231 "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
232
233#else
234
235#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
236
237#endif
238
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200239#define DFU_ALT_INFO_RAM \
240 "dfu_alt_info_ram=" \
241 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
242 "fdt ram " FDT_ADDR_R " 0x100000;" \
243 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
Hans de Goede2f60c312014-08-01 09:37:58 +0200244
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800245#ifdef CONFIG_MMC
Karsten Merker16b91632015-12-16 20:59:40 +0100246#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
Maxime Ripard65cefba2017-08-23 10:12:22 +0200247#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
248 BOOTENV_DEV_MMC(MMC, mmc, 0) \
249 BOOTENV_DEV_MMC(MMC, mmc, 1) \
250 "bootcmd_mmc_auto=" \
251 "if test ${mmc_bootdev} -eq 1; then " \
252 "run bootcmd_mmc1; " \
253 "run bootcmd_mmc0; " \
254 "elif test ${mmc_bootdev} -eq 0; then " \
255 "run bootcmd_mmc0; " \
256 "run bootcmd_mmc1; " \
257 "fi\0"
258
259#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
260 "mmc_auto "
261
262#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
Karsten Merker16b91632015-12-16 20:59:40 +0100263#else
Maxime Ripard65cefba2017-08-23 10:12:22 +0200264#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
Karsten Merker16b91632015-12-16 20:59:40 +0100265#endif
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800266#else
267#define BOOT_TARGET_DEVICES_MMC(func)
268#endif
269
Hans de Goede6f2da072014-07-31 23:04:45 +0200270#ifdef CONFIG_AHCI
271#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
272#else
273#define BOOT_TARGET_DEVICES_SCSI(func)
274#endif
275
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200276#ifdef CONFIG_USB_STORAGE
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800277#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
278#else
279#define BOOT_TARGET_DEVICES_USB(func)
280#endif
281
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100282#ifdef CONFIG_CMD_PXE
283#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
284#else
285#define BOOT_TARGET_DEVICES_PXE(func)
286#endif
287
288#ifdef CONFIG_CMD_DHCP
289#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
290#else
291#define BOOT_TARGET_DEVICES_DHCP(func)
292#endif
293
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200294/* FEL boot support, auto-execute boot.scr if a script address was provided */
295#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
296 "bootcmd_fel=" \
297 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
298 "echo '(FEL boot)'; " \
299 "source ${fel_scriptaddr}; " \
300 "fi\0"
301#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
302 "fel "
303
Hans de Goede6f2da072014-07-31 23:04:45 +0200304#define BOOT_TARGET_DEVICES(func) \
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200305 func(FEL, fel, na) \
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800306 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede6f2da072014-07-31 23:04:45 +0200307 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800308 BOOT_TARGET_DEVICES_USB(func) \
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100309 BOOT_TARGET_DEVICES_PXE(func) \
310 BOOT_TARGET_DEVICES_DHCP(func)
Hans de Goede6f2da072014-07-31 23:04:45 +0200311
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100312#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
313#define BOOTCMD_SUNXI_COMPAT \
314 "bootcmd_sunxi_compat=" \
315 "setenv root /dev/mmcblk0p3 rootwait; " \
316 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
317 "echo Loaded environment from uEnv.txt; " \
318 "env import -t 0x44000000 ${filesize}; " \
319 "fi; " \
320 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
321 "ext2load mmc 0 0x43000000 script.bin && " \
322 "ext2load mmc 0 0x48000000 uImage && " \
323 "bootm 0x48000000\0"
324#else
325#define BOOTCMD_SUNXI_COMPAT
326#endif
327
Hans de Goede6f2da072014-07-31 23:04:45 +0200328#include <config_distro_bootcmd.h>
329
Hans de Goede16030822014-09-18 21:03:34 +0200330#ifdef CONFIG_USB_KEYBOARD
331#define CONSOLE_STDIN_SETTINGS \
Hans de Goede16030822014-09-18 21:03:34 +0200332 "stdin=serial,usbkbd\0"
333#else
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200334#define CONSOLE_STDIN_SETTINGS \
335 "stdin=serial\0"
Hans de Goede16030822014-09-18 21:03:34 +0200336#endif
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200337
Jagan Teki5bc34cb2021-02-22 00:12:34 +0000338#ifdef CONFIG_DM_VIDEO
Jernej Skrabec8d91b462017-03-27 19:22:32 +0200339#define CONSOLE_STDOUT_SETTINGS \
340 "stdout=serial,vidconsole\0" \
341 "stderr=serial,vidconsole\0"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200342#else
343#define CONSOLE_STDOUT_SETTINGS \
344 "stdout=serial\0" \
345 "stderr=serial\0"
346#endif
347
Maxime Ripardbe1d3562017-02-27 18:22:11 +0100348#ifdef CONFIG_MTDIDS_DEFAULT
349#define SUNXI_MTDIDS_DEFAULT \
350 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
351#else
352#define SUNXI_MTDIDS_DEFAULT
353#endif
354
355#ifdef CONFIG_MTDPARTS_DEFAULT
356#define SUNXI_MTDPARTS_DEFAULT \
357 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
358#else
359#define SUNXI_MTDPARTS_DEFAULT
360#endif
361
Maxime Ripard32c544d2017-11-14 21:24:00 +0100362#define PARTS_DEFAULT \
363 "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \
364 "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \
365 "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \
366 "name=system,size=-,uuid=${uuid_gpt_system};"
367
368#define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b"
369
370#ifdef CONFIG_ARM64
371#define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae"
372#else
373#define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3"
374#endif
375
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200376#define CONSOLE_ENV_SETTINGS \
377 CONSOLE_STDIN_SETTINGS \
378 CONSOLE_STDOUT_SETTINGS
379
Andreas Färber26f00d22017-04-14 18:44:47 +0200380#ifdef CONFIG_ARM64
381#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
382#else
383#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
384#endif
385
Hans de Goede6f2da072014-07-31 23:04:45 +0200386#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200387 CONSOLE_ENV_SETTINGS \
Hans de Goede2f60c312014-08-01 09:37:58 +0200388 MEM_LAYOUT_ENV_SETTINGS \
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100389 MEM_LAYOUT_ENV_EXTRA_SETTINGS \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200390 DFU_ALT_INFO_RAM \
Andreas Färber26f00d22017-04-14 18:44:47 +0200391 "fdtfile=" FDTFILE "\0" \
Hans de Goede2f60c312014-08-01 09:37:58 +0200392 "console=ttyS0,115200\0" \
Maxime Ripardbe1d3562017-02-27 18:22:11 +0100393 SUNXI_MTDIDS_DEFAULT \
394 SUNXI_MTDPARTS_DEFAULT \
Maxime Ripard32c544d2017-11-14 21:24:00 +0100395 "uuid_gpt_esp=" UUID_GPT_ESP "\0" \
396 "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \
397 "partitions=" PARTS_DEFAULT "\0" \
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100398 BOOTCMD_SUNXI_COMPAT \
Hans de Goede6f2da072014-07-31 23:04:45 +0200399 BOOTENV
400
401#else /* ifndef CONFIG_SPL_BUILD */
402#define CONFIG_EXTRA_ENV_SETTINGS
Ian Campbell6efe3692014-05-05 11:52:26 +0100403#endif
404
405#endif /* _SUNXI_COMMON_CONFIG_H */