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Yuantian Tang92f18ff2019-04-10 16:43:34 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Yangbo Lubb32e682021-06-03 10:51:19 +08003 * Copyright 2019-2021 NXP
Yuantian Tang92f18ff2019-04-10 16:43:34 +08004 */
5
6#ifndef __L1028A_COMMON_H
7#define __L1028A_COMMON_H
8
Yuantian Tang92f18ff2019-04-10 16:43:34 +08009#include <asm/arch/stream_id_lsch3.h>
10#include <asm/arch/config.h>
11#include <asm/arch/soc.h>
12
13/* Link Definitions */
14#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
15
Yuantian Tang92f18ff2019-04-10 16:43:34 +080016#define CONFIG_VERY_BIG_RAM
17#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
18#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
19#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
20#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
21#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
22
Yuantian Tang92f18ff2019-04-10 16:43:34 +080023/*
24 * SMP Definitinos
25 */
Michael Wallef056e0f2020-06-01 21:53:26 +020026#define CPU_RELEASE_ADDR secondary_boot_addr
Yuantian Tang92f18ff2019-04-10 16:43:34 +080027
Biwen Lie7c3b042021-02-05 19:01:57 +080028/* GPIO */
Biwen Lie7c3b042021-02-05 19:01:57 +080029
Yuantian Tang92f18ff2019-04-10 16:43:34 +080030/* I2C */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080031
32/* Serial Port */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080033#define CONFIG_SYS_NS16550_SERIAL
34#define CONFIG_SYS_NS16550_REG_SIZE 1
35#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
36
Yuantian Tang92f18ff2019-04-10 16:43:34 +080037/* Miscellaneous configurable options */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080038
39/* Physical Memory Map */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080040
41#define CONFIG_HWCONFIG
42#define HWCONFIG_BUFFER_SIZE 128
43
Yuantian Tang92f18ff2019-04-10 16:43:34 +080044#define BOOT_TARGET_DEVICES(func) \
45 func(MMC, mmc, 0) \
Yuantian Tang7f3da7b2019-11-04 15:10:45 +080046 func(MMC, mmc, 1) \
Yuantian Tang7a224e72020-03-10 11:31:05 +080047 func(USB, usb, 0) \
48 func(DHCP, dhcp, na)
Yuantian Tang92f18ff2019-04-10 16:43:34 +080049#include <config_distro_bootcmd.h>
50
Yuantian Tang7f3da7b2019-11-04 15:10:45 +080051#define XSPI_NOR_BOOTCOMMAND \
52 "run xspi_hdploadcmd; run distro_bootcmd; run xspi_bootcmd; " \
53 "env exists secureboot && esbc_halt;;"
Yuantian Tang92f18ff2019-04-10 16:43:34 +080054#define SD_BOOTCOMMAND \
Yuantian Tang7f3da7b2019-11-04 15:10:45 +080055 "run sd_hdploadcmd; run distro_bootcmd;run sd_bootcmd; " \
56 "env exists secureboot && esbc_halt;"
57#define SD2_BOOTCOMMAND \
58 "run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \
Yuantian Tang92f18ff2019-04-10 16:43:34 +080059 "env exists secureboot && esbc_halt;"
60
61/* Monitor Command Prompt */
62#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
63#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
64 sizeof(CONFIG_SYS_PROMPT) + 16)
65#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
66
Yuantian Tang92f18ff2019-04-10 16:43:34 +080067#define CONFIG_SYS_MAXARGS 64 /* max command args */
68
69#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
70
Yuantian Tang92f18ff2019-04-10 16:43:34 +080071#define OCRAM_NONSECURE_SIZE 0x00010000
Yuantian Tang92f18ff2019-04-10 16:43:34 +080072#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
Yuantian Tang92f18ff2019-04-10 16:43:34 +080073
Yuantian Tang92f18ff2019-04-10 16:43:34 +080074/* I2C bus multiplexer */
75#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
76#define I2C_MUX_CH_DEFAULT 0x8
77
78/* EEPROM */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080079#define CONFIG_SYS_I2C_EEPROM_NXID
80#define CONFIG_SYS_EEPROM_BUS_NUM 0
Yuantian Tang92f18ff2019-04-10 16:43:34 +080081
Wen He41e63db2019-11-18 13:26:09 +080082/* DisplayPort */
83#define DP_PWD_EN_DEFAULT_MASK 0x8
84
Udit Agarwal22ec2382019-11-07 16:11:32 +000085#ifdef CONFIG_NXP_ESBC
Yuantian Tang029d8ab2019-05-24 14:36:27 +080086#include <asm/fsl_secure_boot.h>
87#endif
88
Yuantian Tang92f18ff2019-04-10 16:43:34 +080089#endif /* __L1028A_COMMON_H */