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Yuantian Tang92f18ff2019-04-10 16:43:34 +08001// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * NXP ls1028ARDB device tree source
4 *
5 * Copyright 2019 NXP
6 *
7 */
8
9/dts-v1/;
10
11#include "fsl-ls1028a.dtsi"
12
13/ {
14 model = "NXP Layerscape 1028a RDB Board";
15 compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
Kuldeep Singhbaab2462019-11-06 16:38:00 +053016 aliases {
17 spi0 = &fspi;
18 };
Yuantian Tang92f18ff2019-04-10 16:43:34 +080019};
20
21&dspi0 {
22 status = "okay";
23};
24
25&dspi1 {
26 status = "okay";
27};
28
29&dspi2 {
30 status = "okay";
31};
32
33&esdhc0 {
34 status = "okay";
35};
36
37&esdhc1 {
38 status = "okay";
Yinbo Zhu0700bda2019-07-16 15:09:10 +080039 mmc-hs200-1_8v;
Yuantian Tang92f18ff2019-04-10 16:43:34 +080040};
41
Kuldeep Singhbaab2462019-11-06 16:38:00 +053042&fspi {
43 status = "okay";
44
45 mt35xu02g0: flash@0 {
46 #address-cells = <1>;
47 #size-cells = <1>;
48 compatible = "jedec,spi-nor";
49 spi-max-frequency = <50000000>;
50 reg = <0>;
Kuldeep Singhf1b22292020-03-14 18:23:55 +053051 spi-rx-bus-width = <8>;
52 spi-tx-bus-width = <1>;
Kuldeep Singhbaab2462019-11-06 16:38:00 +053053 };
54};
55
Yuantian Tang92f18ff2019-04-10 16:43:34 +080056&i2c0 {
57 status = "okay";
Chuanhua Hane6f372b2019-07-10 21:16:52 +080058 u-boot,dm-pre-reloc;
59
60 i2c-mux@77 {
61
62 compatible = "nxp,pca9547";
63 reg = <0x77>;
64 #address-cells = <1>;
65 #size-cells = <0>;
66
67 i2c@3 {
68 #address-cells = <1>;
69 #size-cells = <0>;
70 reg = <0x3>;
71
72 rtc@51 {
73 compatible = "pcf2127-rtc";
74 reg = <0x51>;
75 };
76 };
77 };
Yuantian Tang92f18ff2019-04-10 16:43:34 +080078};
79
80&i2c1 {
81 status = "okay";
82};
83
84&i2c2 {
85 status = "okay";
86};
87
88&i2c3 {
89 status = "okay";
90};
91
92&i2c4 {
93 status = "okay";
94};
95
96&i2c5 {
97 status = "okay";
98};
99
100&i2c6 {
101 status = "okay";
102};
103
104&i2c7 {
105 status = "okay";
106};
107
108&sata {
109 status = "okay";
110};
111
112&serial0 {
113 status = "okay";
114};
115
116&serial1 {
117 status = "okay";
118};
119
120&usb1 {
121 status = "okay";
122};
123
124&usb2 {
125 status = "okay";
126};
Alex Marginean3be715e2019-07-03 12:11:43 +0300127
128&enetc0 {
129 status = "okay";
130 phy-mode = "sgmii";
131 phy-handle = <&rdb_phy0>;
132};
133
134&mdio0 {
135 status = "okay";
136 rdb_phy0: phy@2 {
137 reg = <2>;
138 };
139};