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git01.mediatek.com / filogic / uboot / e6f372b19dddb7bc7f899a9290c9ce20fb3fd48b / . / arch / arm / dts / fsl-ls1028a-rdb.dts
blob: d18cf6d5aebd30f3d47b64fa8e5c9573f21f68c7 [file] [log] [blame]
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * NXP ls1028ARDB device tree source
4 *
5 * Copyright 2019 NXP
6 *
7 */
8
9/dts-v1/;
10
11#include "fsl-ls1028a.dtsi"
12
13/ {
14 model = "NXP Layerscape 1028a RDB Board";
15 compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
16};
17
18&dspi0 {
19 status = "okay";
20};
21
22&dspi1 {
23 status = "okay";
24};
25
26&dspi2 {
27 status = "okay";
28};
29
30&esdhc0 {
31 status = "okay";
32};
33
34&esdhc1 {
35 status = "okay";
36};
37
38&i2c0 {
39 status = "okay";
Chuanhua Hane6f372b2019-07-10 21:16:52 +0800[diff] [blame^]40 u-boot,dm-pre-reloc;
41
42 i2c-mux@77 {
43
44 compatible = "nxp,pca9547";
45 reg = <0x77>;
46 #address-cells = <1>;
47 #size-cells = <0>;
48
49 i2c@3 {
50 #address-cells = <1>;
51 #size-cells = <0>;
52 reg = <0x3>;
53
54 rtc@51 {
55 compatible = "pcf2127-rtc";
56 reg = <0x51>;
57 };
58 };
59 };
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]60};
61
62&i2c1 {
63 status = "okay";
64};
65
66&i2c2 {
67 status = "okay";
68};
69
70&i2c3 {
71 status = "okay";
72};
73
74&i2c4 {
75 status = "okay";
76};
77
78&i2c5 {
79 status = "okay";
80};
81
82&i2c6 {
83 status = "okay";
84};
85
86&i2c7 {
87 status = "okay";
88};
89
90&sata {
91 status = "okay";
92};
93
94&serial0 {
95 status = "okay";
96};
97
98&serial1 {
99 status = "okay";
100};
101
102&usb1 {
103 status = "okay";
104};
105
106&usb2 {
107 status = "okay";
108};
Alex Marginean3be715e2019-07-03 12:11:43 +0300[diff] [blame]109
110&enetc0 {
111 status = "okay";
112 phy-mode = "sgmii";
113 phy-handle = <&rdb_phy0>;
114};
115
116&mdio0 {
117 status = "okay";
118 rdb_phy0: phy@2 {
119 reg = <2>;
120 };
121};