blob: a7728e0a2de2b9c6e452f19830b7b52d3a1fc355 [file] [log] [blame]
Simon Glass437e2b82012-02-23 03:28:41 +00001/*
2 * Copyright (c) 2004-2008 Texas Instruments
3 *
4 * (C) Copyright 2002
5 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Simon Glass437e2b82012-02-23 03:28:41 +00008 */
9
10OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
11OUTPUT_ARCH(arm)
12ENTRY(_start)
13SECTIONS
14{
15 . = 0x00000000;
16
17 . = ALIGN(4);
18 .text :
19 {
Albert ARIBAUDc53687e2013-06-11 14:17:33 +020020 *(.__image_copy_start)
Albert ARIBAUD9852cc62014-04-15 16:13:51 +020021 *(.vectors)
Stephen Warrenadddf452012-10-22 06:19:32 +000022 CPUDIR/start.o (.text*)
23 *(.text*)
Simon Glass437e2b82012-02-23 03:28:41 +000024 }
25
26 . = ALIGN(4);
27 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
28
29 . = ALIGN(4);
30 .data : {
Stephen Warrenadddf452012-10-22 06:19:32 +000031 *(.data*)
Simon Glass437e2b82012-02-23 03:28:41 +000032 }
33
34 . = ALIGN(4);
35
36 . = .;
Simon Glass437e2b82012-02-23 03:28:41 +000037
38 . = ALIGN(4);
Marek Vasut607092a2012-10-12 10:27:03 +000039 .u_boot_list : {
Albert ARIBAUDc24895e2013-02-25 00:59:00 +000040 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +000041 }
42
43 . = ALIGN(4);
Simon Glass437e2b82012-02-23 03:28:41 +000044
Albert ARIBAUDc53687e2013-06-11 14:17:33 +020045 .image_copy_end :
46 {
47 *(.__image_copy_end)
48 }
Simon Glass437e2b82012-02-23 03:28:41 +000049
Albert ARIBAUDaf3ff162013-06-11 14:17:34 +020050 .rel_dyn_start :
51 {
52 *(.__rel_dyn_start)
53 }
54
Simon Glass437e2b82012-02-23 03:28:41 +000055 .rel.dyn : {
Simon Glass437e2b82012-02-23 03:28:41 +000056 *(.rel*)
Albert ARIBAUDaf3ff162013-06-11 14:17:34 +020057 }
58
59 .rel_dyn_end :
60 {
61 *(.__rel_dyn_end)
Simon Glass437e2b82012-02-23 03:28:41 +000062 }
63
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +010064 .end :
65 {
66 *(.__end)
67 }
68
69 _image_binary_end = .;
Simon Glass437e2b82012-02-23 03:28:41 +000070
71 /*
72 * Deprecated: this MMU section is used by pxa at present but
73 * should not be used by new boards/CPUs.
74 */
75 . = ALIGN(4096);
76 .mmutable : {
77 *(.mmutable)
78 }
79
Albert ARIBAUDba5662d2013-04-11 05:43:21 +000080/*
81 * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
82 * __bss_base and __bss_limit are for linker only (overlay ordering)
83 */
84
Albert ARIBAUD436f6322013-02-25 00:58:59 +000085 .bss_start __rel_dyn_start (OVERLAY) : {
86 KEEP(*(.__bss_start));
Albert ARIBAUDba5662d2013-04-11 05:43:21 +000087 __bss_base = .;
Albert ARIBAUD436f6322013-02-25 00:58:59 +000088 }
89
Albert ARIBAUDba5662d2013-04-11 05:43:21 +000090 .bss __bss_base (OVERLAY) : {
Stephen Warrenadddf452012-10-22 06:19:32 +000091 *(.bss*)
Simon Glass437e2b82012-02-23 03:28:41 +000092 . = ALIGN(4);
Albert ARIBAUDba5662d2013-04-11 05:43:21 +000093 __bss_limit = .;
Albert ARIBAUD436f6322013-02-25 00:58:59 +000094 }
Tom Rini19aac972013-03-18 12:31:00 -040095
Albert ARIBAUDba5662d2013-04-11 05:43:21 +000096 .bss_end __bss_limit (OVERLAY) : {
97 KEEP(*(.__bss_end));
Simon Glass437e2b82012-02-23 03:28:41 +000098 }
99
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +0100100 .dynsym _image_binary_end : { *(.dynsym) }
Albert ARIBAUD95fc6d62013-11-07 14:21:46 +0100101 .dynbss : { *(.dynbss) }
102 .dynstr : { *(.dynstr*) }
103 .dynamic : { *(.dynamic*) }
104 .plt : { *(.plt*) }
105 .interp : { *(.interp*) }
Andreas Färber438a1672014-01-27 05:48:11 +0100106 .gnu.hash : { *(.gnu.hash) }
Albert ARIBAUD95fc6d62013-11-07 14:21:46 +0100107 .gnu : { *(.gnu*) }
108 .ARM.exidx : { *(.ARM.exidx*) }
Albert ARIBAUDddadbed2014-01-13 14:57:05 +0100109 .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
Simon Glass437e2b82012-02-23 03:28:41 +0000110}