Michal Simek | b40e5b6 | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_ZYNQ=y | ||||
Michal Simek | 9254387 | 2016-12-16 11:57:17 +0100 | [diff] [blame] | 3 | CONFIG_SYS_TEXT_BASE=0x4000000 |
Michal Simek | 040050b | 2018-03-23 09:34:00 +0100 | [diff] [blame] | 4 | CONFIG_SPL=y |
Michal Simek | a932ae7 | 2018-06-04 08:33:30 +0200 | [diff] [blame] | 5 | CONFIG_DEBUG_UART_BASE=0xe0001000 |
6 | CONFIG_DEBUG_UART_CLOCK=50000000 | ||||
Michal Simek | 96794a7 | 2017-12-13 10:35:06 +0100 | [diff] [blame] | 7 | CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM011" |
Michal Simek | c7abf8d | 2017-12-01 13:50:33 +0100 | [diff] [blame] | 8 | CONFIG_SPL_STACK_R_ADDR=0x200000 |
Tien Fong Chee | 6fd0a71 | 2019-01-23 14:20:03 +0800 | [diff] [blame] | 9 | # CONFIG_SPL_FS_FAT is not set |
Michal Simek | 0519701 | 2017-12-15 07:46:12 +0100 | [diff] [blame] | 10 | CONFIG_DEBUG_UART=y |
Tom Rini | 732aa4a | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 11 | CONFIG_DISTRO_DEFAULTS=y |
Michal Simek | b40e5b6 | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 12 | CONFIG_FIT=y |
Michal Simek | b40e5b6 | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 13 | CONFIG_FIT_SIGNATURE=y |
Jagan Teki | 4c57e4c | 2017-01-21 11:48:33 +0100 | [diff] [blame] | 14 | CONFIG_FIT_VERBOSE=y |
Alex Kiernan | 0419a9b | 2018-04-20 21:25:38 +0000 | [diff] [blame] | 15 | CONFIG_IMAGE_FORMAT_LEGACY=y |
Michal Simek | c7abf8d | 2017-12-01 13:50:33 +0100 | [diff] [blame] | 16 | CONFIG_SPL_STACK_R=y |
Heiko Schocher | 1d12ba2 | 2016-10-06 07:55:15 +0200 | [diff] [blame] | 17 | CONFIG_SPL_OS_BOOT=y |
Siva Durga Prasad Paladugu | 59d461e | 2016-01-11 12:01:10 +0530 | [diff] [blame] | 18 | CONFIG_SYS_PROMPT="Zynq> " |
Michal Simek | b40e5b6 | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 19 | # CONFIG_CMD_FLASH is not set |
Simon Glass | 80cb189 | 2017-05-17 03:25:21 -0600 | [diff] [blame] | 20 | CONFIG_CMD_FPGA_LOADBP=y |
21 | CONFIG_CMD_FPGA_LOADFS=y | ||||
22 | CONFIG_CMD_FPGA_LOADMK=y | ||||
23 | CONFIG_CMD_FPGA_LOADP=y | ||||
Thomas Chou | 3a077cd | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 24 | CONFIG_CMD_GPIO=y |
Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 25 | CONFIG_CMD_NAND_LOCK_UNLOCK=y |
Michal Simek | b40e5b6 | 2015-07-22 11:39:04 +0200 | [diff] [blame] | 26 | # CONFIG_CMD_SETEXPR is not set |
Michal Simek | f3facd1 | 2018-01-08 16:43:59 +0100 | [diff] [blame] | 27 | # CONFIG_CMD_NET is not set |
Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 28 | CONFIG_CMD_CACHE=y |
Tom Rini | 732aa4a | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 29 | # CONFIG_SPL_DOS_PARTITION is not set |
Tom Rini | 732aa4a | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 30 | # CONFIG_SPL_EFI_PARTITION is not set |
Tom Rini | 7406032 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 31 | CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011" |
Nathan Rossi | dd71c8a | 2016-01-08 03:00:46 +1000 | [diff] [blame] | 32 | CONFIG_SPL_DM_SEQ_ALIAS=y |
Michal Simek | d25aefd | 2018-01-09 14:52:29 +0100 | [diff] [blame] | 33 | CONFIG_BLK=y |
Michal Simek | 216f637 | 2017-11-03 15:53:56 +0100 | [diff] [blame] | 34 | CONFIG_FPGA_XILINX=y |
Vipul Kumar | 4a4946b | 2018-02-16 18:02:51 +0530 | [diff] [blame] | 35 | CONFIG_FPGA_ZYNQPL=y |
Michal Simek | 846d61b | 2018-01-09 15:27:31 +0100 | [diff] [blame] | 36 | CONFIG_DM_GPIO=y |
Jagan Teki | 4c57e4c | 2017-01-21 11:48:33 +0100 | [diff] [blame] | 37 | # CONFIG_MMC is not set |
Adam Ford | ac44a30 | 2018-07-07 22:18:22 -0500 | [diff] [blame] | 38 | CONFIG_MTD_DEVICE=y |
Adam Ford | 42efb61 | 2017-08-07 17:37:18 -0400 | [diff] [blame] | 39 | CONFIG_NAND=y |
Siva Durga Prasad Paladugu | ddb9f06 | 2016-09-27 10:55:47 +0530 | [diff] [blame] | 40 | CONFIG_NAND_ZYNQ=y |
Michal Simek | 0519701 | 2017-12-15 07:46:12 +0100 | [diff] [blame] | 41 | CONFIG_DEBUG_UART_ZYNQ=y |
Michal Simek | 0519701 | 2017-12-15 07:46:12 +0100 | [diff] [blame] | 42 | CONFIG_DEBUG_UART_ANNOUNCE=y |
Michal Simek | ab75453 | 2017-11-06 09:16:05 +0100 | [diff] [blame] | 43 | CONFIG_ZYNQ_SERIAL=y |