Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
Yangbo Lu | bb32e68 | 2021-06-03 10:51:19 +0800 | [diff] [blame] | 3 | * Copyright 2019-2021 NXP |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __L1028A_COMMON_H |
| 7 | #define __L1028A_COMMON_H |
| 8 | |
| 9 | #define CONFIG_REMAKE_ELF |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 10 | #define CONFIG_MP |
| 11 | |
| 12 | #include <asm/arch/stream_id_lsch3.h> |
| 13 | #include <asm/arch/config.h> |
| 14 | #include <asm/arch/soc.h> |
| 15 | |
| 16 | /* Link Definitions */ |
| 17 | #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE |
| 18 | |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 19 | #define CONFIG_VERY_BIG_RAM |
| 20 | #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL |
| 21 | #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 |
| 22 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE |
| 23 | #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL |
| 24 | #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1 |
| 25 | |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 26 | /* |
| 27 | * SMP Definitinos |
| 28 | */ |
Michael Walle | f056e0f | 2020-06-01 21:53:26 +0200 | [diff] [blame] | 29 | #define CPU_RELEASE_ADDR secondary_boot_addr |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 30 | |
| 31 | /* Generic Timer Definitions */ |
| 32 | #define COUNTER_FREQUENCY 25000000 /* 25MHz */ |
| 33 | |
Biwen Li | e7c3b04 | 2021-02-05 19:01:57 +0800 | [diff] [blame] | 34 | /* GPIO */ |
| 35 | #ifdef CONFIG_DM_GPIO |
| 36 | #ifndef CONFIG_MPC8XXX_GPIO |
| 37 | #define CONFIG_MPC8XXX_GPIO |
| 38 | #endif |
| 39 | #endif |
| 40 | |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 41 | /* I2C */ |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 42 | |
| 43 | /* Serial Port */ |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 44 | #define CONFIG_SYS_NS16550_SERIAL |
| 45 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
| 46 | #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) |
| 47 | |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 48 | /* Miscellaneous configurable options */ |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 49 | |
| 50 | /* Physical Memory Map */ |
| 51 | #define CONFIG_CHIP_SELECTS_PER_CTRL 4 |
| 52 | |
| 53 | #define CONFIG_HWCONFIG |
| 54 | #define HWCONFIG_BUFFER_SIZE 128 |
| 55 | |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 56 | #define BOOT_TARGET_DEVICES(func) \ |
| 57 | func(MMC, mmc, 0) \ |
Yuantian Tang | 7f3da7b | 2019-11-04 15:10:45 +0800 | [diff] [blame] | 58 | func(MMC, mmc, 1) \ |
Yuantian Tang | 7a224e7 | 2020-03-10 11:31:05 +0800 | [diff] [blame] | 59 | func(USB, usb, 0) \ |
| 60 | func(DHCP, dhcp, na) |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 61 | #include <config_distro_bootcmd.h> |
| 62 | |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 63 | #undef CONFIG_BOOTCOMMAND |
| 64 | |
Yuantian Tang | 7f3da7b | 2019-11-04 15:10:45 +0800 | [diff] [blame] | 65 | #define XSPI_NOR_BOOTCOMMAND \ |
| 66 | "run xspi_hdploadcmd; run distro_bootcmd; run xspi_bootcmd; " \ |
| 67 | "env exists secureboot && esbc_halt;;" |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 68 | #define SD_BOOTCOMMAND \ |
Yuantian Tang | 7f3da7b | 2019-11-04 15:10:45 +0800 | [diff] [blame] | 69 | "run sd_hdploadcmd; run distro_bootcmd;run sd_bootcmd; " \ |
| 70 | "env exists secureboot && esbc_halt;" |
| 71 | #define SD2_BOOTCOMMAND \ |
| 72 | "run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \ |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 73 | "env exists secureboot && esbc_halt;" |
| 74 | |
| 75 | /* Monitor Command Prompt */ |
| 76 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
| 77 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 78 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 79 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ |
| 80 | |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 81 | #define CONFIG_SYS_MAXARGS 64 /* max command args */ |
| 82 | |
| 83 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ |
| 84 | |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 85 | #define OCRAM_NONSECURE_SIZE 0x00010000 |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 86 | #define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 87 | |
| 88 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
| 89 | |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 90 | /* I2C bus multiplexer */ |
| 91 | #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ |
| 92 | #define I2C_MUX_CH_DEFAULT 0x8 |
| 93 | |
| 94 | /* EEPROM */ |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 95 | #define CONFIG_SYS_I2C_EEPROM_NXID |
| 96 | #define CONFIG_SYS_EEPROM_BUS_NUM 0 |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 97 | |
Wen He | 41e63db | 2019-11-18 13:26:09 +0800 | [diff] [blame] | 98 | /* DisplayPort */ |
| 99 | #define DP_PWD_EN_DEFAULT_MASK 0x8 |
| 100 | |
Udit Agarwal | 22ec238 | 2019-11-07 16:11:32 +0000 | [diff] [blame] | 101 | #ifdef CONFIG_NXP_ESBC |
Yuantian Tang | 029d8ab | 2019-05-24 14:36:27 +0800 | [diff] [blame] | 102 | #include <asm/fsl_secure_boot.h> |
| 103 | #endif |
| 104 | |
Alex Marginean | 3a91873 | 2019-07-03 12:11:39 +0300 | [diff] [blame] | 105 | /* Ethernet */ |
| 106 | /* smallest ENETC BD ring has 8 entries */ |
| 107 | #define CONFIG_SYS_RX_ETH_BUFFER 8 |
| 108 | |
Yuantian Tang | 92f18ff | 2019-04-10 16:43:34 +0800 | [diff] [blame] | 109 | #endif /* __L1028A_COMMON_H */ |