blob: e250dc92dda875c91285c0517b39138974b13330 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +03002/*
3 * cm_t43.h
4 *
5 * Copyright (C) 2015 Compulab, Ltd.
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +03006 */
7
8#ifndef __CONFIG_CM_T43_H
9#define __CONFIG_CM_T43_H
10
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030011#define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */
12#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
13
14#include <asm/arch/omap.h>
15
16/* Serial support */
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030017#define CONFIG_SYS_NS16550_SERIAL
18#define CONFIG_SYS_NS16550_CLK 48000000
19#define CONFIG_SYS_NS16550_COM1 0x44e09000
Tom Rini3d46f242017-06-09 16:59:17 -040020#if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL)
Nikita Kiryanovb9a0f882016-02-19 19:19:42 +020021#define CONFIG_SYS_NS16550_REG_SIZE (-4)
22#endif
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030023
24/* NAND support */
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030025#define CONFIG_SYS_NAND_ECCSIZE 512
26#define CONFIG_SYS_NAND_ECCBYTES 14
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030027#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
28 10, 11, 12, 13, 14, 15, 16, 17, \
29 18, 19, 20, 21, 22, 23, 24, 25, \
30 26, 27, 28, 29, 30, 31, 32, 33, \
31 34, 35, 36, 37, 38, 39, 40, 41, \
32 42, 43, 44, 45, 46, 47, 48, 49, \
33 50, 51, 52, 53, 54, 55, 56, 57, }
34
35/* CPSW Ethernet support */
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030036#define CONFIG_SYS_RX_ETH_BUFFER 64
37
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030038/* Power */
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030039#define CONFIG_POWER_TPS65218
40
41/* Enabling L2 Cache */
42#define CONFIG_SYS_L2_PL310
43#define CONFIG_SYS_PL310_BASE 0x48242000
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030044
45/*
46 * Since SPL did pll and ddr initialization for us,
47 * we don't need to do it twice.
48 */
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030049
50#define CONFIG_HSMMC2_8BIT
51
52#include <configs/ti_armv7_omap.h>
Nikita Kiryanov3554f7a2016-02-19 19:19:50 +020053#undef CONFIG_SYS_MONITOR_LEN
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030054
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030055#define V_OSCK 24000000 /* Clock output from T2 */
56#define V_SCLK (V_OSCK)
57
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030058#define CONFIG_EXTRA_ENV_SETTINGS \
59 "loadaddr=0x80200000\0" \
60 "fdtaddr=0x81200000\0" \
61 "bootm_size=0x8000000\0" \
62 "autoload=no\0" \
63 "console=ttyO0,115200n8\0" \
64 "fdtfile=am437x-sb-som-t43.dtb\0" \
65 "kernel=zImage-cm-t43\0" \
66 "bootscr=bootscr.img\0" \
67 "emmcroot=/dev/mmcblk0p2 rw\0" \
68 "emmcrootfstype=ext4 rootwait\0" \
69 "emmcargs=setenv bootargs console=${console} " \
70 "root=${emmcroot} " \
71 "rootfstype=${emmcrootfstype}\0" \
72 "loadbootscript=load mmc 0 ${loadaddr} ${bootscr}\0" \
73 "bootscript=echo Running bootscript from mmc ...; " \
74 "source ${loadaddr}\0" \
75 "emmcboot=echo Booting from emmc ... && " \
76 "run emmcargs && " \
77 "load mmc 1 ${loadaddr} ${kernel} && " \
78 "load mmc 1 ${fdtaddr} ${fdtfile} && " \
79 "bootz ${loadaddr} - ${fdtaddr}\0"
80
81#define CONFIG_BOOTCOMMAND \
82 "mmc dev 0; " \
83 "if mmc rescan; then " \
84 "if run loadbootscript; then " \
85 "run bootscript; " \
86 "fi; " \
87 "fi; " \
88 "mmc dev 1; " \
89 "if mmc rescan; then " \
90 "run emmcboot; " \
91 "fi;"
92
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030093/* SPL defines. */
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030094#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20))
Nikita Kiryanov3554f7a2016-02-19 19:19:50 +020095#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030096
Nikita Kiryanov626853f2016-04-16 17:55:10 +030097/* EEPROM */
Nikita Kiryanov626853f2016-04-16 17:55:10 +030098
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030099#endif /* __CONFIG_CM_T43_H */