blob: e6429ecd1365fb7a0dfe89e14c9319dc9e098df5 [file] [log] [blame]
Stefan Roese3e1f1b32005-08-01 16:49:12 +02001/*
2 * (C) Copyright 2004-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
6 * Add support for Am29F016D and dynamic switch setting.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27/*
28 * Modified 4/5/2001
29 * Wait for completion of each sector erase command issued
30 * 4/5/2001
31 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
32 */
33
34#include <common.h>
35#include <ppc4xx.h>
36#include <asm/processor.h>
37
Wolfgang Denkdd314d12006-08-27 18:10:01 +020038flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
Stefan Roese3e1f1b32005-08-01 16:49:12 +020039
40/*-----------------------------------------------------------------------
41 * Functions
42 */
43static int write_word(flash_info_t * info, ulong dest, ulong data);
Stefan Roese363330b2005-08-04 17:09:16 +020044#ifdef CFG_FLASH_2ND_16BIT_DEV
45static int write_word_1(flash_info_t * info, ulong dest, ulong data);
46static int write_word_2(flash_info_t * info, ulong dest, ulong data);
47static int flash_erase_1(flash_info_t * info, int s_first, int s_last);
48static int flash_erase_2(flash_info_t * info, int s_first, int s_last);
49static ulong flash_get_size_1(vu_long * addr, flash_info_t * info);
50static ulong flash_get_size_2(vu_long * addr, flash_info_t * info);
51#endif
Stefan Roese3e1f1b32005-08-01 16:49:12 +020052
53void flash_print_info(flash_info_t * info)
54{
55 int i;
56 int k;
57 int size;
58 int erased;
59 volatile unsigned long *flash;
60
61 if (info->flash_id == FLASH_UNKNOWN) {
62 printf("missing or unknown FLASH type\n");
63 return;
64 }
65
66 switch (info->flash_id & FLASH_VENDMASK) {
67 case FLASH_MAN_AMD:
68 printf("AMD ");
69 break;
70 case FLASH_MAN_STM:
71 printf("STM ");
72 break;
73 case FLASH_MAN_FUJ:
74 printf("FUJITSU ");
75 break;
76 case FLASH_MAN_SST:
77 printf("SST ");
78 break;
Wolfgang Denkdd314d12006-08-27 18:10:01 +020079 case FLASH_MAN_MX:
Stefan Roesedb9e2a32006-08-07 14:31:21 +020080 printf ("MACRONIX ");
81 break;
Stefan Roese3e1f1b32005-08-01 16:49:12 +020082 default:
83 printf("Unknown Vendor ");
84 break;
85 }
86
87 switch (info->flash_id & FLASH_TYPEMASK) {
88 case FLASH_AM040:
89 printf("AM29F040 (512 Kbit, uniform sector size)\n");
90 break;
91 case FLASH_AM400B:
92 printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
93 break;
94 case FLASH_AM400T:
95 printf("AM29LV400T (4 Mbit, top boot sector)\n");
96 break;
97 case FLASH_AM800B:
98 printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
99 break;
100 case FLASH_AM800T:
101 printf("AM29LV800T (8 Mbit, top boot sector)\n");
102 break;
103 case FLASH_AMD016:
104 printf("AM29F016D (16 Mbit, uniform sector size)\n");
105 break;
106 case FLASH_AM160B:
107 printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
108 break;
109 case FLASH_AM160T:
110 printf("AM29LV160T (16 Mbit, top boot sector)\n");
111 break;
112 case FLASH_AM320B:
113 printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
114 break;
115 case FLASH_AM320T:
116 printf("AM29LV320T (32 Mbit, top boot sector)\n");
117 break;
118 case FLASH_AM033C:
119 printf("AM29LV033C (32 Mbit, top boot sector)\n");
120 break;
121 case FLASH_SST800A:
122 printf("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
123 break;
124 case FLASH_SST160A:
125 printf("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
126 break;
Stefan Roese363330b2005-08-04 17:09:16 +0200127 case FLASH_STMW320DT:
128 printf ("M29W320DT (32 M, top sector)\n");
129 break;
Stefan Roesedb9e2a32006-08-07 14:31:21 +0200130 case FLASH_MXLV320T:
131 printf ("MXLV320T (32 Mbit, top sector)\n");
132 break;
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200133 default:
134 printf("Unknown Chip Type\n");
135 break;
136 }
137
138 printf(" Size: %ld KB in %d Sectors\n",
139 info->size >> 10, info->sector_count);
140
141 printf(" Sector Start Addresses:");
142 for (i = 0; i < info->sector_count; ++i) {
143 /*
144 * Check if whole sector is erased
145 */
146 if (i != (info->sector_count - 1))
147 size = info->start[i + 1] - info->start[i];
148 else
149 size = info->start[0] + info->size - info->start[i];
150 erased = 1;
151 flash = (volatile unsigned long *)info->start[i];
152 size = size >> 2; /* divide by 4 for longword access */
153 for (k = 0; k < size; k++) {
154 if (*flash++ != 0xffffffff) {
155 erased = 0;
156 break;
157 }
158 }
159
160 if ((i % 5) == 0)
161 printf("\n ");
162 printf(" %08lX%s%s",
163 info->start[i],
164 erased ? " E" : " ", info->protect[i] ? "RO " : " ");
165 }
166 printf("\n");
167 return;
168}
169
170
171/*
172 * The following code cannot be run from FLASH!
173 */
Stefan Roese363330b2005-08-04 17:09:16 +0200174#ifdef CFG_FLASH_2ND_16BIT_DEV
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200175static ulong flash_get_size(vu_long * addr, flash_info_t * info)
176{
Stefan Roese363330b2005-08-04 17:09:16 +0200177 /* bit 0 used for big flash marking */
178 if ((ulong)addr & 0x1) {
179 return flash_get_size_2((vu_long *)((ulong)addr & 0xfffffffe), info);
180 } else {
181 return flash_get_size_1(addr, info);
182 }
183}
184
185static ulong flash_get_size_1(vu_long * addr, flash_info_t * info)
186#else
187static ulong flash_get_size(vu_long * addr, flash_info_t * info)
188#endif
189{
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200190 short i;
191 CFG_FLASH_WORD_SIZE value;
192 ulong base = (ulong) addr;
193 volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) addr;
194
195 DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
196
197 /* Write auto select command: read Manufacturer ID */
198 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
199 addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
200 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00900090;
201 udelay(1000);
202
203 value = addr2[0];
204 DEBUGF("FLASH MANUFACT: %x\n", value);
205
206 switch (value) {
207 case (CFG_FLASH_WORD_SIZE) AMD_MANUFACT:
208 info->flash_id = FLASH_MAN_AMD;
209 break;
210 case (CFG_FLASH_WORD_SIZE) FUJ_MANUFACT:
211 info->flash_id = FLASH_MAN_FUJ;
212 break;
213 case (CFG_FLASH_WORD_SIZE) SST_MANUFACT:
214 info->flash_id = FLASH_MAN_SST;
215 break;
216 case (CFG_FLASH_WORD_SIZE) STM_MANUFACT:
217 info->flash_id = FLASH_MAN_STM;
218 break;
219 default:
220 info->flash_id = FLASH_UNKNOWN;
221 info->sector_count = 0;
222 info->size = 0;
223 return (0); /* no or unknown flash */
224 }
225
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200226 value = addr2[1]; /* device ID */
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200227 DEBUGF("\nFLASH DEVICEID: %x\n", value);
228
229 switch (value) {
230 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV040B:
231 info->flash_id += FLASH_AM040;
232 info->sector_count = 8;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200233 info->size = 0x0080000; /* => 512 KiB */
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200234 break;
235
236 case (CFG_FLASH_WORD_SIZE) AMD_ID_F040B:
237 info->flash_id += FLASH_AM040;
238 info->sector_count = 8;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200239 info->size = 0x0080000; /* => 512 KiB */
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200240 break;
241
242 case (CFG_FLASH_WORD_SIZE) STM_ID_M29W040B:
243 info->flash_id += FLASH_AM040;
244 info->sector_count = 8;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200245 info->size = 0x0080000; /* => 512 KiB */
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200246 break;
247
248 case (CFG_FLASH_WORD_SIZE) AMD_ID_F016D:
249 info->flash_id += FLASH_AMD016;
250 info->sector_count = 32;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200251 info->size = 0x00200000; /* => 2 MiB */
252 break;
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200253
254 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV033C:
255 info->flash_id += FLASH_AMDLV033C;
256 info->sector_count = 64;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200257 info->size = 0x00400000; /* => 4 MiB */
258 break;
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200259
260 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400T:
261 info->flash_id += FLASH_AM400T;
262 info->sector_count = 11;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200263 info->size = 0x00080000; /* => 512 KiB */
264 break;
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200265
266 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400B:
267 info->flash_id += FLASH_AM400B;
268 info->sector_count = 11;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200269 info->size = 0x00080000; /* => 512 KiB */
270 break;
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200271
272 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800T:
273 info->flash_id += FLASH_AM800T;
274 info->sector_count = 19;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200275 info->size = 0x00100000; /* => 1 MiB */
276 break;
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200277
278 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800B:
279 info->flash_id += FLASH_AM800B;
280 info->sector_count = 19;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200281 info->size = 0x00100000; /* => 1 MiB */
282 break;
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200283
284 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160T:
285 info->flash_id += FLASH_AM160T;
286 info->sector_count = 35;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200287 info->size = 0x00200000; /* => 2 MiB */
288 break;
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200289
290 case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160B:
291 info->flash_id += FLASH_AM160B;
292 info->sector_count = 35;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200293 info->size = 0x00200000; /* => 2 MiB */
294 break;
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200295
296 default:
297 info->flash_id = FLASH_UNKNOWN;
298 return (0); /* => no or unknown flash */
299 }
300
301 /* set up sector start address table */
302 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
303 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
304 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
305 for (i = 0; i < info->sector_count; i++)
306 info->start[i] = base + (i * 0x00010000);
307 } else {
308 if (info->flash_id & FLASH_BTYPE) {
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200309 /* set sector offsets for bottom boot block type */
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200310 info->start[0] = base + 0x00000000;
311 info->start[1] = base + 0x00004000;
312 info->start[2] = base + 0x00006000;
313 info->start[3] = base + 0x00008000;
314 for (i = 4; i < info->sector_count; i++) {
315 info->start[i] =
316 base + (i * 0x00010000) - 0x00030000;
317 }
318 } else {
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200319 /* set sector offsets for top boot block type */
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200320 i = info->sector_count - 1;
321 info->start[i--] = base + info->size - 0x00004000;
322 info->start[i--] = base + info->size - 0x00006000;
323 info->start[i--] = base + info->size - 0x00008000;
324 for (; i >= 0; i--) {
325 info->start[i] = base + i * 0x00010000;
326 }
327 }
328 }
329
330 /* check for protected sectors */
331 for (i = 0; i < info->sector_count; i++) {
332 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
333 /* D0 = 1 if protected */
334 addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
335
336 /* For AMD29033C flash we need to resend the command of *
337 * reading flash protection for upper 8 Mb of flash */
338 if (i == 32) {
339 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
340 addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
341 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x90909090;
342 }
343
344 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
345 info->protect[i] = 0;
346 else
347 info->protect[i] = addr2[2] & 1;
348 }
349
350 /* issue bank reset to return to read mode */
351 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0;
352
353 return (info->size);
354}
355
Stefan Roese363330b2005-08-04 17:09:16 +0200356static int wait_for_DQ7_1(flash_info_t * info, int sect)
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200357{
358 ulong start, now, last;
359 volatile CFG_FLASH_WORD_SIZE *addr =
360 (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
361
362 start = get_timer(0);
363 last = start;
364 while ((addr[0] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
365 (CFG_FLASH_WORD_SIZE) 0x00800080) {
366 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
367 printf("Timeout\n");
368 return -1;
369 }
370 /* show that we're waiting */
371 if ((now - last) > 1000) { /* every second */
372 putc('.');
373 last = now;
374 }
375 }
376 return 0;
377}
378
Stefan Roese363330b2005-08-04 17:09:16 +0200379#ifdef CFG_FLASH_2ND_16BIT_DEV
380int flash_erase(flash_info_t * info, int s_first, int s_last)
381{
382 if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
383 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
Stefan Roesedb9e2a32006-08-07 14:31:21 +0200384 ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T) ||
Stefan Roese363330b2005-08-04 17:09:16 +0200385 ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT)) {
386 return flash_erase_2(info, s_first, s_last);
387 } else {
388 return flash_erase_1(info, s_first, s_last);
389 }
390}
391
392static int flash_erase_1(flash_info_t * info, int s_first, int s_last)
393#else
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200394int flash_erase(flash_info_t * info, int s_first, int s_last)
Stefan Roese363330b2005-08-04 17:09:16 +0200395#endif
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200396{
397 volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
398 volatile CFG_FLASH_WORD_SIZE *addr2;
399 int flag, prot, sect, l_sect;
400 int i;
401
402 if ((s_first < 0) || (s_first > s_last)) {
403 if (info->flash_id == FLASH_UNKNOWN) {
404 printf("- missing\n");
405 } else {
406 printf("- no sectors to erase\n");
407 }
408 return 1;
409 }
410
411 if (info->flash_id == FLASH_UNKNOWN) {
412 printf("Can't erase unknown flash type - aborted\n");
413 return 1;
414 }
415
416 prot = 0;
417 for (sect = s_first; sect <= s_last; ++sect) {
418 if (info->protect[sect]) {
419 prot++;
420 }
421 }
422
423 if (prot) {
424 printf("- Warning: %d protected sectors will not be erased!\n",
425 prot);
426 } else {
427 printf("\n");
428 }
429
430 l_sect = -1;
431
432 /* Disable interrupts which might cause a timeout here */
433 flag = disable_interrupts();
434
435 /* Start erase on unprotected sectors */
436 for (sect = s_first; sect <= s_last; sect++) {
437 if (info->protect[sect] == 0) { /* not protected */
438 addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
439
440 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
441 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
442 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
443 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
444 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
445 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
446 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00500050; /* block erase */
447 for (i = 0; i < 50; i++)
448 udelay(1000); /* wait 1 ms */
449 } else {
450 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
451 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
452 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
453 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
454 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
455 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
456 }
457 l_sect = sect;
458 /*
459 * Wait for each sector to complete, it's more
460 * reliable. According to AMD Spec, you must
461 * issue all erase commands within a specified
462 * timeout. This has been seen to fail, especially
463 * if printf()s are included (for debug)!!
464 */
Stefan Roese363330b2005-08-04 17:09:16 +0200465 wait_for_DQ7_1(info, sect);
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200466 }
467 }
468
469 /* re-enable interrupts if necessary */
470 if (flag)
471 enable_interrupts();
472
473 /* wait at least 80us - let's wait 1 ms */
474 udelay(1000);
475
476 /* reset to read mode */
477 addr = (CFG_FLASH_WORD_SIZE *) info->start[0];
478 addr[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
479
480 printf(" done\n");
481 return 0;
482}
483
484/*-----------------------------------------------------------------------
485 * Copy memory to flash, returns:
486 * 0 - OK
487 * 1 - write timeout
488 * 2 - Flash not erased
489 */
490int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
491{
492 ulong cp, wp, data;
493 int i, l, rc;
494
495 wp = (addr & ~3); /* get lower word aligned address */
496
497 /*
498 * handle unaligned start bytes
499 */
500 if ((l = addr - wp) != 0) {
501 data = 0;
502 for (i = 0, cp = wp; i < l; ++i, ++cp) {
503 data = (data << 8) | (*(uchar *) cp);
504 }
505 for (; i < 4 && cnt > 0; ++i) {
506 data = (data << 8) | *src++;
507 --cnt;
508 ++cp;
509 }
510 for (; cnt == 0 && i < 4; ++i, ++cp) {
511 data = (data << 8) | (*(uchar *) cp);
512 }
513
514 if ((rc = write_word(info, wp, data)) != 0) {
515 return (rc);
516 }
517 wp += 4;
518 }
519
520 /*
521 * handle word aligned part
522 */
523 while (cnt >= 4) {
524 data = 0;
525 for (i = 0; i < 4; ++i) {
526 data = (data << 8) | *src++;
527 }
528 if ((rc = write_word(info, wp, data)) != 0) {
529 return (rc);
530 }
531 wp += 4;
532 cnt -= 4;
533 }
534
535 if (cnt == 0) {
536 return (0);
537 }
538
539 /*
540 * handle unaligned tail bytes
541 */
542 data = 0;
543 for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
544 data = (data << 8) | *src++;
545 --cnt;
546 }
547 for (; i < 4; ++i, ++cp) {
548 data = (data << 8) | (*(uchar *) cp);
549 }
550
551 return (write_word(info, wp, data));
552}
553
554/*-----------------------------------------------------------------------
Stefan Roese363330b2005-08-04 17:09:16 +0200555 * Copy memory to flash, returns:
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200556 * 0 - OK
557 * 1 - write timeout
558 * 2 - Flash not erased
559 */
Stefan Roese363330b2005-08-04 17:09:16 +0200560#ifdef CFG_FLASH_2ND_16BIT_DEV
561static int write_word(flash_info_t * info, ulong dest, ulong data)
562{
563 if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
564 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
Stefan Roesedb9e2a32006-08-07 14:31:21 +0200565 ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T) ||
Stefan Roese363330b2005-08-04 17:09:16 +0200566 ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT)) {
567 return write_word_2(info, dest, data);
568 } else {
569 return write_word_1(info, dest, data);
570 }
571}
572
573static int write_word_1(flash_info_t * info, ulong dest, ulong data)
574#else
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200575static int write_word(flash_info_t * info, ulong dest, ulong data)
Stefan Roese363330b2005-08-04 17:09:16 +0200576#endif
577{
578 volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
579 volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *) dest;
580 volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *) & data;
581 ulong start;
582 int i;
583
584 /* Check if Flash is (sufficiently) erased */
585 if ((*((vu_long *)dest) & data) != data) {
586 return (2);
587 }
588
589 for (i = 0; i < 4 / sizeof(CFG_FLASH_WORD_SIZE); i++) {
590 int flag;
591
592 /* Disable interrupts which might cause a timeout here */
593 flag = disable_interrupts();
594
595 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
596 addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
597 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00A000A0;
598
599 dest2[i] = data2[i];
600
601 /* re-enable interrupts if necessary */
602 if (flag)
603 enable_interrupts();
604
605 /* data polling for D7 */
606 start = get_timer(0);
607 while ((dest2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
608 (data2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080)) {
609
610 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
611 return (1);
612 }
613 }
614 }
615
616 return (0);
617}
618
619#ifdef CFG_FLASH_2ND_16BIT_DEV
620
621#undef CFG_FLASH_WORD_SIZE
622#define CFG_FLASH_WORD_SIZE unsigned short
623
624/*
625 * The following code cannot be run from FLASH!
626 */
627static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
628{
629 short i;
630 int n;
631 CFG_FLASH_WORD_SIZE value;
632 ulong base = (ulong) addr;
633 volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) addr;
634
635 DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
636
637 /* Write auto select command: read Manufacturer ID */
638 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
639 addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
640 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00900090;
641 udelay(1000);
642
643 value = addr2[0];
644 DEBUGF("FLASH MANUFACT: %x\n", value);
645
646 switch (value) {
647 case (CFG_FLASH_WORD_SIZE) AMD_MANUFACT:
648 info->flash_id = FLASH_MAN_AMD;
649 break;
650 case (CFG_FLASH_WORD_SIZE) FUJ_MANUFACT:
651 info->flash_id = FLASH_MAN_FUJ;
652 break;
653 case (CFG_FLASH_WORD_SIZE) SST_MANUFACT:
654 info->flash_id = FLASH_MAN_SST;
655 break;
656 case (CFG_FLASH_WORD_SIZE) STM_MANUFACT:
657 info->flash_id = FLASH_MAN_STM;
658 break;
Stefan Roesedb9e2a32006-08-07 14:31:21 +0200659 case (CFG_FLASH_WORD_SIZE) MX_MANUFACT:
660 info->flash_id = FLASH_MAN_MX;
661 break;
Stefan Roese363330b2005-08-04 17:09:16 +0200662 default:
663 info->flash_id = FLASH_UNKNOWN;
664 info->sector_count = 0;
665 info->size = 0;
666 return (0); /* no or unknown flash */
667 }
668
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200669 value = addr2[1]; /* device ID */
Stefan Roese363330b2005-08-04 17:09:16 +0200670
671 DEBUGF("\nFLASH DEVICEID: %x\n", value);
672
673 switch (value) {
674
675 case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T:
676 info->flash_id += FLASH_AM320T;
677 info->sector_count = 71;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200678 info->size = 0x00400000; break; /* => 4 MiB */
Stefan Roese363330b2005-08-04 17:09:16 +0200679
680 case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B:
681 info->flash_id += FLASH_AM320B;
682 info->sector_count = 71;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200683 info->size = 0x00400000; break; /* => 4 MiB */
Stefan Roese363330b2005-08-04 17:09:16 +0200684
685 case (CFG_FLASH_WORD_SIZE)STM_ID_29W320DT:
686 info->flash_id += FLASH_STMW320DT;
687 info->sector_count = 67;
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200688 info->size = 0x00400000; break; /* => 4 MiB */
Stefan Roese363330b2005-08-04 17:09:16 +0200689
Stefan Roesedb9e2a32006-08-07 14:31:21 +0200690 case (CFG_FLASH_WORD_SIZE)MX_ID_LV320T:
691 info->flash_id += FLASH_MXLV320T;
692 info->sector_count = 71;
693 info->size = 0x00400000;
694 break; /* => 4 MB */
695
Stefan Roese363330b2005-08-04 17:09:16 +0200696 default:
697 info->flash_id = FLASH_UNKNOWN;
698 return (0); /* => no or unknown flash */
699 }
700
701 /* set up sector start address table */
702 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
703 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
704 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
705 for (i = 0; i < info->sector_count; i++)
706 info->start[i] = base + (i * 0x00010000);
707 } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) {
708 /* set sector offsets for top boot block type */
709 base += info->size;
710 i = info->sector_count;
711 /* 1 x 16k boot sector */
712 base -= 16 << 10;
713 --i;
714 info->start[i] = base;
715 /* 2 x 8k boot sectors */
716 for (n=0; n<2; ++n) {
717 base -= 8 << 10;
718 --i;
719 info->start[i] = base;
720 }
721 /* 1 x 32k boot sector */
722 base -= 32 << 10;
723 --i;
724 info->start[i] = base;
725
726 while (i > 0) { /* 64k regular sectors */
727 base -= 64 << 10;
728 --i;
729 info->start[i] = base;
730 }
Stefan Roesedb9e2a32006-08-07 14:31:21 +0200731 } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T) {
732 i = info->sector_count - 1;
733 info->start[i--] = base + info->size - 0x00002000;
734 info->start[i--] = base + info->size - 0x00004000;
735 info->start[i--] = base + info->size - 0x00006000;
736 info->start[i--] = base + info->size - 0x00008000;
737 info->start[i--] = base + info->size - 0x0000a000;
738 info->start[i--] = base + info->size - 0x0000c000;
739 info->start[i--] = base + info->size - 0x0000e000;
740 info->start[i--] = base + info->size - 0x00010000;
741
742 for (; i >= 0; i--)
743 info->start[i] = base + i * 0x00010000;
Stefan Roese363330b2005-08-04 17:09:16 +0200744 } else {
745 if (info->flash_id & FLASH_BTYPE) {
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200746 /* set sector offsets for bottom boot block type */
Stefan Roese363330b2005-08-04 17:09:16 +0200747 info->start[0] = base + 0x00000000;
748 info->start[1] = base + 0x00004000;
749 info->start[2] = base + 0x00006000;
750 info->start[3] = base + 0x00008000;
751 for (i = 4; i < info->sector_count; i++) {
752 info->start[i] =
753 base + (i * 0x00010000) - 0x00030000;
754 }
755 } else {
Wolfgang Denkdd314d12006-08-27 18:10:01 +0200756 /* set sector offsets for top boot block type */
Stefan Roese363330b2005-08-04 17:09:16 +0200757 i = info->sector_count - 1;
758 info->start[i--] = base + info->size - 0x00004000;
759 info->start[i--] = base + info->size - 0x00006000;
760 info->start[i--] = base + info->size - 0x00008000;
761 for (; i >= 0; i--) {
762 info->start[i] = base + i * 0x00010000;
763 }
764 }
765 }
766
767 /* check for protected sectors */
768 for (i = 0; i < info->sector_count; i++) {
769 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
770 /* D0 = 1 if protected */
771 addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
772
773 /* For AMD29033C flash we need to resend the command of *
774 * reading flash protection for upper 8 Mb of flash */
775 if (i == 32) {
776 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
777 addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
778 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x90909090;
779 }
780
781 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
782 info->protect[i] = 0;
783 else
784 info->protect[i] = addr2[2] & 1;
785 }
786
787 /* issue bank reset to return to read mode */
788 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0;
789
790 return (info->size);
791}
792
793static int wait_for_DQ7_2(flash_info_t * info, int sect)
794{
795 ulong start, now, last;
796 volatile CFG_FLASH_WORD_SIZE *addr =
797 (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
798
799 start = get_timer(0);
800 last = start;
801 while ((addr[0] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
802 (CFG_FLASH_WORD_SIZE) 0x00800080) {
803 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
804 printf("Timeout\n");
805 return -1;
806 }
807 /* show that we're waiting */
808 if ((now - last) > 1000) { /* every second */
809 putc('.');
810 last = now;
811 }
812 }
813 return 0;
814}
815
816static int flash_erase_2(flash_info_t * info, int s_first, int s_last)
817{
818 volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
819 volatile CFG_FLASH_WORD_SIZE *addr2;
820 int flag, prot, sect, l_sect;
821 int i;
822
823 if ((s_first < 0) || (s_first > s_last)) {
824 if (info->flash_id == FLASH_UNKNOWN) {
825 printf("- missing\n");
826 } else {
827 printf("- no sectors to erase\n");
828 }
829 return 1;
830 }
831
832 if (info->flash_id == FLASH_UNKNOWN) {
833 printf("Can't erase unknown flash type - aborted\n");
834 return 1;
835 }
836
837 prot = 0;
838 for (sect = s_first; sect <= s_last; ++sect) {
839 if (info->protect[sect]) {
840 prot++;
841 }
842 }
843
844 if (prot) {
845 printf("- Warning: %d protected sectors will not be erased!\n",
846 prot);
847 } else {
848 printf("\n");
849 }
850
851 l_sect = -1;
852
853 /* Disable interrupts which might cause a timeout here */
854 flag = disable_interrupts();
855
856 /* Start erase on unprotected sectors */
857 for (sect = s_first; sect <= s_last; sect++) {
858 if (info->protect[sect] == 0) { /* not protected */
859 addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
860
861 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
862 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
863 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
864 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
865 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
866 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
867 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00500050; /* block erase */
868 for (i = 0; i < 50; i++)
869 udelay(1000); /* wait 1 ms */
870 } else {
871 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
872 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
873 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
874 addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
875 addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
876 addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
877 }
878 l_sect = sect;
879 /*
880 * Wait for each sector to complete, it's more
881 * reliable. According to AMD Spec, you must
882 * issue all erase commands within a specified
883 * timeout. This has been seen to fail, especially
884 * if printf()s are included (for debug)!!
885 */
886 wait_for_DQ7_2(info, sect);
887 }
888 }
889
890 /* re-enable interrupts if necessary */
891 if (flag)
892 enable_interrupts();
893
894 /* wait at least 80us - let's wait 1 ms */
895 udelay(1000);
896
897 /* reset to read mode */
898 addr = (CFG_FLASH_WORD_SIZE *) info->start[0];
899 addr[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
900
901 printf(" done\n");
902 return 0;
903}
904
905static int write_word_2(flash_info_t * info, ulong dest, ulong data)
Stefan Roese3e1f1b32005-08-01 16:49:12 +0200906{
907 volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
908 volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *) dest;
909 volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *) & data;
910 ulong start;
911 int i;
912
913 /* Check if Flash is (sufficiently) erased */
914 if ((*((vu_long *)dest) & data) != data) {
915 return (2);
916 }
917
918 for (i = 0; i < 4 / sizeof(CFG_FLASH_WORD_SIZE); i++) {
919 int flag;
920
921 /* Disable interrupts which might cause a timeout here */
922 flag = disable_interrupts();
923
924 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
925 addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
926 addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00A000A0;
927
928 dest2[i] = data2[i];
929
930 /* re-enable interrupts if necessary */
931 if (flag)
932 enable_interrupts();
933
934 /* data polling for D7 */
935 start = get_timer(0);
936 while ((dest2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
937 (data2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080)) {
938
939 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
940 return (1);
941 }
942 }
943 }
944
945 return (0);
946}
Stefan Roese363330b2005-08-04 17:09:16 +0200947#endif /* CFG_FLASH_2ND_16BIT_DEV */