Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2004-2005 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * (C) Copyright 2002 Jun Gu <jung@artesyncp.com> |
| 6 | * Add support for Am29F016D and dynamic switch setting. |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | /* |
| 28 | * Modified 4/5/2001 |
| 29 | * Wait for completion of each sector erase command issued |
| 30 | * 4/5/2001 |
| 31 | * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com |
| 32 | */ |
| 33 | |
| 34 | #include <common.h> |
| 35 | #include <ppc4xx.h> |
| 36 | #include <asm/processor.h> |
| 37 | |
| 38 | flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
| 39 | |
| 40 | /*----------------------------------------------------------------------- |
| 41 | * Functions |
| 42 | */ |
| 43 | static int write_word(flash_info_t * info, ulong dest, ulong data); |
Stefan Roese | 363330b | 2005-08-04 17:09:16 +0200 | [diff] [blame^] | 44 | #ifdef CFG_FLASH_2ND_16BIT_DEV |
| 45 | static int write_word_1(flash_info_t * info, ulong dest, ulong data); |
| 46 | static int write_word_2(flash_info_t * info, ulong dest, ulong data); |
| 47 | static int flash_erase_1(flash_info_t * info, int s_first, int s_last); |
| 48 | static int flash_erase_2(flash_info_t * info, int s_first, int s_last); |
| 49 | static ulong flash_get_size_1(vu_long * addr, flash_info_t * info); |
| 50 | static ulong flash_get_size_2(vu_long * addr, flash_info_t * info); |
| 51 | #endif |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 52 | |
| 53 | void flash_print_info(flash_info_t * info) |
| 54 | { |
| 55 | int i; |
| 56 | int k; |
| 57 | int size; |
| 58 | int erased; |
| 59 | volatile unsigned long *flash; |
| 60 | |
| 61 | if (info->flash_id == FLASH_UNKNOWN) { |
| 62 | printf("missing or unknown FLASH type\n"); |
| 63 | return; |
| 64 | } |
| 65 | |
| 66 | switch (info->flash_id & FLASH_VENDMASK) { |
| 67 | case FLASH_MAN_AMD: |
| 68 | printf("AMD "); |
| 69 | break; |
| 70 | case FLASH_MAN_STM: |
| 71 | printf("STM "); |
| 72 | break; |
| 73 | case FLASH_MAN_FUJ: |
| 74 | printf("FUJITSU "); |
| 75 | break; |
| 76 | case FLASH_MAN_SST: |
| 77 | printf("SST "); |
| 78 | break; |
| 79 | default: |
| 80 | printf("Unknown Vendor "); |
| 81 | break; |
| 82 | } |
| 83 | |
| 84 | switch (info->flash_id & FLASH_TYPEMASK) { |
| 85 | case FLASH_AM040: |
| 86 | printf("AM29F040 (512 Kbit, uniform sector size)\n"); |
| 87 | break; |
| 88 | case FLASH_AM400B: |
| 89 | printf("AM29LV400B (4 Mbit, bottom boot sect)\n"); |
| 90 | break; |
| 91 | case FLASH_AM400T: |
| 92 | printf("AM29LV400T (4 Mbit, top boot sector)\n"); |
| 93 | break; |
| 94 | case FLASH_AM800B: |
| 95 | printf("AM29LV800B (8 Mbit, bottom boot sect)\n"); |
| 96 | break; |
| 97 | case FLASH_AM800T: |
| 98 | printf("AM29LV800T (8 Mbit, top boot sector)\n"); |
| 99 | break; |
| 100 | case FLASH_AMD016: |
| 101 | printf("AM29F016D (16 Mbit, uniform sector size)\n"); |
| 102 | break; |
| 103 | case FLASH_AM160B: |
| 104 | printf("AM29LV160B (16 Mbit, bottom boot sect)\n"); |
| 105 | break; |
| 106 | case FLASH_AM160T: |
| 107 | printf("AM29LV160T (16 Mbit, top boot sector)\n"); |
| 108 | break; |
| 109 | case FLASH_AM320B: |
| 110 | printf("AM29LV320B (32 Mbit, bottom boot sect)\n"); |
| 111 | break; |
| 112 | case FLASH_AM320T: |
| 113 | printf("AM29LV320T (32 Mbit, top boot sector)\n"); |
| 114 | break; |
| 115 | case FLASH_AM033C: |
| 116 | printf("AM29LV033C (32 Mbit, top boot sector)\n"); |
| 117 | break; |
| 118 | case FLASH_SST800A: |
| 119 | printf("SST39LF/VF800 (8 Mbit, uniform sector size)\n"); |
| 120 | break; |
| 121 | case FLASH_SST160A: |
| 122 | printf("SST39LF/VF160 (16 Mbit, uniform sector size)\n"); |
| 123 | break; |
Stefan Roese | 363330b | 2005-08-04 17:09:16 +0200 | [diff] [blame^] | 124 | case FLASH_STMW320DT: |
| 125 | printf ("M29W320DT (32 M, top sector)\n"); |
| 126 | break; |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 127 | default: |
| 128 | printf("Unknown Chip Type\n"); |
| 129 | break; |
| 130 | } |
| 131 | |
| 132 | printf(" Size: %ld KB in %d Sectors\n", |
| 133 | info->size >> 10, info->sector_count); |
| 134 | |
| 135 | printf(" Sector Start Addresses:"); |
| 136 | for (i = 0; i < info->sector_count; ++i) { |
| 137 | /* |
| 138 | * Check if whole sector is erased |
| 139 | */ |
| 140 | if (i != (info->sector_count - 1)) |
| 141 | size = info->start[i + 1] - info->start[i]; |
| 142 | else |
| 143 | size = info->start[0] + info->size - info->start[i]; |
| 144 | erased = 1; |
| 145 | flash = (volatile unsigned long *)info->start[i]; |
| 146 | size = size >> 2; /* divide by 4 for longword access */ |
| 147 | for (k = 0; k < size; k++) { |
| 148 | if (*flash++ != 0xffffffff) { |
| 149 | erased = 0; |
| 150 | break; |
| 151 | } |
| 152 | } |
| 153 | |
| 154 | if ((i % 5) == 0) |
| 155 | printf("\n "); |
| 156 | printf(" %08lX%s%s", |
| 157 | info->start[i], |
| 158 | erased ? " E" : " ", info->protect[i] ? "RO " : " "); |
| 159 | } |
| 160 | printf("\n"); |
| 161 | return; |
| 162 | } |
| 163 | |
| 164 | |
| 165 | /* |
| 166 | * The following code cannot be run from FLASH! |
| 167 | */ |
Stefan Roese | 363330b | 2005-08-04 17:09:16 +0200 | [diff] [blame^] | 168 | #ifdef CFG_FLASH_2ND_16BIT_DEV |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 169 | static ulong flash_get_size(vu_long * addr, flash_info_t * info) |
| 170 | { |
Stefan Roese | 363330b | 2005-08-04 17:09:16 +0200 | [diff] [blame^] | 171 | /* bit 0 used for big flash marking */ |
| 172 | if ((ulong)addr & 0x1) { |
| 173 | return flash_get_size_2((vu_long *)((ulong)addr & 0xfffffffe), info); |
| 174 | } else { |
| 175 | return flash_get_size_1(addr, info); |
| 176 | } |
| 177 | } |
| 178 | |
| 179 | static ulong flash_get_size_1(vu_long * addr, flash_info_t * info) |
| 180 | #else |
| 181 | static ulong flash_get_size(vu_long * addr, flash_info_t * info) |
| 182 | #endif |
| 183 | { |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 184 | short i; |
| 185 | CFG_FLASH_WORD_SIZE value; |
| 186 | ulong base = (ulong) addr; |
| 187 | volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) addr; |
| 188 | |
| 189 | DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr); |
| 190 | |
| 191 | /* Write auto select command: read Manufacturer ID */ |
| 192 | addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA; |
| 193 | addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055; |
| 194 | addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00900090; |
| 195 | udelay(1000); |
| 196 | |
| 197 | value = addr2[0]; |
| 198 | DEBUGF("FLASH MANUFACT: %x\n", value); |
| 199 | |
| 200 | switch (value) { |
| 201 | case (CFG_FLASH_WORD_SIZE) AMD_MANUFACT: |
| 202 | info->flash_id = FLASH_MAN_AMD; |
| 203 | break; |
| 204 | case (CFG_FLASH_WORD_SIZE) FUJ_MANUFACT: |
| 205 | info->flash_id = FLASH_MAN_FUJ; |
| 206 | break; |
| 207 | case (CFG_FLASH_WORD_SIZE) SST_MANUFACT: |
| 208 | info->flash_id = FLASH_MAN_SST; |
| 209 | break; |
| 210 | case (CFG_FLASH_WORD_SIZE) STM_MANUFACT: |
| 211 | info->flash_id = FLASH_MAN_STM; |
| 212 | break; |
| 213 | default: |
| 214 | info->flash_id = FLASH_UNKNOWN; |
| 215 | info->sector_count = 0; |
| 216 | info->size = 0; |
| 217 | return (0); /* no or unknown flash */ |
| 218 | } |
| 219 | |
| 220 | value = addr2[1]; /* device ID */ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 221 | DEBUGF("\nFLASH DEVICEID: %x\n", value); |
| 222 | |
| 223 | switch (value) { |
| 224 | case (CFG_FLASH_WORD_SIZE) AMD_ID_LV040B: |
| 225 | info->flash_id += FLASH_AM040; |
| 226 | info->sector_count = 8; |
| 227 | info->size = 0x0080000; /* => 512 ko */ |
| 228 | break; |
| 229 | |
| 230 | case (CFG_FLASH_WORD_SIZE) AMD_ID_F040B: |
| 231 | info->flash_id += FLASH_AM040; |
| 232 | info->sector_count = 8; |
| 233 | info->size = 0x0080000; /* => 512 ko */ |
| 234 | break; |
| 235 | |
| 236 | case (CFG_FLASH_WORD_SIZE) STM_ID_M29W040B: |
| 237 | info->flash_id += FLASH_AM040; |
| 238 | info->sector_count = 8; |
| 239 | info->size = 0x0080000; /* => 512 ko */ |
| 240 | break; |
| 241 | |
| 242 | case (CFG_FLASH_WORD_SIZE) AMD_ID_F016D: |
| 243 | info->flash_id += FLASH_AMD016; |
| 244 | info->sector_count = 32; |
| 245 | info->size = 0x00200000; |
| 246 | break; /* => 2 MB */ |
| 247 | |
| 248 | case (CFG_FLASH_WORD_SIZE) AMD_ID_LV033C: |
| 249 | info->flash_id += FLASH_AMDLV033C; |
| 250 | info->sector_count = 64; |
| 251 | info->size = 0x00400000; |
| 252 | break; /* => 4 MB */ |
| 253 | |
| 254 | case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400T: |
| 255 | info->flash_id += FLASH_AM400T; |
| 256 | info->sector_count = 11; |
| 257 | info->size = 0x00080000; |
| 258 | break; /* => 0.5 MB */ |
| 259 | |
| 260 | case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400B: |
| 261 | info->flash_id += FLASH_AM400B; |
| 262 | info->sector_count = 11; |
| 263 | info->size = 0x00080000; |
| 264 | break; /* => 0.5 MB */ |
| 265 | |
| 266 | case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800T: |
| 267 | info->flash_id += FLASH_AM800T; |
| 268 | info->sector_count = 19; |
| 269 | info->size = 0x00100000; |
| 270 | break; /* => 1 MB */ |
| 271 | |
| 272 | case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800B: |
| 273 | info->flash_id += FLASH_AM800B; |
| 274 | info->sector_count = 19; |
| 275 | info->size = 0x00100000; |
| 276 | break; /* => 1 MB */ |
| 277 | |
| 278 | case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160T: |
| 279 | info->flash_id += FLASH_AM160T; |
| 280 | info->sector_count = 35; |
| 281 | info->size = 0x00200000; |
| 282 | break; /* => 2 MB */ |
| 283 | |
| 284 | case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160B: |
| 285 | info->flash_id += FLASH_AM160B; |
| 286 | info->sector_count = 35; |
| 287 | info->size = 0x00200000; |
| 288 | break; /* => 2 MB */ |
| 289 | |
| 290 | default: |
| 291 | info->flash_id = FLASH_UNKNOWN; |
| 292 | return (0); /* => no or unknown flash */ |
| 293 | } |
| 294 | |
| 295 | /* set up sector start address table */ |
| 296 | if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || |
| 297 | ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) || |
| 298 | ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) { |
| 299 | for (i = 0; i < info->sector_count; i++) |
| 300 | info->start[i] = base + (i * 0x00010000); |
| 301 | } else { |
| 302 | if (info->flash_id & FLASH_BTYPE) { |
| 303 | /* set sector offsets for bottom boot block type */ |
| 304 | info->start[0] = base + 0x00000000; |
| 305 | info->start[1] = base + 0x00004000; |
| 306 | info->start[2] = base + 0x00006000; |
| 307 | info->start[3] = base + 0x00008000; |
| 308 | for (i = 4; i < info->sector_count; i++) { |
| 309 | info->start[i] = |
| 310 | base + (i * 0x00010000) - 0x00030000; |
| 311 | } |
| 312 | } else { |
| 313 | /* set sector offsets for top boot block type */ |
| 314 | i = info->sector_count - 1; |
| 315 | info->start[i--] = base + info->size - 0x00004000; |
| 316 | info->start[i--] = base + info->size - 0x00006000; |
| 317 | info->start[i--] = base + info->size - 0x00008000; |
| 318 | for (; i >= 0; i--) { |
| 319 | info->start[i] = base + i * 0x00010000; |
| 320 | } |
| 321 | } |
| 322 | } |
| 323 | |
| 324 | /* check for protected sectors */ |
| 325 | for (i = 0; i < info->sector_count; i++) { |
| 326 | /* read sector protection at sector address, (A7 .. A0) = 0x02 */ |
| 327 | /* D0 = 1 if protected */ |
| 328 | addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]); |
| 329 | |
| 330 | /* For AMD29033C flash we need to resend the command of * |
| 331 | * reading flash protection for upper 8 Mb of flash */ |
| 332 | if (i == 32) { |
| 333 | addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA; |
| 334 | addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555; |
| 335 | addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x90909090; |
| 336 | } |
| 337 | |
| 338 | if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) |
| 339 | info->protect[i] = 0; |
| 340 | else |
| 341 | info->protect[i] = addr2[2] & 1; |
| 342 | } |
| 343 | |
| 344 | /* issue bank reset to return to read mode */ |
| 345 | addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0; |
| 346 | |
| 347 | return (info->size); |
| 348 | } |
| 349 | |
Stefan Roese | 363330b | 2005-08-04 17:09:16 +0200 | [diff] [blame^] | 350 | static int wait_for_DQ7_1(flash_info_t * info, int sect) |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 351 | { |
| 352 | ulong start, now, last; |
| 353 | volatile CFG_FLASH_WORD_SIZE *addr = |
| 354 | (CFG_FLASH_WORD_SIZE *) (info->start[sect]); |
| 355 | |
| 356 | start = get_timer(0); |
| 357 | last = start; |
| 358 | while ((addr[0] & (CFG_FLASH_WORD_SIZE) 0x00800080) != |
| 359 | (CFG_FLASH_WORD_SIZE) 0x00800080) { |
| 360 | if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { |
| 361 | printf("Timeout\n"); |
| 362 | return -1; |
| 363 | } |
| 364 | /* show that we're waiting */ |
| 365 | if ((now - last) > 1000) { /* every second */ |
| 366 | putc('.'); |
| 367 | last = now; |
| 368 | } |
| 369 | } |
| 370 | return 0; |
| 371 | } |
| 372 | |
Stefan Roese | 363330b | 2005-08-04 17:09:16 +0200 | [diff] [blame^] | 373 | #ifdef CFG_FLASH_2ND_16BIT_DEV |
| 374 | int flash_erase(flash_info_t * info, int s_first, int s_last) |
| 375 | { |
| 376 | if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) || |
| 377 | ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) || |
| 378 | ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT)) { |
| 379 | return flash_erase_2(info, s_first, s_last); |
| 380 | } else { |
| 381 | return flash_erase_1(info, s_first, s_last); |
| 382 | } |
| 383 | } |
| 384 | |
| 385 | static int flash_erase_1(flash_info_t * info, int s_first, int s_last) |
| 386 | #else |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 387 | int flash_erase(flash_info_t * info, int s_first, int s_last) |
Stefan Roese | 363330b | 2005-08-04 17:09:16 +0200 | [diff] [blame^] | 388 | #endif |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 389 | { |
| 390 | volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]); |
| 391 | volatile CFG_FLASH_WORD_SIZE *addr2; |
| 392 | int flag, prot, sect, l_sect; |
| 393 | int i; |
| 394 | |
| 395 | if ((s_first < 0) || (s_first > s_last)) { |
| 396 | if (info->flash_id == FLASH_UNKNOWN) { |
| 397 | printf("- missing\n"); |
| 398 | } else { |
| 399 | printf("- no sectors to erase\n"); |
| 400 | } |
| 401 | return 1; |
| 402 | } |
| 403 | |
| 404 | if (info->flash_id == FLASH_UNKNOWN) { |
| 405 | printf("Can't erase unknown flash type - aborted\n"); |
| 406 | return 1; |
| 407 | } |
| 408 | |
| 409 | prot = 0; |
| 410 | for (sect = s_first; sect <= s_last; ++sect) { |
| 411 | if (info->protect[sect]) { |
| 412 | prot++; |
| 413 | } |
| 414 | } |
| 415 | |
| 416 | if (prot) { |
| 417 | printf("- Warning: %d protected sectors will not be erased!\n", |
| 418 | prot); |
| 419 | } else { |
| 420 | printf("\n"); |
| 421 | } |
| 422 | |
| 423 | l_sect = -1; |
| 424 | |
| 425 | /* Disable interrupts which might cause a timeout here */ |
| 426 | flag = disable_interrupts(); |
| 427 | |
| 428 | /* Start erase on unprotected sectors */ |
| 429 | for (sect = s_first; sect <= s_last; sect++) { |
| 430 | if (info->protect[sect] == 0) { /* not protected */ |
| 431 | addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]); |
| 432 | |
| 433 | if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { |
| 434 | addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA; |
| 435 | addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055; |
| 436 | addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080; |
| 437 | addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA; |
| 438 | addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055; |
| 439 | addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00500050; /* block erase */ |
| 440 | for (i = 0; i < 50; i++) |
| 441 | udelay(1000); /* wait 1 ms */ |
| 442 | } else { |
| 443 | addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA; |
| 444 | addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055; |
| 445 | addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080; |
| 446 | addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA; |
| 447 | addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055; |
| 448 | addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00300030; /* sector erase */ |
| 449 | } |
| 450 | l_sect = sect; |
| 451 | /* |
| 452 | * Wait for each sector to complete, it's more |
| 453 | * reliable. According to AMD Spec, you must |
| 454 | * issue all erase commands within a specified |
| 455 | * timeout. This has been seen to fail, especially |
| 456 | * if printf()s are included (for debug)!! |
| 457 | */ |
Stefan Roese | 363330b | 2005-08-04 17:09:16 +0200 | [diff] [blame^] | 458 | wait_for_DQ7_1(info, sect); |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 459 | } |
| 460 | } |
| 461 | |
| 462 | /* re-enable interrupts if necessary */ |
| 463 | if (flag) |
| 464 | enable_interrupts(); |
| 465 | |
| 466 | /* wait at least 80us - let's wait 1 ms */ |
| 467 | udelay(1000); |
| 468 | |
| 469 | /* reset to read mode */ |
| 470 | addr = (CFG_FLASH_WORD_SIZE *) info->start[0]; |
| 471 | addr[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */ |
| 472 | |
| 473 | printf(" done\n"); |
| 474 | return 0; |
| 475 | } |
| 476 | |
| 477 | /*----------------------------------------------------------------------- |
| 478 | * Copy memory to flash, returns: |
| 479 | * 0 - OK |
| 480 | * 1 - write timeout |
| 481 | * 2 - Flash not erased |
| 482 | */ |
| 483 | int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt) |
| 484 | { |
| 485 | ulong cp, wp, data; |
| 486 | int i, l, rc; |
| 487 | |
| 488 | wp = (addr & ~3); /* get lower word aligned address */ |
| 489 | |
| 490 | /* |
| 491 | * handle unaligned start bytes |
| 492 | */ |
| 493 | if ((l = addr - wp) != 0) { |
| 494 | data = 0; |
| 495 | for (i = 0, cp = wp; i < l; ++i, ++cp) { |
| 496 | data = (data << 8) | (*(uchar *) cp); |
| 497 | } |
| 498 | for (; i < 4 && cnt > 0; ++i) { |
| 499 | data = (data << 8) | *src++; |
| 500 | --cnt; |
| 501 | ++cp; |
| 502 | } |
| 503 | for (; cnt == 0 && i < 4; ++i, ++cp) { |
| 504 | data = (data << 8) | (*(uchar *) cp); |
| 505 | } |
| 506 | |
| 507 | if ((rc = write_word(info, wp, data)) != 0) { |
| 508 | return (rc); |
| 509 | } |
| 510 | wp += 4; |
| 511 | } |
| 512 | |
| 513 | /* |
| 514 | * handle word aligned part |
| 515 | */ |
| 516 | while (cnt >= 4) { |
| 517 | data = 0; |
| 518 | for (i = 0; i < 4; ++i) { |
| 519 | data = (data << 8) | *src++; |
| 520 | } |
| 521 | if ((rc = write_word(info, wp, data)) != 0) { |
| 522 | return (rc); |
| 523 | } |
| 524 | wp += 4; |
| 525 | cnt -= 4; |
| 526 | } |
| 527 | |
| 528 | if (cnt == 0) { |
| 529 | return (0); |
| 530 | } |
| 531 | |
| 532 | /* |
| 533 | * handle unaligned tail bytes |
| 534 | */ |
| 535 | data = 0; |
| 536 | for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { |
| 537 | data = (data << 8) | *src++; |
| 538 | --cnt; |
| 539 | } |
| 540 | for (; i < 4; ++i, ++cp) { |
| 541 | data = (data << 8) | (*(uchar *) cp); |
| 542 | } |
| 543 | |
| 544 | return (write_word(info, wp, data)); |
| 545 | } |
| 546 | |
| 547 | /*----------------------------------------------------------------------- |
Stefan Roese | 363330b | 2005-08-04 17:09:16 +0200 | [diff] [blame^] | 548 | * Copy memory to flash, returns: |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 549 | * 0 - OK |
| 550 | * 1 - write timeout |
| 551 | * 2 - Flash not erased |
| 552 | */ |
Stefan Roese | 363330b | 2005-08-04 17:09:16 +0200 | [diff] [blame^] | 553 | #ifdef CFG_FLASH_2ND_16BIT_DEV |
| 554 | static int write_word(flash_info_t * info, ulong dest, ulong data) |
| 555 | { |
| 556 | if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) || |
| 557 | ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) || |
| 558 | ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT)) { |
| 559 | return write_word_2(info, dest, data); |
| 560 | } else { |
| 561 | return write_word_1(info, dest, data); |
| 562 | } |
| 563 | } |
| 564 | |
| 565 | static int write_word_1(flash_info_t * info, ulong dest, ulong data) |
| 566 | #else |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 567 | static int write_word(flash_info_t * info, ulong dest, ulong data) |
Stefan Roese | 363330b | 2005-08-04 17:09:16 +0200 | [diff] [blame^] | 568 | #endif |
| 569 | { |
| 570 | volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[0]); |
| 571 | volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *) dest; |
| 572 | volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *) & data; |
| 573 | ulong start; |
| 574 | int i; |
| 575 | |
| 576 | /* Check if Flash is (sufficiently) erased */ |
| 577 | if ((*((vu_long *)dest) & data) != data) { |
| 578 | return (2); |
| 579 | } |
| 580 | |
| 581 | for (i = 0; i < 4 / sizeof(CFG_FLASH_WORD_SIZE); i++) { |
| 582 | int flag; |
| 583 | |
| 584 | /* Disable interrupts which might cause a timeout here */ |
| 585 | flag = disable_interrupts(); |
| 586 | |
| 587 | addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA; |
| 588 | addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055; |
| 589 | addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00A000A0; |
| 590 | |
| 591 | dest2[i] = data2[i]; |
| 592 | |
| 593 | /* re-enable interrupts if necessary */ |
| 594 | if (flag) |
| 595 | enable_interrupts(); |
| 596 | |
| 597 | /* data polling for D7 */ |
| 598 | start = get_timer(0); |
| 599 | while ((dest2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080) != |
| 600 | (data2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080)) { |
| 601 | |
| 602 | if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { |
| 603 | return (1); |
| 604 | } |
| 605 | } |
| 606 | } |
| 607 | |
| 608 | return (0); |
| 609 | } |
| 610 | |
| 611 | #ifdef CFG_FLASH_2ND_16BIT_DEV |
| 612 | |
| 613 | #undef CFG_FLASH_WORD_SIZE |
| 614 | #define CFG_FLASH_WORD_SIZE unsigned short |
| 615 | |
| 616 | /* |
| 617 | * The following code cannot be run from FLASH! |
| 618 | */ |
| 619 | static ulong flash_get_size_2(vu_long * addr, flash_info_t * info) |
| 620 | { |
| 621 | short i; |
| 622 | int n; |
| 623 | CFG_FLASH_WORD_SIZE value; |
| 624 | ulong base = (ulong) addr; |
| 625 | volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) addr; |
| 626 | |
| 627 | DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr); |
| 628 | |
| 629 | /* Write auto select command: read Manufacturer ID */ |
| 630 | addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA; |
| 631 | addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055; |
| 632 | addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00900090; |
| 633 | udelay(1000); |
| 634 | |
| 635 | value = addr2[0]; |
| 636 | DEBUGF("FLASH MANUFACT: %x\n", value); |
| 637 | |
| 638 | switch (value) { |
| 639 | case (CFG_FLASH_WORD_SIZE) AMD_MANUFACT: |
| 640 | info->flash_id = FLASH_MAN_AMD; |
| 641 | break; |
| 642 | case (CFG_FLASH_WORD_SIZE) FUJ_MANUFACT: |
| 643 | info->flash_id = FLASH_MAN_FUJ; |
| 644 | break; |
| 645 | case (CFG_FLASH_WORD_SIZE) SST_MANUFACT: |
| 646 | info->flash_id = FLASH_MAN_SST; |
| 647 | break; |
| 648 | case (CFG_FLASH_WORD_SIZE) STM_MANUFACT: |
| 649 | info->flash_id = FLASH_MAN_STM; |
| 650 | break; |
| 651 | default: |
| 652 | info->flash_id = FLASH_UNKNOWN; |
| 653 | info->sector_count = 0; |
| 654 | info->size = 0; |
| 655 | return (0); /* no or unknown flash */ |
| 656 | } |
| 657 | |
| 658 | value = addr2[1]; /* device ID */ |
| 659 | |
| 660 | DEBUGF("\nFLASH DEVICEID: %x\n", value); |
| 661 | |
| 662 | switch (value) { |
| 663 | |
| 664 | case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T: |
| 665 | info->flash_id += FLASH_AM320T; |
| 666 | info->sector_count = 71; |
| 667 | info->size = 0x00400000; break; /* => 4 MB */ |
| 668 | |
| 669 | case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B: |
| 670 | info->flash_id += FLASH_AM320B; |
| 671 | info->sector_count = 71; |
| 672 | info->size = 0x00400000; break; /* => 4 MB */ |
| 673 | |
| 674 | case (CFG_FLASH_WORD_SIZE)STM_ID_29W320DT: |
| 675 | info->flash_id += FLASH_STMW320DT; |
| 676 | info->sector_count = 67; |
| 677 | info->size = 0x00400000; break; /* => 4 MB */ |
| 678 | |
| 679 | default: |
| 680 | info->flash_id = FLASH_UNKNOWN; |
| 681 | return (0); /* => no or unknown flash */ |
| 682 | } |
| 683 | |
| 684 | /* set up sector start address table */ |
| 685 | if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || |
| 686 | ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) || |
| 687 | ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) { |
| 688 | for (i = 0; i < info->sector_count; i++) |
| 689 | info->start[i] = base + (i * 0x00010000); |
| 690 | } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) { |
| 691 | /* set sector offsets for top boot block type */ |
| 692 | base += info->size; |
| 693 | i = info->sector_count; |
| 694 | /* 1 x 16k boot sector */ |
| 695 | base -= 16 << 10; |
| 696 | --i; |
| 697 | info->start[i] = base; |
| 698 | /* 2 x 8k boot sectors */ |
| 699 | for (n=0; n<2; ++n) { |
| 700 | base -= 8 << 10; |
| 701 | --i; |
| 702 | info->start[i] = base; |
| 703 | } |
| 704 | /* 1 x 32k boot sector */ |
| 705 | base -= 32 << 10; |
| 706 | --i; |
| 707 | info->start[i] = base; |
| 708 | |
| 709 | while (i > 0) { /* 64k regular sectors */ |
| 710 | base -= 64 << 10; |
| 711 | --i; |
| 712 | info->start[i] = base; |
| 713 | } |
| 714 | } else { |
| 715 | if (info->flash_id & FLASH_BTYPE) { |
| 716 | /* set sector offsets for bottom boot block type */ |
| 717 | info->start[0] = base + 0x00000000; |
| 718 | info->start[1] = base + 0x00004000; |
| 719 | info->start[2] = base + 0x00006000; |
| 720 | info->start[3] = base + 0x00008000; |
| 721 | for (i = 4; i < info->sector_count; i++) { |
| 722 | info->start[i] = |
| 723 | base + (i * 0x00010000) - 0x00030000; |
| 724 | } |
| 725 | } else { |
| 726 | /* set sector offsets for top boot block type */ |
| 727 | i = info->sector_count - 1; |
| 728 | info->start[i--] = base + info->size - 0x00004000; |
| 729 | info->start[i--] = base + info->size - 0x00006000; |
| 730 | info->start[i--] = base + info->size - 0x00008000; |
| 731 | for (; i >= 0; i--) { |
| 732 | info->start[i] = base + i * 0x00010000; |
| 733 | } |
| 734 | } |
| 735 | } |
| 736 | |
| 737 | /* check for protected sectors */ |
| 738 | for (i = 0; i < info->sector_count; i++) { |
| 739 | /* read sector protection at sector address, (A7 .. A0) = 0x02 */ |
| 740 | /* D0 = 1 if protected */ |
| 741 | addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]); |
| 742 | |
| 743 | /* For AMD29033C flash we need to resend the command of * |
| 744 | * reading flash protection for upper 8 Mb of flash */ |
| 745 | if (i == 32) { |
| 746 | addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA; |
| 747 | addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555; |
| 748 | addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x90909090; |
| 749 | } |
| 750 | |
| 751 | if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) |
| 752 | info->protect[i] = 0; |
| 753 | else |
| 754 | info->protect[i] = addr2[2] & 1; |
| 755 | } |
| 756 | |
| 757 | /* issue bank reset to return to read mode */ |
| 758 | addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0; |
| 759 | |
| 760 | return (info->size); |
| 761 | } |
| 762 | |
| 763 | static int wait_for_DQ7_2(flash_info_t * info, int sect) |
| 764 | { |
| 765 | ulong start, now, last; |
| 766 | volatile CFG_FLASH_WORD_SIZE *addr = |
| 767 | (CFG_FLASH_WORD_SIZE *) (info->start[sect]); |
| 768 | |
| 769 | start = get_timer(0); |
| 770 | last = start; |
| 771 | while ((addr[0] & (CFG_FLASH_WORD_SIZE) 0x00800080) != |
| 772 | (CFG_FLASH_WORD_SIZE) 0x00800080) { |
| 773 | if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { |
| 774 | printf("Timeout\n"); |
| 775 | return -1; |
| 776 | } |
| 777 | /* show that we're waiting */ |
| 778 | if ((now - last) > 1000) { /* every second */ |
| 779 | putc('.'); |
| 780 | last = now; |
| 781 | } |
| 782 | } |
| 783 | return 0; |
| 784 | } |
| 785 | |
| 786 | static int flash_erase_2(flash_info_t * info, int s_first, int s_last) |
| 787 | { |
| 788 | volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]); |
| 789 | volatile CFG_FLASH_WORD_SIZE *addr2; |
| 790 | int flag, prot, sect, l_sect; |
| 791 | int i; |
| 792 | |
| 793 | if ((s_first < 0) || (s_first > s_last)) { |
| 794 | if (info->flash_id == FLASH_UNKNOWN) { |
| 795 | printf("- missing\n"); |
| 796 | } else { |
| 797 | printf("- no sectors to erase\n"); |
| 798 | } |
| 799 | return 1; |
| 800 | } |
| 801 | |
| 802 | if (info->flash_id == FLASH_UNKNOWN) { |
| 803 | printf("Can't erase unknown flash type - aborted\n"); |
| 804 | return 1; |
| 805 | } |
| 806 | |
| 807 | prot = 0; |
| 808 | for (sect = s_first; sect <= s_last; ++sect) { |
| 809 | if (info->protect[sect]) { |
| 810 | prot++; |
| 811 | } |
| 812 | } |
| 813 | |
| 814 | if (prot) { |
| 815 | printf("- Warning: %d protected sectors will not be erased!\n", |
| 816 | prot); |
| 817 | } else { |
| 818 | printf("\n"); |
| 819 | } |
| 820 | |
| 821 | l_sect = -1; |
| 822 | |
| 823 | /* Disable interrupts which might cause a timeout here */ |
| 824 | flag = disable_interrupts(); |
| 825 | |
| 826 | /* Start erase on unprotected sectors */ |
| 827 | for (sect = s_first; sect <= s_last; sect++) { |
| 828 | if (info->protect[sect] == 0) { /* not protected */ |
| 829 | addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]); |
| 830 | |
| 831 | if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { |
| 832 | addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA; |
| 833 | addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055; |
| 834 | addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080; |
| 835 | addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA; |
| 836 | addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055; |
| 837 | addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00500050; /* block erase */ |
| 838 | for (i = 0; i < 50; i++) |
| 839 | udelay(1000); /* wait 1 ms */ |
| 840 | } else { |
| 841 | addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA; |
| 842 | addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055; |
| 843 | addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080; |
| 844 | addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA; |
| 845 | addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055; |
| 846 | addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00300030; /* sector erase */ |
| 847 | } |
| 848 | l_sect = sect; |
| 849 | /* |
| 850 | * Wait for each sector to complete, it's more |
| 851 | * reliable. According to AMD Spec, you must |
| 852 | * issue all erase commands within a specified |
| 853 | * timeout. This has been seen to fail, especially |
| 854 | * if printf()s are included (for debug)!! |
| 855 | */ |
| 856 | wait_for_DQ7_2(info, sect); |
| 857 | } |
| 858 | } |
| 859 | |
| 860 | /* re-enable interrupts if necessary */ |
| 861 | if (flag) |
| 862 | enable_interrupts(); |
| 863 | |
| 864 | /* wait at least 80us - let's wait 1 ms */ |
| 865 | udelay(1000); |
| 866 | |
| 867 | /* reset to read mode */ |
| 868 | addr = (CFG_FLASH_WORD_SIZE *) info->start[0]; |
| 869 | addr[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */ |
| 870 | |
| 871 | printf(" done\n"); |
| 872 | return 0; |
| 873 | } |
| 874 | |
| 875 | static int write_word_2(flash_info_t * info, ulong dest, ulong data) |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 876 | { |
| 877 | volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[0]); |
| 878 | volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *) dest; |
| 879 | volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *) & data; |
| 880 | ulong start; |
| 881 | int i; |
| 882 | |
| 883 | /* Check if Flash is (sufficiently) erased */ |
| 884 | if ((*((vu_long *)dest) & data) != data) { |
| 885 | return (2); |
| 886 | } |
| 887 | |
| 888 | for (i = 0; i < 4 / sizeof(CFG_FLASH_WORD_SIZE); i++) { |
| 889 | int flag; |
| 890 | |
| 891 | /* Disable interrupts which might cause a timeout here */ |
| 892 | flag = disable_interrupts(); |
| 893 | |
| 894 | addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA; |
| 895 | addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055; |
| 896 | addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00A000A0; |
| 897 | |
| 898 | dest2[i] = data2[i]; |
| 899 | |
| 900 | /* re-enable interrupts if necessary */ |
| 901 | if (flag) |
| 902 | enable_interrupts(); |
| 903 | |
| 904 | /* data polling for D7 */ |
| 905 | start = get_timer(0); |
| 906 | while ((dest2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080) != |
| 907 | (data2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080)) { |
| 908 | |
| 909 | if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { |
| 910 | return (1); |
| 911 | } |
| 912 | } |
| 913 | } |
| 914 | |
| 915 | return (0); |
| 916 | } |
Stefan Roese | 363330b | 2005-08-04 17:09:16 +0200 | [diff] [blame^] | 917 | #endif /* CFG_FLASH_2ND_16BIT_DEV */ |