blob: d30725d3fcaae206cd91831befcc0b0b39027787 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vivek Gautam4912dcc2013-09-14 14:02:45 +05302/*
3 * USB HOST XHCI Controller stack
4 *
5 * Based on xHCI host controller driver in linux-kernel
6 * by Sarah Sharp.
7 *
8 * Copyright (C) 2008 Intel Corp.
9 * Author: Sarah Sharp
10 *
11 * Copyright (C) 2013 Samsung Electronics Co.Ltd
12 * Authors: Vivek Gautam <gautam.vivek@samsung.com>
13 * Vikas Sajjan <vikas.sajjan@samsung.com>
Vivek Gautam4912dcc2013-09-14 14:02:45 +053014 */
15
16/**
17 * This file gives the xhci stack for usb3.0 looking into
18 * xhci specification Rev1.0 (5/21/10).
19 * The quirk devices support hasn't been given yet.
20 */
21
Simon Glass63334482019-11-14 12:57:39 -070022#include <cpu_func.h>
Simon Glass49b41832015-03-25 12:22:53 -060023#include <dm.h>
Sean Anderson429ce522020-10-04 21:39:53 -040024#include <dm/device_compat.h>
Simon Glass0f2af882020-05-10 11:40:05 -060025#include <log.h>
Vivek Gautam4912dcc2013-09-14 14:02:45 +053026#include <malloc.h>
Sean Anderson429ce522020-10-04 21:39:53 -040027#include <usb.h>
28#include <usb/xhci.h>
Vivek Gautam4912dcc2013-09-14 14:02:45 +053029#include <watchdog.h>
Sean Anderson429ce522020-10-04 21:39:53 -040030#include <asm/byteorder.h>
Vivek Gautam4912dcc2013-09-14 14:02:45 +053031#include <asm/cache.h>
32#include <asm/unaligned.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060033#include <linux/bitops.h>
Simon Glassc06c1be2020-05-10 11:40:08 -060034#include <linux/bug.h>
Simon Glassdbd79542020-05-10 11:40:11 -060035#include <linux/delay.h>
Masahiro Yamada64e4f7f2016-09-21 11:28:57 +090036#include <linux/errno.h>
developer14bb3502020-09-08 19:00:03 +020037#include <linux/iopoll.h>
Vivek Gautam4912dcc2013-09-14 14:02:45 +053038
Vivek Gautam4912dcc2013-09-14 14:02:45 +053039static struct descriptor {
40 struct usb_hub_descriptor hub;
41 struct usb_device_descriptor device;
42 struct usb_config_descriptor config;
43 struct usb_interface_descriptor interface;
44 struct usb_endpoint_descriptor endpoint;
45 struct usb_ss_ep_comp_descriptor ep_companion;
46} __attribute__ ((packed)) descriptor = {
47 {
48 0xc, /* bDescLength */
49 0x2a, /* bDescriptorType: hub descriptor */
50 2, /* bNrPorts -- runtime modified */
51 cpu_to_le16(0x8), /* wHubCharacteristics */
52 10, /* bPwrOn2PwrGood */
53 0, /* bHubCntrCurrent */
Bin Meng0d66b3a2017-07-19 21:50:00 +080054 { /* Device removable */
55 } /* at most 7 ports! XXX */
Vivek Gautam4912dcc2013-09-14 14:02:45 +053056 },
57 {
58 0x12, /* bLength */
59 1, /* bDescriptorType: UDESC_DEVICE */
60 cpu_to_le16(0x0300), /* bcdUSB: v3.0 */
61 9, /* bDeviceClass: UDCLASS_HUB */
62 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
63 3, /* bDeviceProtocol: UDPROTO_SSHUBSTT */
64 9, /* bMaxPacketSize: 512 bytes 2^9 */
65 0x0000, /* idVendor */
66 0x0000, /* idProduct */
67 cpu_to_le16(0x0100), /* bcdDevice */
68 1, /* iManufacturer */
69 2, /* iProduct */
70 0, /* iSerialNumber */
71 1 /* bNumConfigurations: 1 */
72 },
73 {
74 0x9,
75 2, /* bDescriptorType: UDESC_CONFIG */
76 cpu_to_le16(0x1f), /* includes SS endpoint descriptor */
77 1, /* bNumInterface */
78 1, /* bConfigurationValue */
79 0, /* iConfiguration */
80 0x40, /* bmAttributes: UC_SELF_POWER */
81 0 /* bMaxPower */
82 },
83 {
84 0x9, /* bLength */
85 4, /* bDescriptorType: UDESC_INTERFACE */
86 0, /* bInterfaceNumber */
87 0, /* bAlternateSetting */
88 1, /* bNumEndpoints */
89 9, /* bInterfaceClass: UICLASS_HUB */
90 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
91 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
92 0 /* iInterface */
93 },
94 {
95 0x7, /* bLength */
96 5, /* bDescriptorType: UDESC_ENDPOINT */
97 0x81, /* bEndpointAddress: IN endpoint 1 */
98 3, /* bmAttributes: UE_INTERRUPT */
99 8, /* wMaxPacketSize */
100 255 /* bInterval */
101 },
102 {
103 0x06, /* ss_bLength */
104 0x30, /* ss_bDescriptorType: SS EP Companion */
105 0x00, /* ss_bMaxBurst: allows 1 TX between ACKs */
106 /* ss_bmAttributes: 1 packet per service interval */
107 0x00,
108 /* ss_wBytesPerInterval: 15 bits for max 15 ports */
109 cpu_to_le16(0x02),
110 },
111};
112
Simon Glassa49e27b2015-03-25 12:22:49 -0600113struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev)
114{
Simon Glass49b41832015-03-25 12:22:53 -0600115 struct udevice *dev;
116
117 /* Find the USB controller */
118 for (dev = udev->dev;
119 device_get_uclass_id(dev) != UCLASS_USB;
120 dev = dev->parent)
121 ;
122 return dev_get_priv(dev);
Simon Glassa49e27b2015-03-25 12:22:49 -0600123}
124
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530125/**
126 * Waits for as per specified amount of time
127 * for the "result" to match with "done"
128 *
129 * @param ptr pointer to the register to be read
130 * @param mask mask for the value read
131 * @param done value to be campared with result
132 * @param usec time to wait till
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100133 * Return: 0 if handshake is success else < 0 on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530134 */
developer14bb3502020-09-08 19:00:03 +0200135static int
136handshake(uint32_t volatile *ptr, uint32_t mask, uint32_t done, int usec)
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530137{
138 uint32_t result;
developer14bb3502020-09-08 19:00:03 +0200139 int ret;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530140
developer14bb3502020-09-08 19:00:03 +0200141 ret = readx_poll_sleep_timeout(xhci_readl, ptr, result,
142 (result & mask) == done || result == U32_MAX,
143 1, usec);
144 if (result == U32_MAX) /* card removed */
145 return -ENODEV;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530146
developer14bb3502020-09-08 19:00:03 +0200147 return ret;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530148}
149
150/**
151 * Set the run bit and wait for the host to be running.
152 *
153 * @param hcor pointer to host controller operation registers
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100154 * Return: status of the Handshake
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530155 */
156static int xhci_start(struct xhci_hcor *hcor)
157{
158 u32 temp;
159 int ret;
160
161 puts("Starting the controller\n");
162 temp = xhci_readl(&hcor->or_usbcmd);
163 temp |= (CMD_RUN);
164 xhci_writel(&hcor->or_usbcmd, temp);
165
166 /*
167 * Wait for the HCHalted Status bit to be 0 to indicate the host is
168 * running.
169 */
170 ret = handshake(&hcor->or_usbsts, STS_HALT, 0, XHCI_MAX_HALT_USEC);
171 if (ret)
172 debug("Host took too long to start, "
173 "waited %u microseconds.\n",
174 XHCI_MAX_HALT_USEC);
175 return ret;
176}
177
178/**
179 * Resets the XHCI Controller
180 *
181 * @param hcor pointer to host controller operation registers
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100182 * Return: -EBUSY if XHCI Controller is not halted else status of handshake
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530183 */
Masahiro Yamada6d8e4332017-06-22 16:35:14 +0900184static int xhci_reset(struct xhci_hcor *hcor)
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530185{
186 u32 cmd;
187 u32 state;
188 int ret;
189
190 /* Halting the Host first */
Sergey Temerkhanov65bb4542015-08-17 15:38:07 +0300191 debug("// Halt the HC: %p\n", hcor);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530192 state = xhci_readl(&hcor->or_usbsts) & STS_HALT;
193 if (!state) {
194 cmd = xhci_readl(&hcor->or_usbcmd);
195 cmd &= ~CMD_RUN;
196 xhci_writel(&hcor->or_usbcmd, cmd);
197 }
198
199 ret = handshake(&hcor->or_usbsts,
200 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
201 if (ret) {
202 printf("Host not halted after %u microseconds.\n",
203 XHCI_MAX_HALT_USEC);
204 return -EBUSY;
205 }
206
207 debug("// Reset the HC\n");
208 cmd = xhci_readl(&hcor->or_usbcmd);
209 cmd |= CMD_RESET;
210 xhci_writel(&hcor->or_usbcmd, cmd);
211
212 ret = handshake(&hcor->or_usbcmd, CMD_RESET, 0, XHCI_MAX_RESET_USEC);
213 if (ret)
214 return ret;
215
216 /*
217 * xHCI cannot write to any doorbells or operational registers other
218 * than status until the "Controller Not Ready" flag is cleared.
219 */
220 return handshake(&hcor->or_usbsts, STS_CNR, 0, XHCI_MAX_RESET_USEC);
221}
222
223/**
224 * Used for passing endpoint bitmasks between the core and HCDs.
225 * Find the index for an endpoint given its descriptor.
226 * Use the return value to right shift 1 for the bitmask.
227 *
228 * Index = (epnum * 2) + direction - 1,
229 * where direction = 0 for OUT, 1 for IN.
230 * For control endpoints, the IN index is used (OUT index is unused), so
231 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
232 *
233 * @param desc USB enpdoint Descriptor
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100234 * Return: index of the Endpoint
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530235 */
236static unsigned int xhci_get_ep_index(struct usb_endpoint_descriptor *desc)
237{
238 unsigned int index;
239
240 if (usb_endpoint_xfer_control(desc))
241 index = (unsigned int)(usb_endpoint_num(desc) * 2);
242 else
243 index = (unsigned int)((usb_endpoint_num(desc) * 2) -
244 (usb_endpoint_dir_in(desc) ? 0 : 1));
245
246 return index;
247}
248
Bin Meng87033f02017-09-18 06:40:47 -0700249/*
250 * Convert bInterval expressed in microframes (in 1-255 range) to exponent of
251 * microframes, rounded down to nearest power of 2.
252 */
253static unsigned int xhci_microframes_to_exponent(unsigned int desc_interval,
254 unsigned int min_exponent,
255 unsigned int max_exponent)
256{
257 unsigned int interval;
258
259 interval = fls(desc_interval) - 1;
260 interval = clamp_val(interval, min_exponent, max_exponent);
261 if ((1 << interval) != desc_interval)
262 debug("rounding interval to %d microframes, "\
263 "ep desc says %d microframes\n",
264 1 << interval, desc_interval);
265
266 return interval;
267}
268
269static unsigned int xhci_parse_microframe_interval(struct usb_device *udev,
270 struct usb_endpoint_descriptor *endpt_desc)
271{
272 if (endpt_desc->bInterval == 0)
273 return 0;
274
275 return xhci_microframes_to_exponent(endpt_desc->bInterval, 0, 15);
276}
277
278static unsigned int xhci_parse_frame_interval(struct usb_device *udev,
279 struct usb_endpoint_descriptor *endpt_desc)
280{
281 return xhci_microframes_to_exponent(endpt_desc->bInterval * 8, 3, 10);
282}
283
284/*
285 * Convert interval expressed as 2^(bInterval - 1) == interval into
286 * straight exponent value 2^n == interval.
287 */
288static unsigned int xhci_parse_exponent_interval(struct usb_device *udev,
289 struct usb_endpoint_descriptor *endpt_desc)
290{
291 unsigned int interval;
292
293 interval = clamp_val(endpt_desc->bInterval, 1, 16) - 1;
294 if (interval != endpt_desc->bInterval - 1)
295 debug("ep %#x - rounding interval to %d %sframes\n",
296 endpt_desc->bEndpointAddress, 1 << interval,
297 udev->speed == USB_SPEED_FULL ? "" : "micro");
298
299 if (udev->speed == USB_SPEED_FULL) {
300 /*
301 * Full speed isoc endpoints specify interval in frames,
302 * not microframes. We are using microframes everywhere,
303 * so adjust accordingly.
304 */
305 interval += 3; /* 1 frame = 2^3 uframes */
306 }
307
308 return interval;
309}
310
311/*
312 * Return the polling or NAK interval.
313 *
314 * The polling interval is expressed in "microframes". If xHCI's Interval field
315 * is set to N, it will service the endpoint every 2^(Interval)*125us.
316 *
317 * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval
318 * is set to 0.
319 */
320static unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
321 struct usb_endpoint_descriptor *endpt_desc)
322{
323 unsigned int interval = 0;
324
325 switch (udev->speed) {
326 case USB_SPEED_HIGH:
327 /* Max NAK rate */
328 if (usb_endpoint_xfer_control(endpt_desc) ||
329 usb_endpoint_xfer_bulk(endpt_desc)) {
330 interval = xhci_parse_microframe_interval(udev,
331 endpt_desc);
332 break;
333 }
334 /* Fall through - SS and HS isoc/int have same decoding */
335
336 case USB_SPEED_SUPER:
337 if (usb_endpoint_xfer_int(endpt_desc) ||
338 usb_endpoint_xfer_isoc(endpt_desc)) {
339 interval = xhci_parse_exponent_interval(udev,
340 endpt_desc);
341 }
342 break;
343
344 case USB_SPEED_FULL:
345 if (usb_endpoint_xfer_isoc(endpt_desc)) {
346 interval = xhci_parse_exponent_interval(udev,
347 endpt_desc);
348 break;
349 }
350 /*
351 * Fall through for interrupt endpoint interval decoding
352 * since it uses the same rules as low speed interrupt
353 * endpoints.
354 */
355
356 case USB_SPEED_LOW:
357 if (usb_endpoint_xfer_int(endpt_desc) ||
358 usb_endpoint_xfer_isoc(endpt_desc)) {
359 interval = xhci_parse_frame_interval(udev, endpt_desc);
360 }
361 break;
362
363 default:
364 BUG();
365 }
366
367 return interval;
368}
369
370/*
371 * The "Mult" field in the endpoint context is only set for SuperSpeed isoc eps.
372 * High speed endpoint descriptors can define "the number of additional
373 * transaction opportunities per microframe", but that goes in the Max Burst
374 * endpoint context field.
375 */
376static u32 xhci_get_endpoint_mult(struct usb_device *udev,
377 struct usb_endpoint_descriptor *endpt_desc,
378 struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc)
379{
380 if (udev->speed < USB_SPEED_SUPER ||
381 !usb_endpoint_xfer_isoc(endpt_desc))
382 return 0;
383
384 return ss_ep_comp_desc->bmAttributes;
385}
386
Bin Mengbdedd2a2017-09-18 06:40:48 -0700387static u32 xhci_get_endpoint_max_burst(struct usb_device *udev,
388 struct usb_endpoint_descriptor *endpt_desc,
389 struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc)
390{
391 /* Super speed and Plus have max burst in ep companion desc */
392 if (udev->speed >= USB_SPEED_SUPER)
393 return ss_ep_comp_desc->bMaxBurst;
394
395 if (udev->speed == USB_SPEED_HIGH &&
396 (usb_endpoint_xfer_isoc(endpt_desc) ||
397 usb_endpoint_xfer_int(endpt_desc)))
398 return usb_endpoint_maxp_mult(endpt_desc) - 1;
399
400 return 0;
401}
402
Bin Meng87033f02017-09-18 06:40:47 -0700403/*
404 * Return the maximum endpoint service interval time (ESIT) payload.
405 * Basically, this is the maxpacket size, multiplied by the burst size
406 * and mult size.
407 */
408static u32 xhci_get_max_esit_payload(struct usb_device *udev,
409 struct usb_endpoint_descriptor *endpt_desc,
410 struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc)
411{
412 int max_burst;
413 int max_packet;
414
415 /* Only applies for interrupt or isochronous endpoints */
416 if (usb_endpoint_xfer_control(endpt_desc) ||
417 usb_endpoint_xfer_bulk(endpt_desc))
418 return 0;
419
420 /* SuperSpeed Isoc ep with less than 48k per esit */
421 if (udev->speed >= USB_SPEED_SUPER)
422 return le16_to_cpu(ss_ep_comp_desc->wBytesPerInterval);
423
424 max_packet = usb_endpoint_maxp(endpt_desc);
425 max_burst = usb_endpoint_maxp_mult(endpt_desc);
426
427 /* A 0 in max burst means 1 transfer per ESIT */
428 return max_packet * max_burst;
429}
430
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530431/**
432 * Issue a configure endpoint command or evaluate context command
433 * and wait for it to finish.
434 *
435 * @param udev pointer to the Device Data Structure
436 * @param ctx_change flag to indicate the Context has changed or NOT
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100437 * Return: 0 on success, -1 on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530438 */
439static int xhci_configure_endpoints(struct usb_device *udev, bool ctx_change)
440{
441 struct xhci_container_ctx *in_ctx;
442 struct xhci_virt_device *virt_dev;
Simon Glassa49e27b2015-03-25 12:22:49 -0600443 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530444 union xhci_trb *event;
445
446 virt_dev = ctrl->devs[udev->slot_id];
447 in_ctx = virt_dev->in_ctx;
448
Sergey Temerkhanov38593462015-04-01 17:18:45 +0300449 xhci_flush_cache((uintptr_t)in_ctx->bytes, in_ctx->size);
Mark Kettenisfac410c2023-01-21 20:27:55 +0100450 xhci_queue_command(ctrl, in_ctx->dma, udev->slot_id, 0,
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530451 ctx_change ? TRB_EVAL_CONTEXT : TRB_CONFIG_EP);
452 event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
Hector Martinc5d7dac2023-10-29 15:37:38 +0900453 if (!event)
454 return -ETIMEDOUT;
455
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530456 BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags))
457 != udev->slot_id);
458
459 switch (GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))) {
460 case COMP_SUCCESS:
461 debug("Successful %s command\n",
462 ctx_change ? "Evaluate Context" : "Configure Endpoint");
463 break;
464 default:
465 printf("ERROR: %s command returned completion code %d.\n",
466 ctx_change ? "Evaluate Context" : "Configure Endpoint",
467 GET_COMP_CODE(le32_to_cpu(event->event_cmd.status)));
468 return -EINVAL;
469 }
470
471 xhci_acknowledge_event(ctrl);
472
473 return 0;
474}
475
476/**
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200477 * Fill endpoint contexts for interface descriptor ifdesc.
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530478 *
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200479 * @param udev pointer to the USB device structure
480 * @param ctrl pointer to the xhci pravte device structure
481 * @param virt_dev pointer to the xhci virtual device structure
482 * @param ifdesc pointer to the USB interface config descriptor
483 * Return: returns the status of xhci_init_ep_contexts_if
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530484 */
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200485static int xhci_init_ep_contexts_if(struct usb_device *udev,
486 struct xhci_ctrl *ctrl,
487 struct xhci_virt_device *virt_dev,
488 struct usb_interface *ifdesc
489 )
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530490{
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530491 struct xhci_ep_ctx *ep_ctx[MAX_EP_CTX_NUM];
492 int cur_ep;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530493 int ep_index;
494 unsigned int dir;
495 unsigned int ep_type;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530496 u64 trb_64 = 0;
Bin Meng87033f02017-09-18 06:40:47 -0700497 u32 max_esit_payload;
498 unsigned int interval;
499 unsigned int mult;
Bin Mengbdedd2a2017-09-18 06:40:48 -0700500 unsigned int max_burst;
Bin Meng87033f02017-09-18 06:40:47 -0700501 unsigned int avg_trb_len;
Bin Meng7c3b76d2017-09-18 06:40:49 -0700502 unsigned int err_count = 0;
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200503 int num_of_ep = ifdesc->no_of_ep;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530504
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530505 for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
506 struct usb_endpoint_descriptor *endpt_desc = NULL;
Bin Meng87033f02017-09-18 06:40:47 -0700507 struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc = NULL;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530508
509 endpt_desc = &ifdesc->ep_desc[cur_ep];
Bin Meng87033f02017-09-18 06:40:47 -0700510 ss_ep_comp_desc = &ifdesc->ss_ep_comp_desc[cur_ep];
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530511 trb_64 = 0;
512
Bin Meng87033f02017-09-18 06:40:47 -0700513 /*
514 * Get values to fill the endpoint context, mostly from ep
515 * descriptor. The average TRB buffer lengt for bulk endpoints
516 * is unclear as we have no clue on scatter gather list entry
517 * size. For Isoc and Int, set it to max available.
518 * See xHCI 1.1 spec 4.14.1.1 for details.
519 */
520 max_esit_payload = xhci_get_max_esit_payload(udev, endpt_desc,
521 ss_ep_comp_desc);
522 interval = xhci_get_endpoint_interval(udev, endpt_desc);
523 mult = xhci_get_endpoint_mult(udev, endpt_desc,
524 ss_ep_comp_desc);
Bin Mengbdedd2a2017-09-18 06:40:48 -0700525 max_burst = xhci_get_endpoint_max_burst(udev, endpt_desc,
526 ss_ep_comp_desc);
Bin Meng87033f02017-09-18 06:40:47 -0700527 avg_trb_len = max_esit_payload;
528
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530529 ep_index = xhci_get_ep_index(endpt_desc);
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200530 ep_ctx[ep_index] = xhci_get_ep_ctx(ctrl, virt_dev->in_ctx,
531 ep_index);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530532
533 /* Allocate the ep rings */
Nicolas Saenz Julienne4033aa32021-01-12 13:55:28 +0100534 virt_dev->eps[ep_index].ring = xhci_ring_alloc(ctrl, 1, true);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530535 if (!virt_dev->eps[ep_index].ring)
536 return -ENOMEM;
537
538 /*NOTE: ep_desc[0] actually represents EP1 and so on */
539 dir = (((endpt_desc->bEndpointAddress) & (0x80)) >> 7);
540 ep_type = (((endpt_desc->bmAttributes) & (0x3)) | (dir << 2));
Bin Meng87033f02017-09-18 06:40:47 -0700541
542 ep_ctx[ep_index]->ep_info =
543 cpu_to_le32(EP_MAX_ESIT_PAYLOAD_HI(max_esit_payload) |
544 EP_INTERVAL(interval) | EP_MULT(mult));
545
developer99634222020-09-08 19:00:02 +0200546 ep_ctx[ep_index]->ep_info2 = cpu_to_le32(EP_TYPE(ep_type));
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530547 ep_ctx[ep_index]->ep_info2 |=
548 cpu_to_le32(MAX_PACKET
549 (get_unaligned(&endpt_desc->wMaxPacketSize)));
550
Bin Meng7c3b76d2017-09-18 06:40:49 -0700551 /* Allow 3 retries for everything but isoc, set CErr = 3 */
552 if (!usb_endpoint_xfer_isoc(endpt_desc))
553 err_count = 3;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530554 ep_ctx[ep_index]->ep_info2 |=
Bin Mengbdedd2a2017-09-18 06:40:48 -0700555 cpu_to_le32(MAX_BURST(max_burst) |
Bin Meng7c3b76d2017-09-18 06:40:49 -0700556 ERROR_COUNT(err_count));
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530557
Mark Kettenisfac410c2023-01-21 20:27:55 +0100558 trb_64 = xhci_trb_virt_to_dma(virt_dev->eps[ep_index].ring->enq_seg,
559 virt_dev->eps[ep_index].ring->enqueue);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530560 ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 |
561 virt_dev->eps[ep_index].ring->cycle_state);
Bin Meng87033f02017-09-18 06:40:47 -0700562
Bin Mengc03fb202017-09-18 06:40:50 -0700563 /*
564 * xHCI spec 6.2.3:
565 * 'Average TRB Length' should be 8 for control endpoints.
566 */
567 if (usb_endpoint_xfer_control(endpt_desc))
568 avg_trb_len = 8;
Bin Meng87033f02017-09-18 06:40:47 -0700569 ep_ctx[ep_index]->tx_info =
570 cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) |
571 EP_AVG_TRB_LENGTH(avg_trb_len));
developer507fc9b2020-05-02 11:35:18 +0200572
573 /*
574 * The MediaTek xHCI defines some extra SW parameters which
575 * are put into reserved DWs in Slot and Endpoint Contexts
576 * for synchronous endpoints.
577 */
developer80390532020-09-08 18:59:57 +0200578 if (ctrl->quirks & XHCI_MTK_HOST) {
developer507fc9b2020-05-02 11:35:18 +0200579 ep_ctx[ep_index]->reserved[0] =
580 cpu_to_le32(EP_BPKTS(1) | EP_BBM(1));
581 }
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530582 }
583
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200584 return 0;
585}
586
587/**
588 * Configure the endpoint, programming the device contexts.
589 *
590 * @param udev pointer to the USB device structure
591 * Return: returns the status of the xhci_configure_endpoints
592 */
593static int xhci_set_configuration(struct usb_device *udev)
594{
595 struct xhci_container_ctx *out_ctx;
596 struct xhci_container_ctx *in_ctx;
597 struct xhci_input_control_ctx *ctrl_ctx;
598 struct xhci_slot_ctx *slot_ctx;
599 int err;
600 int cur_ep;
601 int max_ep_flag = 0;
602 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
603 int num_of_ep;
604 int ep_flag = 0;
605 int slot_id = udev->slot_id;
606 struct xhci_virt_device *virt_dev = ctrl->devs[slot_id];
607 struct usb_interface *ifdesc;
Janne Grunauf3993602024-04-04 08:25:50 +0200608 unsigned int ifnum;
609 unsigned int max_ifnum = min((unsigned int)USB_MAX_ACTIVE_INTERFACES,
610 (unsigned int)udev->config.no_of_if);
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200611
612 out_ctx = virt_dev->out_ctx;
613 in_ctx = virt_dev->in_ctx;
614
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200615 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
616 /* Initialize the input context control */
617 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
618 ctrl_ctx->drop_flags = 0;
619
Janne Grunauf3993602024-04-04 08:25:50 +0200620 for (ifnum = 0; ifnum < max_ifnum; ifnum++) {
621 ifdesc = &udev->config.if_desc[ifnum];
622 num_of_ep = ifdesc->no_of_ep;
623 /* EP_FLAG gives values 1 & 4 for EP1OUT and EP2IN */
624 for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
625 ep_flag = xhci_get_ep_index(&ifdesc->ep_desc[cur_ep]);
626 ctrl_ctx->add_flags |= cpu_to_le32(1 << (ep_flag + 1));
627 if (max_ep_flag < ep_flag)
628 max_ep_flag = ep_flag;
629 }
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200630 }
631
632 xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
633
634 /* slot context */
635 xhci_slot_copy(ctrl, in_ctx, out_ctx);
636 slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
637 slot_ctx->dev_info &= ~(cpu_to_le32(LAST_CTX_MASK));
638 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(max_ep_flag + 1) | 0);
639
640 xhci_endpoint_copy(ctrl, in_ctx, out_ctx, 0);
641
642 /* filling up ep contexts */
Janne Grunauf3993602024-04-04 08:25:50 +0200643 for (ifnum = 0; ifnum < max_ifnum; ifnum++) {
644 ifdesc = &udev->config.if_desc[ifnum];
645 err = xhci_init_ep_contexts_if(udev, ctrl, virt_dev, ifdesc);
646 if (err < 0)
647 return err;
648 }
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200649
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530650 return xhci_configure_endpoints(udev, false);
651}
652
653/**
654 * Issue an Address Device command (which will issue a SetAddress request to
655 * the device).
656 *
657 * @param udev pointer to the Device Data Structure
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100658 * Return: 0 if successful else error code on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530659 */
Simon Glass4ec422c2015-03-25 12:22:51 -0600660static int xhci_address_device(struct usb_device *udev, int root_portnr)
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530661{
662 int ret = 0;
Simon Glassa49e27b2015-03-25 12:22:49 -0600663 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530664 struct xhci_slot_ctx *slot_ctx;
665 struct xhci_input_control_ctx *ctrl_ctx;
666 struct xhci_virt_device *virt_dev;
667 int slot_id = udev->slot_id;
668 union xhci_trb *event;
669
670 virt_dev = ctrl->devs[slot_id];
671
672 /*
673 * This is the first Set Address since device plug-in
674 * so setting up the slot context.
675 */
Simon Glass4ec422c2015-03-25 12:22:51 -0600676 debug("Setting up addressable devices %p\n", ctrl->dcbaa);
Bin Meng1459ce62017-07-19 21:51:14 +0800677 xhci_setup_addressable_virt_dev(ctrl, udev, root_portnr);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530678
679 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
680 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
681 ctrl_ctx->drop_flags = 0;
682
Mark Kettenisfac410c2023-01-21 20:27:55 +0100683 xhci_queue_command(ctrl, virt_dev->in_ctx->dma,
684 slot_id, 0, TRB_ADDR_DEV);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530685 event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
Hector Martinc5d7dac2023-10-29 15:37:38 +0900686 if (!event)
687 return -ETIMEDOUT;
688
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530689 BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags)) != slot_id);
690
691 switch (GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))) {
692 case COMP_CTX_STATE:
693 case COMP_EBADSLT:
694 printf("Setup ERROR: address device command for slot %d.\n",
695 slot_id);
696 ret = -EINVAL;
697 break;
698 case COMP_TX_ERR:
699 puts("Device not responding to set address.\n");
700 ret = -EPROTO;
701 break;
702 case COMP_DEV_ERR:
703 puts("ERROR: Incompatible device"
704 "for address device command.\n");
705 ret = -ENODEV;
706 break;
707 case COMP_SUCCESS:
708 debug("Successful Address Device command\n");
709 udev->status = 0;
710 break;
711 default:
712 printf("ERROR: unexpected command completion code 0x%x.\n",
713 GET_COMP_CODE(le32_to_cpu(event->event_cmd.status)));
714 ret = -EINVAL;
715 break;
716 }
717
718 xhci_acknowledge_event(ctrl);
719
720 if (ret < 0)
721 /*
722 * TODO: Unsuccessful Address Device command shall leave the
723 * slot in default state. So, issue Disable Slot command now.
724 */
725 return ret;
726
Sergey Temerkhanov38593462015-04-01 17:18:45 +0300727 xhci_inval_cache((uintptr_t)virt_dev->out_ctx->bytes,
728 virt_dev->out_ctx->size);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530729 slot_ctx = xhci_get_slot_ctx(ctrl, virt_dev->out_ctx);
730
731 debug("xHC internal address is: %d\n",
732 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
733
734 return 0;
735}
736
737/**
738 * Issue Enable slot command to the controller to allocate
739 * device slot and assign the slot id. It fails if the xHC
740 * ran out of device slots, the Enable Slot command timed out,
741 * or allocating memory failed.
742 *
743 * @param udev pointer to the Device Data Structure
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100744 * Return: Returns 0 on succes else return error code on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530745 */
Masahiro Yamada6d8e4332017-06-22 16:35:14 +0900746static int _xhci_alloc_device(struct usb_device *udev)
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530747{
Simon Glassa49e27b2015-03-25 12:22:49 -0600748 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530749 union xhci_trb *event;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530750 int ret;
751
752 /*
753 * Root hub will be first device to be initailized.
754 * If this device is root-hub, don't do any xHC related
755 * stuff.
756 */
757 if (ctrl->rootdev == 0) {
758 udev->speed = USB_SPEED_SUPER;
759 return 0;
760 }
761
Mark Kettenisfac410c2023-01-21 20:27:55 +0100762 xhci_queue_command(ctrl, 0, 0, 0, TRB_ENABLE_SLOT);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530763 event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
Hector Martinc5d7dac2023-10-29 15:37:38 +0900764 if (!event)
765 return -ETIMEDOUT;
766
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530767 BUG_ON(GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))
768 != COMP_SUCCESS);
769
770 udev->slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags));
771
772 xhci_acknowledge_event(ctrl);
773
Simon Glass88a37842015-03-25 12:22:50 -0600774 ret = xhci_alloc_virt_device(ctrl, udev->slot_id);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530775 if (ret < 0) {
776 /*
777 * TODO: Unsuccessful Address Device command shall leave
778 * the slot in default. So, issue Disable Slot command now.
779 */
780 puts("Could not allocate xHCI USB device data structures\n");
781 return ret;
782 }
783
784 return 0;
785}
786
787/*
788 * Full speed devices may have a max packet size greater than 8 bytes, but the
789 * USB core doesn't know that until it reads the first 8 bytes of the
790 * descriptor. If the usb_device's max packet size changes after that point,
791 * we need to issue an evaluate context command and wait on it.
792 *
793 * @param udev pointer to the Device Data Structure
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100794 * Return: returns the status of the xhci_configure_endpoints
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530795 */
796int xhci_check_maxpacket(struct usb_device *udev)
797{
Simon Glassa49e27b2015-03-25 12:22:49 -0600798 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530799 unsigned int slot_id = udev->slot_id;
800 int ep_index = 0; /* control endpoint */
801 struct xhci_container_ctx *in_ctx;
802 struct xhci_container_ctx *out_ctx;
803 struct xhci_input_control_ctx *ctrl_ctx;
804 struct xhci_ep_ctx *ep_ctx;
805 int max_packet_size;
806 int hw_max_packet_size;
807 int ret = 0;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530808
809 out_ctx = ctrl->devs[slot_id]->out_ctx;
Sergey Temerkhanov38593462015-04-01 17:18:45 +0300810 xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530811
812 ep_ctx = xhci_get_ep_ctx(ctrl, out_ctx, ep_index);
813 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
Bin Meng7c92b772017-09-18 06:40:44 -0700814 max_packet_size = udev->epmaxpacketin[0];
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530815 if (hw_max_packet_size != max_packet_size) {
816 debug("Max Packet Size for ep 0 changed.\n");
817 debug("Max packet size in usb_device = %d\n", max_packet_size);
818 debug("Max packet size in xHCI HW = %d\n", hw_max_packet_size);
819 debug("Issuing evaluate context command.\n");
820
821 /* Set up the modified control endpoint 0 */
822 xhci_endpoint_copy(ctrl, ctrl->devs[slot_id]->in_ctx,
823 ctrl->devs[slot_id]->out_ctx, ep_index);
824 in_ctx = ctrl->devs[slot_id]->in_ctx;
825 ep_ctx = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
developer99634222020-09-08 19:00:02 +0200826 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET(MAX_PACKET_MASK));
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530827 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
828
829 /*
830 * Set up the input context flags for the command
831 * FIXME: This won't work if a non-default control endpoint
832 * changes max packet sizes.
833 */
834 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
835 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
836 ctrl_ctx->drop_flags = 0;
837
838 ret = xhci_configure_endpoints(udev, true);
839 }
840 return ret;
841}
842
843/**
844 * Clears the Change bits of the Port Status Register
845 *
846 * @param wValue request value
847 * @param wIndex request index
848 * @param addr address of posrt status register
849 * @param port_status state of port status register
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100850 * Return: none
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530851 */
852static void xhci_clear_port_change_bit(u16 wValue,
853 u16 wIndex, volatile uint32_t *addr, u32 port_status)
854{
855 char *port_change_bit;
856 u32 status;
857
858 switch (wValue) {
859 case USB_PORT_FEAT_C_RESET:
860 status = PORT_RC;
861 port_change_bit = "reset";
862 break;
863 case USB_PORT_FEAT_C_CONNECTION:
864 status = PORT_CSC;
865 port_change_bit = "connect";
866 break;
867 case USB_PORT_FEAT_C_OVER_CURRENT:
868 status = PORT_OCC;
869 port_change_bit = "over-current";
870 break;
871 case USB_PORT_FEAT_C_ENABLE:
872 status = PORT_PEC;
873 port_change_bit = "enable/disable";
874 break;
875 case USB_PORT_FEAT_C_SUSPEND:
876 status = PORT_PLC;
877 port_change_bit = "suspend/resume";
878 break;
879 default:
880 /* Should never happen */
881 return;
882 }
883
884 /* Change bits are all write 1 to clear */
885 xhci_writel(addr, port_status | status);
886
887 port_status = xhci_readl(addr);
888 debug("clear port %s change, actual port %d status = 0x%x\n",
889 port_change_bit, wIndex, port_status);
890}
891
892/**
893 * Save Read Only (RO) bits and save read/write bits where
894 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
895 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
896 *
897 * @param state state of the Port Status and Control Regsiter
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100898 * Return: a value that would result in the port being in the
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530899 * same state, if the value was written to the port
900 * status control register.
901 */
902static u32 xhci_port_state_to_neutral(u32 state)
903{
904 /* Save read-only status and port state */
905 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
906}
907
908/**
909 * Submits the Requests to the XHCI Host Controller
910 *
911 * @param udev pointer to the USB device structure
912 * @param pipe contains the DIR_IN or OUT , devnum
913 * @param buffer buffer to be read/written based on the request
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100914 * Return: returns 0 if successful else -1 on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530915 */
916static int xhci_submit_root(struct usb_device *udev, unsigned long pipe,
917 void *buffer, struct devrequest *req)
918{
919 uint8_t tmpbuf[4];
920 u16 typeReq;
921 void *srcptr = NULL;
922 int len, srclen;
923 uint32_t reg;
924 volatile uint32_t *status_reg;
Simon Glassa49e27b2015-03-25 12:22:49 -0600925 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Bin Meng749de4c2017-07-19 21:50:03 +0800926 struct xhci_hccr *hccr = ctrl->hccr;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530927 struct xhci_hcor *hcor = ctrl->hcor;
Bin Meng749de4c2017-07-19 21:50:03 +0800928 int max_ports = HCS_MAX_PORTS(xhci_readl(&hccr->cr_hcsparams1));
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530929
Jeroen Hofsteeb351e462014-06-12 00:31:27 +0200930 if ((req->requesttype & USB_RT_PORT) &&
Bin Meng749de4c2017-07-19 21:50:03 +0800931 le16_to_cpu(req->index) > max_ports) {
932 printf("The request port(%d) exceeds maximum port number\n",
933 le16_to_cpu(req->index) - 1);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530934 return -EINVAL;
935 }
936
937 status_reg = (volatile uint32_t *)
938 (&hcor->portregs[le16_to_cpu(req->index) - 1].or_portsc);
939 srclen = 0;
940
941 typeReq = req->request | req->requesttype << 8;
942
943 switch (typeReq) {
944 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
945 switch (le16_to_cpu(req->value) >> 8) {
946 case USB_DT_DEVICE:
947 debug("USB_DT_DEVICE request\n");
948 srcptr = &descriptor.device;
949 srclen = 0x12;
950 break;
951 case USB_DT_CONFIG:
952 debug("USB_DT_CONFIG config\n");
953 srcptr = &descriptor.config;
954 srclen = 0x19;
955 break;
956 case USB_DT_STRING:
957 debug("USB_DT_STRING config\n");
958 switch (le16_to_cpu(req->value) & 0xff) {
959 case 0: /* Language */
960 srcptr = "\4\3\11\4";
961 srclen = 4;
962 break;
963 case 1: /* Vendor String */
Simon Glassb113f6e2015-03-25 12:22:54 -0600964 srcptr = "\16\3U\0-\0B\0o\0o\0t\0";
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530965 srclen = 14;
966 break;
967 case 2: /* Product Name */
968 srcptr = "\52\3X\0H\0C\0I\0 "
969 "\0H\0o\0s\0t\0 "
970 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
971 srclen = 42;
972 break;
973 default:
974 printf("unknown value DT_STRING %x\n",
975 le16_to_cpu(req->value));
976 goto unknown;
977 }
978 break;
979 default:
980 printf("unknown value %x\n", le16_to_cpu(req->value));
981 goto unknown;
982 }
983 break;
984 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
985 switch (le16_to_cpu(req->value) >> 8) {
986 case USB_DT_HUB:
Bin Menge8930c42017-07-19 21:49:58 +0800987 case USB_DT_SS_HUB:
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530988 debug("USB_DT_HUB config\n");
Mark Kettenis4eb77d32023-01-21 20:28:00 +0100989 srcptr = &ctrl->hub_desc;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530990 srclen = 0x8;
991 break;
992 default:
993 printf("unknown value %x\n", le16_to_cpu(req->value));
994 goto unknown;
995 }
996 break;
997 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
998 debug("USB_REQ_SET_ADDRESS\n");
999 ctrl->rootdev = le16_to_cpu(req->value);
1000 break;
1001 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
1002 /* Do nothing */
1003 break;
1004 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
1005 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
1006 tmpbuf[1] = 0;
1007 srcptr = tmpbuf;
1008 srclen = 2;
1009 break;
1010 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
1011 memset(tmpbuf, 0, 4);
1012 reg = xhci_readl(status_reg);
1013 if (reg & PORT_CONNECT) {
1014 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
1015 switch (reg & DEV_SPEED_MASK) {
1016 case XDEV_FS:
1017 debug("SPEED = FULLSPEED\n");
1018 break;
1019 case XDEV_LS:
1020 debug("SPEED = LOWSPEED\n");
1021 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
1022 break;
1023 case XDEV_HS:
1024 debug("SPEED = HIGHSPEED\n");
1025 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
1026 break;
1027 case XDEV_SS:
1028 debug("SPEED = SUPERSPEED\n");
1029 tmpbuf[1] |= USB_PORT_STAT_SUPER_SPEED >> 8;
1030 break;
1031 }
1032 }
1033 if (reg & PORT_PE)
1034 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
1035 if ((reg & PORT_PLS_MASK) == XDEV_U3)
1036 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
1037 if (reg & PORT_OC)
1038 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
1039 if (reg & PORT_RESET)
1040 tmpbuf[0] |= USB_PORT_STAT_RESET;
1041 if (reg & PORT_POWER)
1042 /*
1043 * XXX: This Port power bit (for USB 3.0 hub)
1044 * we are faking in USB 2.0 hub port status;
1045 * since there's a change in bit positions in
1046 * two:
1047 * USB 2.0 port status PP is at position[8]
1048 * USB 3.0 port status PP is at position[9]
1049 * So, we are still keeping it at position [8]
1050 */
1051 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
1052 if (reg & PORT_CSC)
1053 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
1054 if (reg & PORT_PEC)
1055 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
1056 if (reg & PORT_OCC)
1057 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
1058 if (reg & PORT_RC)
1059 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
1060
1061 srcptr = tmpbuf;
1062 srclen = 4;
1063 break;
1064 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
1065 reg = xhci_readl(status_reg);
1066 reg = xhci_port_state_to_neutral(reg);
1067 switch (le16_to_cpu(req->value)) {
1068 case USB_PORT_FEAT_ENABLE:
1069 reg |= PORT_PE;
1070 xhci_writel(status_reg, reg);
1071 break;
1072 case USB_PORT_FEAT_POWER:
1073 reg |= PORT_POWER;
1074 xhci_writel(status_reg, reg);
1075 break;
1076 case USB_PORT_FEAT_RESET:
1077 reg |= PORT_RESET;
1078 xhci_writel(status_reg, reg);
1079 break;
1080 default:
1081 printf("unknown feature %x\n", le16_to_cpu(req->value));
1082 goto unknown;
1083 }
1084 break;
1085 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
1086 reg = xhci_readl(status_reg);
1087 reg = xhci_port_state_to_neutral(reg);
1088 switch (le16_to_cpu(req->value)) {
1089 case USB_PORT_FEAT_ENABLE:
1090 reg &= ~PORT_PE;
1091 break;
1092 case USB_PORT_FEAT_POWER:
1093 reg &= ~PORT_POWER;
1094 break;
1095 case USB_PORT_FEAT_C_RESET:
1096 case USB_PORT_FEAT_C_CONNECTION:
1097 case USB_PORT_FEAT_C_OVER_CURRENT:
1098 case USB_PORT_FEAT_C_ENABLE:
1099 xhci_clear_port_change_bit((le16_to_cpu(req->value)),
1100 le16_to_cpu(req->index),
1101 status_reg, reg);
1102 break;
1103 default:
1104 printf("unknown feature %x\n", le16_to_cpu(req->value));
1105 goto unknown;
1106 }
1107 xhci_writel(status_reg, reg);
1108 break;
1109 default:
1110 puts("Unknown request\n");
1111 goto unknown;
1112 }
1113
1114 debug("scrlen = %d\n req->length = %d\n",
1115 srclen, le16_to_cpu(req->length));
1116
Masahiro Yamadadb204642014-11-07 03:03:31 +09001117 len = min(srclen, (int)le16_to_cpu(req->length));
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301118
1119 if (srcptr != NULL && len > 0)
1120 memcpy(buffer, srcptr, len);
1121 else
1122 debug("Len is 0\n");
1123
1124 udev->act_len = len;
1125 udev->status = 0;
1126
1127 return 0;
1128
1129unknown:
1130 udev->act_len = 0;
1131 udev->status = USB_ST_STALLED;
1132
1133 return -ENODEV;
1134}
1135
1136/**
1137 * Submits the INT request to XHCI Host cotroller
1138 *
1139 * @param udev pointer to the USB device
1140 * @param pipe contains the DIR_IN or OUT , devnum
1141 * @param buffer buffer to be read/written based on the request
1142 * @param length length of the buffer
1143 * @param interval interval of the interrupt
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +01001144 * Return: 0
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301145 */
Simon Glass49b41832015-03-25 12:22:53 -06001146static int _xhci_submit_int_msg(struct usb_device *udev, unsigned long pipe,
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001147 void *buffer, int length, int interval,
1148 bool nonblock)
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301149{
Bin Meng2bc748c2017-09-18 06:40:41 -07001150 if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1151 printf("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1152 return -EINVAL;
1153 }
1154
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301155 /*
Bin Meng2bc748c2017-09-18 06:40:41 -07001156 * xHCI uses normal TRBs for both bulk and interrupt. When the
1157 * interrupt endpoint is to be serviced, the xHC will consume
1158 * (at most) one TD. A TD (comprised of sg list entries) can
1159 * take several service intervals to transmit.
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301160 */
Bin Meng2bc748c2017-09-18 06:40:41 -07001161 return xhci_bulk_tx(udev, pipe, length, buffer);
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301162}
1163
1164/**
1165 * submit the BULK type of request to the USB Device
1166 *
1167 * @param udev pointer to the USB device
1168 * @param pipe contains the DIR_IN or OUT , devnum
1169 * @param buffer buffer to be read/written based on the request
1170 * @param length length of the buffer
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +01001171 * Return: returns 0 if successful else -1 on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301172 */
Simon Glass49b41832015-03-25 12:22:53 -06001173static int _xhci_submit_bulk_msg(struct usb_device *udev, unsigned long pipe,
1174 void *buffer, int length)
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301175{
1176 if (usb_pipetype(pipe) != PIPE_BULK) {
1177 printf("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1178 return -EINVAL;
1179 }
1180
1181 return xhci_bulk_tx(udev, pipe, length, buffer);
1182}
1183
1184/**
1185 * submit the control type of request to the Root hub/Device based on the devnum
1186 *
1187 * @param udev pointer to the USB device
1188 * @param pipe contains the DIR_IN or OUT , devnum
1189 * @param buffer buffer to be read/written based on the request
1190 * @param length length of the buffer
1191 * @param setup Request type
Simon Glass4ec422c2015-03-25 12:22:51 -06001192 * @param root_portnr Root port number that this device is on
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +01001193 * Return: returns 0 if successful else -1 on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301194 */
Simon Glass4ec422c2015-03-25 12:22:51 -06001195static int _xhci_submit_control_msg(struct usb_device *udev, unsigned long pipe,
1196 void *buffer, int length,
1197 struct devrequest *setup, int root_portnr)
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301198{
Simon Glassa49e27b2015-03-25 12:22:49 -06001199 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301200 int ret = 0;
1201
1202 if (usb_pipetype(pipe) != PIPE_CONTROL) {
1203 printf("non-control pipe (type=%lu)", usb_pipetype(pipe));
1204 return -EINVAL;
1205 }
1206
1207 if (usb_pipedevice(pipe) == ctrl->rootdev)
1208 return xhci_submit_root(udev, pipe, buffer, setup);
1209
Ted Chena2f4f9a2016-03-18 17:56:52 +10301210 if (setup->request == USB_REQ_SET_ADDRESS &&
1211 (setup->requesttype & USB_TYPE_MASK) == USB_TYPE_STANDARD)
Simon Glass4ec422c2015-03-25 12:22:51 -06001212 return xhci_address_device(udev, root_portnr);
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301213
Ted Chena2f4f9a2016-03-18 17:56:52 +10301214 if (setup->request == USB_REQ_SET_CONFIGURATION &&
1215 (setup->requesttype & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301216 ret = xhci_set_configuration(udev);
1217 if (ret) {
1218 puts("Failed to configure xHCI endpoint\n");
1219 return ret;
1220 }
1221 }
1222
1223 return xhci_ctrl_tx(udev, pipe, setup, length, buffer);
1224}
1225
Simon Glass686a8122015-03-25 12:22:52 -06001226static int xhci_lowlevel_init(struct xhci_ctrl *ctrl)
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301227{
Simon Glass686a8122015-03-25 12:22:52 -06001228 struct xhci_hccr *hccr;
1229 struct xhci_hcor *hcor;
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301230 uint32_t val;
1231 uint32_t val2;
1232 uint32_t reg;
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301233
Simon Glass686a8122015-03-25 12:22:52 -06001234 hccr = ctrl->hccr;
1235 hcor = ctrl->hcor;
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301236 /*
1237 * Program the Number of Device Slots Enabled field in the CONFIG
1238 * register with the max value of slots the HC can handle.
1239 */
1240 val = (xhci_readl(&hccr->cr_hcsparams1) & HCS_SLOTS_MASK);
1241 val2 = xhci_readl(&hcor->or_config);
1242 val |= (val2 & ~HCS_SLOTS_MASK);
1243 xhci_writel(&hcor->or_config, val);
1244
1245 /* initializing xhci data structures */
1246 if (xhci_mem_init(ctrl, hccr, hcor) < 0)
1247 return -ENOMEM;
Mark Kettenis4eb77d32023-01-21 20:28:00 +01001248 ctrl->hub_desc = descriptor.hub;
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301249
1250 reg = xhci_readl(&hccr->cr_hcsparams1);
Mark Kettenis4eb77d32023-01-21 20:28:00 +01001251 ctrl->hub_desc.bNbrPorts = HCS_MAX_PORTS(reg);
1252 printf("Register %x NbrPorts %d\n", reg, ctrl->hub_desc.bNbrPorts);
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301253
1254 /* Port Indicators */
1255 reg = xhci_readl(&hccr->cr_hccparams);
1256 if (HCS_INDICATOR(reg))
Mark Kettenis4eb77d32023-01-21 20:28:00 +01001257 put_unaligned(get_unaligned(&ctrl->hub_desc.wHubCharacteristics)
1258 | 0x80, &ctrl->hub_desc.wHubCharacteristics);
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301259
1260 /* Port Power Control */
1261 if (HCC_PPC(reg))
Mark Kettenis4eb77d32023-01-21 20:28:00 +01001262 put_unaligned(get_unaligned(&ctrl->hub_desc.wHubCharacteristics)
1263 | 0x01, &ctrl->hub_desc.wHubCharacteristics);
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301264
1265 if (xhci_start(hcor)) {
1266 xhci_reset(hcor);
1267 return -ENODEV;
1268 }
1269
1270 /* Zero'ing IRQ control register and IRQ pending register */
1271 xhci_writel(&ctrl->ir_set->irq_control, 0x0);
1272 xhci_writel(&ctrl->ir_set->irq_pending, 0x0);
1273
1274 reg = HC_VERSION(xhci_readl(&hccr->cr_capbase));
1275 printf("USB XHCI %x.%02x\n", reg >> 8, reg & 0xff);
developerd1c2da42020-09-08 18:59:55 +02001276 ctrl->hci_version = reg;
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301277
Simon Glass686a8122015-03-25 12:22:52 -06001278 return 0;
1279}
1280
1281static int xhci_lowlevel_stop(struct xhci_ctrl *ctrl)
1282{
1283 u32 temp;
1284
1285 xhci_reset(ctrl->hcor);
1286
1287 debug("// Disabling event ring interrupts\n");
1288 temp = xhci_readl(&ctrl->hcor->or_usbsts);
1289 xhci_writel(&ctrl->hcor->or_usbsts, temp & ~STS_EINT);
1290 temp = xhci_readl(&ctrl->ir_set->irq_pending);
1291 xhci_writel(&ctrl->ir_set->irq_pending, ER_IRQ_DISABLE(temp));
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301292
1293 return 0;
1294}
1295
Simon Glass49b41832015-03-25 12:22:53 -06001296static int xhci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1297 unsigned long pipe, void *buffer, int length,
1298 struct devrequest *setup)
1299{
1300 struct usb_device *uhop;
1301 struct udevice *hub;
1302 int root_portnr = 0;
1303
1304 debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1305 dev->name, udev, udev->dev->name, udev->portnr);
1306 hub = udev->dev;
1307 if (device_get_uclass_id(hub) == UCLASS_USB_HUB) {
1308 /* Figure out our port number on the root hub */
Bin Meng5ecfd5d2017-07-19 21:51:11 +08001309 if (usb_hub_is_root_hub(hub)) {
Simon Glass49b41832015-03-25 12:22:53 -06001310 root_portnr = udev->portnr;
1311 } else {
Bin Meng5ecfd5d2017-07-19 21:51:11 +08001312 while (!usb_hub_is_root_hub(hub->parent))
Simon Glass49b41832015-03-25 12:22:53 -06001313 hub = hub->parent;
Simon Glassde44acf2015-09-28 23:32:01 -06001314 uhop = dev_get_parent_priv(hub);
Simon Glass49b41832015-03-25 12:22:53 -06001315 root_portnr = uhop->portnr;
1316 }
1317 }
1318/*
1319 struct usb_device *hop = udev;
1320
1321 if (hop->parent)
1322 while (hop->parent->parent)
1323 hop = hop->parent;
1324*/
1325 return _xhci_submit_control_msg(udev, pipe, buffer, length, setup,
1326 root_portnr);
1327}
1328
1329static int xhci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1330 unsigned long pipe, void *buffer, int length)
1331{
1332 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1333 return _xhci_submit_bulk_msg(udev, pipe, buffer, length);
1334}
1335
1336static int xhci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1337 unsigned long pipe, void *buffer, int length,
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001338 int interval, bool nonblock)
Simon Glass49b41832015-03-25 12:22:53 -06001339{
1340 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001341 return _xhci_submit_int_msg(udev, pipe, buffer, length, interval,
1342 nonblock);
Simon Glass49b41832015-03-25 12:22:53 -06001343}
1344
1345static int xhci_alloc_device(struct udevice *dev, struct usb_device *udev)
1346{
1347 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1348 return _xhci_alloc_device(udev);
1349}
1350
Bin Meng2b6f4c52017-07-19 21:51:19 +08001351static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev)
1352{
1353 struct xhci_ctrl *ctrl = dev_get_priv(dev);
1354 struct usb_hub_device *hub = dev_get_uclass_priv(udev->dev);
1355 struct xhci_virt_device *virt_dev;
1356 struct xhci_input_control_ctx *ctrl_ctx;
1357 struct xhci_container_ctx *out_ctx;
1358 struct xhci_container_ctx *in_ctx;
1359 struct xhci_slot_ctx *slot_ctx;
1360 int slot_id = udev->slot_id;
1361 unsigned think_time;
1362
1363 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1364
1365 /* Ignore root hubs */
1366 if (usb_hub_is_root_hub(udev->dev))
1367 return 0;
1368
1369 virt_dev = ctrl->devs[slot_id];
1370 BUG_ON(!virt_dev);
1371
1372 out_ctx = virt_dev->out_ctx;
1373 in_ctx = virt_dev->in_ctx;
1374
1375 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1376 /* Initialize the input context control */
Bin Meng03760fe2018-05-23 23:40:47 -07001377 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
Bin Meng2b6f4c52017-07-19 21:51:19 +08001378 ctrl_ctx->drop_flags = 0;
1379
1380 xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
1381
1382 /* slot context */
1383 xhci_slot_copy(ctrl, in_ctx, out_ctx);
1384 slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
1385
1386 /* Update hub related fields */
1387 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
Bin Meng18f5bcd2018-05-23 23:40:49 -07001388 /*
1389 * refer to section 6.2.2: MTT should be 0 for full speed hub,
1390 * but it may be already set to 1 when setup an xHCI virtual
1391 * device, so clear it anyway.
1392 */
1393 if (hub->tt.multi)
Bin Meng2b6f4c52017-07-19 21:51:19 +08001394 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
Bin Meng18f5bcd2018-05-23 23:40:49 -07001395 else if (udev->speed == USB_SPEED_FULL)
1396 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT);
Bin Meng2b6f4c52017-07-19 21:51:19 +08001397 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(udev->maxchild));
1398 /*
1399 * Set TT think time - convert from ns to FS bit times.
1400 * Note 8 FS bit times == (8 bits / 12000000 bps) ~= 666ns
1401 *
1402 * 0 = 8 FS bit times, 1 = 16 FS bit times,
1403 * 2 = 24 FS bit times, 3 = 32 FS bit times.
1404 *
1405 * This field shall be 0 if the device is not a high-spped hub.
1406 */
1407 think_time = hub->tt.think_time;
1408 if (think_time != 0)
1409 think_time = (think_time / 666) - 1;
1410 if (udev->speed == USB_SPEED_HIGH)
1411 slot_ctx->tt_info |= cpu_to_le32(TT_THINK_TIME(think_time));
Bin Mengd0383982018-05-23 23:40:48 -07001412 slot_ctx->dev_state = 0;
Bin Meng2b6f4c52017-07-19 21:51:19 +08001413
1414 return xhci_configure_endpoints(udev, false);
1415}
1416
Bin Meng1bc4ce92017-09-07 06:13:18 -07001417static int xhci_get_max_xfer_size(struct udevice *dev, size_t *size)
1418{
1419 /*
1420 * xHCD allocates one segment which includes 64 TRBs for each endpoint
1421 * and the last TRB in this segment is configured as a link TRB to form
1422 * a TRB ring. Each TRB can transfer up to 64K bytes, however data
1423 * buffers referenced by transfer TRBs shall not span 64KB boundaries.
1424 * Hence the maximum number of TRBs we can use in one transfer is 62.
1425 */
1426 *size = (TRBS_PER_SEGMENT - 2) * TRB_MAX_BUFF_SIZE;
1427
1428 return 0;
1429}
1430
Simon Glass49b41832015-03-25 12:22:53 -06001431int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,
1432 struct xhci_hcor *hcor)
1433{
1434 struct xhci_ctrl *ctrl = dev_get_priv(dev);
1435 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1436 int ret;
1437
1438 debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p\n", __func__, dev->name,
1439 ctrl, hccr, hcor);
1440
1441 ctrl->dev = dev;
1442
1443 /*
1444 * XHCI needs to issue a Address device command to setup
1445 * proper device context structures, before it can interact
1446 * with the device. So a get_descriptor will fail before any
1447 * of that is done for XHCI unlike EHCI.
1448 */
1449 priv->desc_before_addr = false;
1450
1451 ret = xhci_reset(hcor);
1452 if (ret)
1453 goto err;
1454
1455 ctrl->hccr = hccr;
1456 ctrl->hcor = hcor;
1457 ret = xhci_lowlevel_init(ctrl);
1458 if (ret)
1459 goto err;
1460
1461 return 0;
1462err:
Simon Glass49b41832015-03-25 12:22:53 -06001463 debug("%s: failed, ret=%d\n", __func__, ret);
1464 return ret;
1465}
1466
1467int xhci_deregister(struct udevice *dev)
1468{
1469 struct xhci_ctrl *ctrl = dev_get_priv(dev);
1470
1471 xhci_lowlevel_stop(ctrl);
1472 xhci_cleanup(ctrl);
1473
1474 return 0;
1475}
1476
1477struct dm_usb_ops xhci_usb_ops = {
1478 .control = xhci_submit_control_msg,
1479 .bulk = xhci_submit_bulk_msg,
1480 .interrupt = xhci_submit_int_msg,
1481 .alloc_device = xhci_alloc_device,
Bin Meng2b6f4c52017-07-19 21:51:19 +08001482 .update_hub_device = xhci_update_hub_device,
Bin Meng1bc4ce92017-09-07 06:13:18 -07001483 .get_max_xfer_size = xhci_get_max_xfer_size,
Simon Glass49b41832015-03-25 12:22:53 -06001484};