blob: 534c4b973fb578af062950a28605238686a5cf25 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vivek Gautam4912dcc2013-09-14 14:02:45 +05302/*
3 * USB HOST XHCI Controller stack
4 *
5 * Based on xHCI host controller driver in linux-kernel
6 * by Sarah Sharp.
7 *
8 * Copyright (C) 2008 Intel Corp.
9 * Author: Sarah Sharp
10 *
11 * Copyright (C) 2013 Samsung Electronics Co.Ltd
12 * Authors: Vivek Gautam <gautam.vivek@samsung.com>
13 * Vikas Sajjan <vikas.sajjan@samsung.com>
Vivek Gautam4912dcc2013-09-14 14:02:45 +053014 */
15
16/**
17 * This file gives the xhci stack for usb3.0 looking into
18 * xhci specification Rev1.0 (5/21/10).
19 * The quirk devices support hasn't been given yet.
20 */
21
22#include <common.h>
Simon Glass63334482019-11-14 12:57:39 -070023#include <cpu_func.h>
Simon Glass49b41832015-03-25 12:22:53 -060024#include <dm.h>
Sean Anderson429ce522020-10-04 21:39:53 -040025#include <dm/device_compat.h>
Simon Glass0f2af882020-05-10 11:40:05 -060026#include <log.h>
Vivek Gautam4912dcc2013-09-14 14:02:45 +053027#include <malloc.h>
Sean Anderson429ce522020-10-04 21:39:53 -040028#include <usb.h>
29#include <usb/xhci.h>
Vivek Gautam4912dcc2013-09-14 14:02:45 +053030#include <watchdog.h>
Sean Anderson429ce522020-10-04 21:39:53 -040031#include <asm/byteorder.h>
Vivek Gautam4912dcc2013-09-14 14:02:45 +053032#include <asm/cache.h>
33#include <asm/unaligned.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060034#include <linux/bitops.h>
Simon Glassc06c1be2020-05-10 11:40:08 -060035#include <linux/bug.h>
Simon Glassdbd79542020-05-10 11:40:11 -060036#include <linux/delay.h>
Masahiro Yamada64e4f7f2016-09-21 11:28:57 +090037#include <linux/errno.h>
developer14bb3502020-09-08 19:00:03 +020038#include <linux/iopoll.h>
Vivek Gautam4912dcc2013-09-14 14:02:45 +053039
Vivek Gautam4912dcc2013-09-14 14:02:45 +053040static struct descriptor {
41 struct usb_hub_descriptor hub;
42 struct usb_device_descriptor device;
43 struct usb_config_descriptor config;
44 struct usb_interface_descriptor interface;
45 struct usb_endpoint_descriptor endpoint;
46 struct usb_ss_ep_comp_descriptor ep_companion;
47} __attribute__ ((packed)) descriptor = {
48 {
49 0xc, /* bDescLength */
50 0x2a, /* bDescriptorType: hub descriptor */
51 2, /* bNrPorts -- runtime modified */
52 cpu_to_le16(0x8), /* wHubCharacteristics */
53 10, /* bPwrOn2PwrGood */
54 0, /* bHubCntrCurrent */
Bin Meng0d66b3a2017-07-19 21:50:00 +080055 { /* Device removable */
56 } /* at most 7 ports! XXX */
Vivek Gautam4912dcc2013-09-14 14:02:45 +053057 },
58 {
59 0x12, /* bLength */
60 1, /* bDescriptorType: UDESC_DEVICE */
61 cpu_to_le16(0x0300), /* bcdUSB: v3.0 */
62 9, /* bDeviceClass: UDCLASS_HUB */
63 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
64 3, /* bDeviceProtocol: UDPROTO_SSHUBSTT */
65 9, /* bMaxPacketSize: 512 bytes 2^9 */
66 0x0000, /* idVendor */
67 0x0000, /* idProduct */
68 cpu_to_le16(0x0100), /* bcdDevice */
69 1, /* iManufacturer */
70 2, /* iProduct */
71 0, /* iSerialNumber */
72 1 /* bNumConfigurations: 1 */
73 },
74 {
75 0x9,
76 2, /* bDescriptorType: UDESC_CONFIG */
77 cpu_to_le16(0x1f), /* includes SS endpoint descriptor */
78 1, /* bNumInterface */
79 1, /* bConfigurationValue */
80 0, /* iConfiguration */
81 0x40, /* bmAttributes: UC_SELF_POWER */
82 0 /* bMaxPower */
83 },
84 {
85 0x9, /* bLength */
86 4, /* bDescriptorType: UDESC_INTERFACE */
87 0, /* bInterfaceNumber */
88 0, /* bAlternateSetting */
89 1, /* bNumEndpoints */
90 9, /* bInterfaceClass: UICLASS_HUB */
91 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
92 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
93 0 /* iInterface */
94 },
95 {
96 0x7, /* bLength */
97 5, /* bDescriptorType: UDESC_ENDPOINT */
98 0x81, /* bEndpointAddress: IN endpoint 1 */
99 3, /* bmAttributes: UE_INTERRUPT */
100 8, /* wMaxPacketSize */
101 255 /* bInterval */
102 },
103 {
104 0x06, /* ss_bLength */
105 0x30, /* ss_bDescriptorType: SS EP Companion */
106 0x00, /* ss_bMaxBurst: allows 1 TX between ACKs */
107 /* ss_bmAttributes: 1 packet per service interval */
108 0x00,
109 /* ss_wBytesPerInterval: 15 bits for max 15 ports */
110 cpu_to_le16(0x02),
111 },
112};
113
Simon Glassa49e27b2015-03-25 12:22:49 -0600114struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev)
115{
Simon Glass49b41832015-03-25 12:22:53 -0600116 struct udevice *dev;
117
118 /* Find the USB controller */
119 for (dev = udev->dev;
120 device_get_uclass_id(dev) != UCLASS_USB;
121 dev = dev->parent)
122 ;
123 return dev_get_priv(dev);
Simon Glassa49e27b2015-03-25 12:22:49 -0600124}
125
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530126/**
127 * Waits for as per specified amount of time
128 * for the "result" to match with "done"
129 *
130 * @param ptr pointer to the register to be read
131 * @param mask mask for the value read
132 * @param done value to be campared with result
133 * @param usec time to wait till
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100134 * Return: 0 if handshake is success else < 0 on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530135 */
developer14bb3502020-09-08 19:00:03 +0200136static int
137handshake(uint32_t volatile *ptr, uint32_t mask, uint32_t done, int usec)
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530138{
139 uint32_t result;
developer14bb3502020-09-08 19:00:03 +0200140 int ret;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530141
developer14bb3502020-09-08 19:00:03 +0200142 ret = readx_poll_sleep_timeout(xhci_readl, ptr, result,
143 (result & mask) == done || result == U32_MAX,
144 1, usec);
145 if (result == U32_MAX) /* card removed */
146 return -ENODEV;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530147
developer14bb3502020-09-08 19:00:03 +0200148 return ret;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530149}
150
151/**
152 * Set the run bit and wait for the host to be running.
153 *
154 * @param hcor pointer to host controller operation registers
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100155 * Return: status of the Handshake
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530156 */
157static int xhci_start(struct xhci_hcor *hcor)
158{
159 u32 temp;
160 int ret;
161
162 puts("Starting the controller\n");
163 temp = xhci_readl(&hcor->or_usbcmd);
164 temp |= (CMD_RUN);
165 xhci_writel(&hcor->or_usbcmd, temp);
166
167 /*
168 * Wait for the HCHalted Status bit to be 0 to indicate the host is
169 * running.
170 */
171 ret = handshake(&hcor->or_usbsts, STS_HALT, 0, XHCI_MAX_HALT_USEC);
172 if (ret)
173 debug("Host took too long to start, "
174 "waited %u microseconds.\n",
175 XHCI_MAX_HALT_USEC);
176 return ret;
177}
178
179/**
180 * Resets the XHCI Controller
181 *
182 * @param hcor pointer to host controller operation registers
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100183 * Return: -EBUSY if XHCI Controller is not halted else status of handshake
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530184 */
Masahiro Yamada6d8e4332017-06-22 16:35:14 +0900185static int xhci_reset(struct xhci_hcor *hcor)
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530186{
187 u32 cmd;
188 u32 state;
189 int ret;
190
191 /* Halting the Host first */
Sergey Temerkhanov65bb4542015-08-17 15:38:07 +0300192 debug("// Halt the HC: %p\n", hcor);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530193 state = xhci_readl(&hcor->or_usbsts) & STS_HALT;
194 if (!state) {
195 cmd = xhci_readl(&hcor->or_usbcmd);
196 cmd &= ~CMD_RUN;
197 xhci_writel(&hcor->or_usbcmd, cmd);
198 }
199
200 ret = handshake(&hcor->or_usbsts,
201 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
202 if (ret) {
203 printf("Host not halted after %u microseconds.\n",
204 XHCI_MAX_HALT_USEC);
205 return -EBUSY;
206 }
207
208 debug("// Reset the HC\n");
209 cmd = xhci_readl(&hcor->or_usbcmd);
210 cmd |= CMD_RESET;
211 xhci_writel(&hcor->or_usbcmd, cmd);
212
213 ret = handshake(&hcor->or_usbcmd, CMD_RESET, 0, XHCI_MAX_RESET_USEC);
214 if (ret)
215 return ret;
216
217 /*
218 * xHCI cannot write to any doorbells or operational registers other
219 * than status until the "Controller Not Ready" flag is cleared.
220 */
221 return handshake(&hcor->or_usbsts, STS_CNR, 0, XHCI_MAX_RESET_USEC);
222}
223
224/**
225 * Used for passing endpoint bitmasks between the core and HCDs.
226 * Find the index for an endpoint given its descriptor.
227 * Use the return value to right shift 1 for the bitmask.
228 *
229 * Index = (epnum * 2) + direction - 1,
230 * where direction = 0 for OUT, 1 for IN.
231 * For control endpoints, the IN index is used (OUT index is unused), so
232 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
233 *
234 * @param desc USB enpdoint Descriptor
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100235 * Return: index of the Endpoint
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530236 */
237static unsigned int xhci_get_ep_index(struct usb_endpoint_descriptor *desc)
238{
239 unsigned int index;
240
241 if (usb_endpoint_xfer_control(desc))
242 index = (unsigned int)(usb_endpoint_num(desc) * 2);
243 else
244 index = (unsigned int)((usb_endpoint_num(desc) * 2) -
245 (usb_endpoint_dir_in(desc) ? 0 : 1));
246
247 return index;
248}
249
Bin Meng87033f02017-09-18 06:40:47 -0700250/*
251 * Convert bInterval expressed in microframes (in 1-255 range) to exponent of
252 * microframes, rounded down to nearest power of 2.
253 */
254static unsigned int xhci_microframes_to_exponent(unsigned int desc_interval,
255 unsigned int min_exponent,
256 unsigned int max_exponent)
257{
258 unsigned int interval;
259
260 interval = fls(desc_interval) - 1;
261 interval = clamp_val(interval, min_exponent, max_exponent);
262 if ((1 << interval) != desc_interval)
263 debug("rounding interval to %d microframes, "\
264 "ep desc says %d microframes\n",
265 1 << interval, desc_interval);
266
267 return interval;
268}
269
270static unsigned int xhci_parse_microframe_interval(struct usb_device *udev,
271 struct usb_endpoint_descriptor *endpt_desc)
272{
273 if (endpt_desc->bInterval == 0)
274 return 0;
275
276 return xhci_microframes_to_exponent(endpt_desc->bInterval, 0, 15);
277}
278
279static unsigned int xhci_parse_frame_interval(struct usb_device *udev,
280 struct usb_endpoint_descriptor *endpt_desc)
281{
282 return xhci_microframes_to_exponent(endpt_desc->bInterval * 8, 3, 10);
283}
284
285/*
286 * Convert interval expressed as 2^(bInterval - 1) == interval into
287 * straight exponent value 2^n == interval.
288 */
289static unsigned int xhci_parse_exponent_interval(struct usb_device *udev,
290 struct usb_endpoint_descriptor *endpt_desc)
291{
292 unsigned int interval;
293
294 interval = clamp_val(endpt_desc->bInterval, 1, 16) - 1;
295 if (interval != endpt_desc->bInterval - 1)
296 debug("ep %#x - rounding interval to %d %sframes\n",
297 endpt_desc->bEndpointAddress, 1 << interval,
298 udev->speed == USB_SPEED_FULL ? "" : "micro");
299
300 if (udev->speed == USB_SPEED_FULL) {
301 /*
302 * Full speed isoc endpoints specify interval in frames,
303 * not microframes. We are using microframes everywhere,
304 * so adjust accordingly.
305 */
306 interval += 3; /* 1 frame = 2^3 uframes */
307 }
308
309 return interval;
310}
311
312/*
313 * Return the polling or NAK interval.
314 *
315 * The polling interval is expressed in "microframes". If xHCI's Interval field
316 * is set to N, it will service the endpoint every 2^(Interval)*125us.
317 *
318 * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval
319 * is set to 0.
320 */
321static unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
322 struct usb_endpoint_descriptor *endpt_desc)
323{
324 unsigned int interval = 0;
325
326 switch (udev->speed) {
327 case USB_SPEED_HIGH:
328 /* Max NAK rate */
329 if (usb_endpoint_xfer_control(endpt_desc) ||
330 usb_endpoint_xfer_bulk(endpt_desc)) {
331 interval = xhci_parse_microframe_interval(udev,
332 endpt_desc);
333 break;
334 }
335 /* Fall through - SS and HS isoc/int have same decoding */
336
337 case USB_SPEED_SUPER:
338 if (usb_endpoint_xfer_int(endpt_desc) ||
339 usb_endpoint_xfer_isoc(endpt_desc)) {
340 interval = xhci_parse_exponent_interval(udev,
341 endpt_desc);
342 }
343 break;
344
345 case USB_SPEED_FULL:
346 if (usb_endpoint_xfer_isoc(endpt_desc)) {
347 interval = xhci_parse_exponent_interval(udev,
348 endpt_desc);
349 break;
350 }
351 /*
352 * Fall through for interrupt endpoint interval decoding
353 * since it uses the same rules as low speed interrupt
354 * endpoints.
355 */
356
357 case USB_SPEED_LOW:
358 if (usb_endpoint_xfer_int(endpt_desc) ||
359 usb_endpoint_xfer_isoc(endpt_desc)) {
360 interval = xhci_parse_frame_interval(udev, endpt_desc);
361 }
362 break;
363
364 default:
365 BUG();
366 }
367
368 return interval;
369}
370
371/*
372 * The "Mult" field in the endpoint context is only set for SuperSpeed isoc eps.
373 * High speed endpoint descriptors can define "the number of additional
374 * transaction opportunities per microframe", but that goes in the Max Burst
375 * endpoint context field.
376 */
377static u32 xhci_get_endpoint_mult(struct usb_device *udev,
378 struct usb_endpoint_descriptor *endpt_desc,
379 struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc)
380{
381 if (udev->speed < USB_SPEED_SUPER ||
382 !usb_endpoint_xfer_isoc(endpt_desc))
383 return 0;
384
385 return ss_ep_comp_desc->bmAttributes;
386}
387
Bin Mengbdedd2a2017-09-18 06:40:48 -0700388static u32 xhci_get_endpoint_max_burst(struct usb_device *udev,
389 struct usb_endpoint_descriptor *endpt_desc,
390 struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc)
391{
392 /* Super speed and Plus have max burst in ep companion desc */
393 if (udev->speed >= USB_SPEED_SUPER)
394 return ss_ep_comp_desc->bMaxBurst;
395
396 if (udev->speed == USB_SPEED_HIGH &&
397 (usb_endpoint_xfer_isoc(endpt_desc) ||
398 usb_endpoint_xfer_int(endpt_desc)))
399 return usb_endpoint_maxp_mult(endpt_desc) - 1;
400
401 return 0;
402}
403
Bin Meng87033f02017-09-18 06:40:47 -0700404/*
405 * Return the maximum endpoint service interval time (ESIT) payload.
406 * Basically, this is the maxpacket size, multiplied by the burst size
407 * and mult size.
408 */
409static u32 xhci_get_max_esit_payload(struct usb_device *udev,
410 struct usb_endpoint_descriptor *endpt_desc,
411 struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc)
412{
413 int max_burst;
414 int max_packet;
415
416 /* Only applies for interrupt or isochronous endpoints */
417 if (usb_endpoint_xfer_control(endpt_desc) ||
418 usb_endpoint_xfer_bulk(endpt_desc))
419 return 0;
420
421 /* SuperSpeed Isoc ep with less than 48k per esit */
422 if (udev->speed >= USB_SPEED_SUPER)
423 return le16_to_cpu(ss_ep_comp_desc->wBytesPerInterval);
424
425 max_packet = usb_endpoint_maxp(endpt_desc);
426 max_burst = usb_endpoint_maxp_mult(endpt_desc);
427
428 /* A 0 in max burst means 1 transfer per ESIT */
429 return max_packet * max_burst;
430}
431
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530432/**
433 * Issue a configure endpoint command or evaluate context command
434 * and wait for it to finish.
435 *
436 * @param udev pointer to the Device Data Structure
437 * @param ctx_change flag to indicate the Context has changed or NOT
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100438 * Return: 0 on success, -1 on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530439 */
440static int xhci_configure_endpoints(struct usb_device *udev, bool ctx_change)
441{
442 struct xhci_container_ctx *in_ctx;
443 struct xhci_virt_device *virt_dev;
Simon Glassa49e27b2015-03-25 12:22:49 -0600444 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530445 union xhci_trb *event;
446
447 virt_dev = ctrl->devs[udev->slot_id];
448 in_ctx = virt_dev->in_ctx;
449
Sergey Temerkhanov38593462015-04-01 17:18:45 +0300450 xhci_flush_cache((uintptr_t)in_ctx->bytes, in_ctx->size);
Mark Kettenisfac410c2023-01-21 20:27:55 +0100451 xhci_queue_command(ctrl, in_ctx->dma, udev->slot_id, 0,
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530452 ctx_change ? TRB_EVAL_CONTEXT : TRB_CONFIG_EP);
453 event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
Hector Martinc5d7dac2023-10-29 15:37:38 +0900454 if (!event)
455 return -ETIMEDOUT;
456
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530457 BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags))
458 != udev->slot_id);
459
460 switch (GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))) {
461 case COMP_SUCCESS:
462 debug("Successful %s command\n",
463 ctx_change ? "Evaluate Context" : "Configure Endpoint");
464 break;
465 default:
466 printf("ERROR: %s command returned completion code %d.\n",
467 ctx_change ? "Evaluate Context" : "Configure Endpoint",
468 GET_COMP_CODE(le32_to_cpu(event->event_cmd.status)));
469 return -EINVAL;
470 }
471
472 xhci_acknowledge_event(ctrl);
473
474 return 0;
475}
476
477/**
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200478 * Fill endpoint contexts for interface descriptor ifdesc.
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530479 *
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200480 * @param udev pointer to the USB device structure
481 * @param ctrl pointer to the xhci pravte device structure
482 * @param virt_dev pointer to the xhci virtual device structure
483 * @param ifdesc pointer to the USB interface config descriptor
484 * Return: returns the status of xhci_init_ep_contexts_if
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530485 */
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200486static int xhci_init_ep_contexts_if(struct usb_device *udev,
487 struct xhci_ctrl *ctrl,
488 struct xhci_virt_device *virt_dev,
489 struct usb_interface *ifdesc
490 )
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530491{
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530492 struct xhci_ep_ctx *ep_ctx[MAX_EP_CTX_NUM];
493 int cur_ep;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530494 int ep_index;
495 unsigned int dir;
496 unsigned int ep_type;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530497 u64 trb_64 = 0;
Bin Meng87033f02017-09-18 06:40:47 -0700498 u32 max_esit_payload;
499 unsigned int interval;
500 unsigned int mult;
Bin Mengbdedd2a2017-09-18 06:40:48 -0700501 unsigned int max_burst;
Bin Meng87033f02017-09-18 06:40:47 -0700502 unsigned int avg_trb_len;
Bin Meng7c3b76d2017-09-18 06:40:49 -0700503 unsigned int err_count = 0;
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200504 int num_of_ep = ifdesc->no_of_ep;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530505
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530506 for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
507 struct usb_endpoint_descriptor *endpt_desc = NULL;
Bin Meng87033f02017-09-18 06:40:47 -0700508 struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc = NULL;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530509
510 endpt_desc = &ifdesc->ep_desc[cur_ep];
Bin Meng87033f02017-09-18 06:40:47 -0700511 ss_ep_comp_desc = &ifdesc->ss_ep_comp_desc[cur_ep];
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530512 trb_64 = 0;
513
Bin Meng87033f02017-09-18 06:40:47 -0700514 /*
515 * Get values to fill the endpoint context, mostly from ep
516 * descriptor. The average TRB buffer lengt for bulk endpoints
517 * is unclear as we have no clue on scatter gather list entry
518 * size. For Isoc and Int, set it to max available.
519 * See xHCI 1.1 spec 4.14.1.1 for details.
520 */
521 max_esit_payload = xhci_get_max_esit_payload(udev, endpt_desc,
522 ss_ep_comp_desc);
523 interval = xhci_get_endpoint_interval(udev, endpt_desc);
524 mult = xhci_get_endpoint_mult(udev, endpt_desc,
525 ss_ep_comp_desc);
Bin Mengbdedd2a2017-09-18 06:40:48 -0700526 max_burst = xhci_get_endpoint_max_burst(udev, endpt_desc,
527 ss_ep_comp_desc);
Bin Meng87033f02017-09-18 06:40:47 -0700528 avg_trb_len = max_esit_payload;
529
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530530 ep_index = xhci_get_ep_index(endpt_desc);
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200531 ep_ctx[ep_index] = xhci_get_ep_ctx(ctrl, virt_dev->in_ctx,
532 ep_index);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530533
534 /* Allocate the ep rings */
Nicolas Saenz Julienne4033aa32021-01-12 13:55:28 +0100535 virt_dev->eps[ep_index].ring = xhci_ring_alloc(ctrl, 1, true);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530536 if (!virt_dev->eps[ep_index].ring)
537 return -ENOMEM;
538
539 /*NOTE: ep_desc[0] actually represents EP1 and so on */
540 dir = (((endpt_desc->bEndpointAddress) & (0x80)) >> 7);
541 ep_type = (((endpt_desc->bmAttributes) & (0x3)) | (dir << 2));
Bin Meng87033f02017-09-18 06:40:47 -0700542
543 ep_ctx[ep_index]->ep_info =
544 cpu_to_le32(EP_MAX_ESIT_PAYLOAD_HI(max_esit_payload) |
545 EP_INTERVAL(interval) | EP_MULT(mult));
546
developer99634222020-09-08 19:00:02 +0200547 ep_ctx[ep_index]->ep_info2 = cpu_to_le32(EP_TYPE(ep_type));
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530548 ep_ctx[ep_index]->ep_info2 |=
549 cpu_to_le32(MAX_PACKET
550 (get_unaligned(&endpt_desc->wMaxPacketSize)));
551
Bin Meng7c3b76d2017-09-18 06:40:49 -0700552 /* Allow 3 retries for everything but isoc, set CErr = 3 */
553 if (!usb_endpoint_xfer_isoc(endpt_desc))
554 err_count = 3;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530555 ep_ctx[ep_index]->ep_info2 |=
Bin Mengbdedd2a2017-09-18 06:40:48 -0700556 cpu_to_le32(MAX_BURST(max_burst) |
Bin Meng7c3b76d2017-09-18 06:40:49 -0700557 ERROR_COUNT(err_count));
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530558
Mark Kettenisfac410c2023-01-21 20:27:55 +0100559 trb_64 = xhci_trb_virt_to_dma(virt_dev->eps[ep_index].ring->enq_seg,
560 virt_dev->eps[ep_index].ring->enqueue);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530561 ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 |
562 virt_dev->eps[ep_index].ring->cycle_state);
Bin Meng87033f02017-09-18 06:40:47 -0700563
Bin Mengc03fb202017-09-18 06:40:50 -0700564 /*
565 * xHCI spec 6.2.3:
566 * 'Average TRB Length' should be 8 for control endpoints.
567 */
568 if (usb_endpoint_xfer_control(endpt_desc))
569 avg_trb_len = 8;
Bin Meng87033f02017-09-18 06:40:47 -0700570 ep_ctx[ep_index]->tx_info =
571 cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) |
572 EP_AVG_TRB_LENGTH(avg_trb_len));
developer507fc9b2020-05-02 11:35:18 +0200573
574 /*
575 * The MediaTek xHCI defines some extra SW parameters which
576 * are put into reserved DWs in Slot and Endpoint Contexts
577 * for synchronous endpoints.
578 */
developer80390532020-09-08 18:59:57 +0200579 if (ctrl->quirks & XHCI_MTK_HOST) {
developer507fc9b2020-05-02 11:35:18 +0200580 ep_ctx[ep_index]->reserved[0] =
581 cpu_to_le32(EP_BPKTS(1) | EP_BBM(1));
582 }
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530583 }
584
Janne Grunau57c2a5f2024-04-04 08:25:49 +0200585 return 0;
586}
587
588/**
589 * Configure the endpoint, programming the device contexts.
590 *
591 * @param udev pointer to the USB device structure
592 * Return: returns the status of the xhci_configure_endpoints
593 */
594static int xhci_set_configuration(struct usb_device *udev)
595{
596 struct xhci_container_ctx *out_ctx;
597 struct xhci_container_ctx *in_ctx;
598 struct xhci_input_control_ctx *ctrl_ctx;
599 struct xhci_slot_ctx *slot_ctx;
600 int err;
601 int cur_ep;
602 int max_ep_flag = 0;
603 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
604 int num_of_ep;
605 int ep_flag = 0;
606 int slot_id = udev->slot_id;
607 struct xhci_virt_device *virt_dev = ctrl->devs[slot_id];
608 struct usb_interface *ifdesc;
609
610 out_ctx = virt_dev->out_ctx;
611 in_ctx = virt_dev->in_ctx;
612
613 num_of_ep = udev->config.if_desc[0].no_of_ep;
614 ifdesc = &udev->config.if_desc[0];
615
616 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
617 /* Initialize the input context control */
618 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
619 ctrl_ctx->drop_flags = 0;
620
621 /* EP_FLAG gives values 1 & 4 for EP1OUT and EP2IN */
622 for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
623 ep_flag = xhci_get_ep_index(&ifdesc->ep_desc[cur_ep]);
624 ctrl_ctx->add_flags |= cpu_to_le32(1 << (ep_flag + 1));
625 if (max_ep_flag < ep_flag)
626 max_ep_flag = ep_flag;
627 }
628
629 xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
630
631 /* slot context */
632 xhci_slot_copy(ctrl, in_ctx, out_ctx);
633 slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
634 slot_ctx->dev_info &= ~(cpu_to_le32(LAST_CTX_MASK));
635 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(max_ep_flag + 1) | 0);
636
637 xhci_endpoint_copy(ctrl, in_ctx, out_ctx, 0);
638
639 /* filling up ep contexts */
640 err = xhci_init_ep_contexts_if(udev, ctrl, virt_dev, ifdesc);
641 if (err < 0)
642 return err;
643
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530644 return xhci_configure_endpoints(udev, false);
645}
646
647/**
648 * Issue an Address Device command (which will issue a SetAddress request to
649 * the device).
650 *
651 * @param udev pointer to the Device Data Structure
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100652 * Return: 0 if successful else error code on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530653 */
Simon Glass4ec422c2015-03-25 12:22:51 -0600654static int xhci_address_device(struct usb_device *udev, int root_portnr)
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530655{
656 int ret = 0;
Simon Glassa49e27b2015-03-25 12:22:49 -0600657 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530658 struct xhci_slot_ctx *slot_ctx;
659 struct xhci_input_control_ctx *ctrl_ctx;
660 struct xhci_virt_device *virt_dev;
661 int slot_id = udev->slot_id;
662 union xhci_trb *event;
663
664 virt_dev = ctrl->devs[slot_id];
665
666 /*
667 * This is the first Set Address since device plug-in
668 * so setting up the slot context.
669 */
Simon Glass4ec422c2015-03-25 12:22:51 -0600670 debug("Setting up addressable devices %p\n", ctrl->dcbaa);
Bin Meng1459ce62017-07-19 21:51:14 +0800671 xhci_setup_addressable_virt_dev(ctrl, udev, root_portnr);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530672
673 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
674 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
675 ctrl_ctx->drop_flags = 0;
676
Mark Kettenisfac410c2023-01-21 20:27:55 +0100677 xhci_queue_command(ctrl, virt_dev->in_ctx->dma,
678 slot_id, 0, TRB_ADDR_DEV);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530679 event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
Hector Martinc5d7dac2023-10-29 15:37:38 +0900680 if (!event)
681 return -ETIMEDOUT;
682
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530683 BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags)) != slot_id);
684
685 switch (GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))) {
686 case COMP_CTX_STATE:
687 case COMP_EBADSLT:
688 printf("Setup ERROR: address device command for slot %d.\n",
689 slot_id);
690 ret = -EINVAL;
691 break;
692 case COMP_TX_ERR:
693 puts("Device not responding to set address.\n");
694 ret = -EPROTO;
695 break;
696 case COMP_DEV_ERR:
697 puts("ERROR: Incompatible device"
698 "for address device command.\n");
699 ret = -ENODEV;
700 break;
701 case COMP_SUCCESS:
702 debug("Successful Address Device command\n");
703 udev->status = 0;
704 break;
705 default:
706 printf("ERROR: unexpected command completion code 0x%x.\n",
707 GET_COMP_CODE(le32_to_cpu(event->event_cmd.status)));
708 ret = -EINVAL;
709 break;
710 }
711
712 xhci_acknowledge_event(ctrl);
713
714 if (ret < 0)
715 /*
716 * TODO: Unsuccessful Address Device command shall leave the
717 * slot in default state. So, issue Disable Slot command now.
718 */
719 return ret;
720
Sergey Temerkhanov38593462015-04-01 17:18:45 +0300721 xhci_inval_cache((uintptr_t)virt_dev->out_ctx->bytes,
722 virt_dev->out_ctx->size);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530723 slot_ctx = xhci_get_slot_ctx(ctrl, virt_dev->out_ctx);
724
725 debug("xHC internal address is: %d\n",
726 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
727
728 return 0;
729}
730
731/**
732 * Issue Enable slot command to the controller to allocate
733 * device slot and assign the slot id. It fails if the xHC
734 * ran out of device slots, the Enable Slot command timed out,
735 * or allocating memory failed.
736 *
737 * @param udev pointer to the Device Data Structure
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100738 * Return: Returns 0 on succes else return error code on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530739 */
Masahiro Yamada6d8e4332017-06-22 16:35:14 +0900740static int _xhci_alloc_device(struct usb_device *udev)
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530741{
Simon Glassa49e27b2015-03-25 12:22:49 -0600742 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530743 union xhci_trb *event;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530744 int ret;
745
746 /*
747 * Root hub will be first device to be initailized.
748 * If this device is root-hub, don't do any xHC related
749 * stuff.
750 */
751 if (ctrl->rootdev == 0) {
752 udev->speed = USB_SPEED_SUPER;
753 return 0;
754 }
755
Mark Kettenisfac410c2023-01-21 20:27:55 +0100756 xhci_queue_command(ctrl, 0, 0, 0, TRB_ENABLE_SLOT);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530757 event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
Hector Martinc5d7dac2023-10-29 15:37:38 +0900758 if (!event)
759 return -ETIMEDOUT;
760
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530761 BUG_ON(GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))
762 != COMP_SUCCESS);
763
764 udev->slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags));
765
766 xhci_acknowledge_event(ctrl);
767
Simon Glass88a37842015-03-25 12:22:50 -0600768 ret = xhci_alloc_virt_device(ctrl, udev->slot_id);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530769 if (ret < 0) {
770 /*
771 * TODO: Unsuccessful Address Device command shall leave
772 * the slot in default. So, issue Disable Slot command now.
773 */
774 puts("Could not allocate xHCI USB device data structures\n");
775 return ret;
776 }
777
778 return 0;
779}
780
781/*
782 * Full speed devices may have a max packet size greater than 8 bytes, but the
783 * USB core doesn't know that until it reads the first 8 bytes of the
784 * descriptor. If the usb_device's max packet size changes after that point,
785 * we need to issue an evaluate context command and wait on it.
786 *
787 * @param udev pointer to the Device Data Structure
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100788 * Return: returns the status of the xhci_configure_endpoints
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530789 */
790int xhci_check_maxpacket(struct usb_device *udev)
791{
Simon Glassa49e27b2015-03-25 12:22:49 -0600792 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530793 unsigned int slot_id = udev->slot_id;
794 int ep_index = 0; /* control endpoint */
795 struct xhci_container_ctx *in_ctx;
796 struct xhci_container_ctx *out_ctx;
797 struct xhci_input_control_ctx *ctrl_ctx;
798 struct xhci_ep_ctx *ep_ctx;
799 int max_packet_size;
800 int hw_max_packet_size;
801 int ret = 0;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530802
803 out_ctx = ctrl->devs[slot_id]->out_ctx;
Sergey Temerkhanov38593462015-04-01 17:18:45 +0300804 xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530805
806 ep_ctx = xhci_get_ep_ctx(ctrl, out_ctx, ep_index);
807 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
Bin Meng7c92b772017-09-18 06:40:44 -0700808 max_packet_size = udev->epmaxpacketin[0];
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530809 if (hw_max_packet_size != max_packet_size) {
810 debug("Max Packet Size for ep 0 changed.\n");
811 debug("Max packet size in usb_device = %d\n", max_packet_size);
812 debug("Max packet size in xHCI HW = %d\n", hw_max_packet_size);
813 debug("Issuing evaluate context command.\n");
814
815 /* Set up the modified control endpoint 0 */
816 xhci_endpoint_copy(ctrl, ctrl->devs[slot_id]->in_ctx,
817 ctrl->devs[slot_id]->out_ctx, ep_index);
818 in_ctx = ctrl->devs[slot_id]->in_ctx;
819 ep_ctx = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
developer99634222020-09-08 19:00:02 +0200820 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET(MAX_PACKET_MASK));
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530821 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
822
823 /*
824 * Set up the input context flags for the command
825 * FIXME: This won't work if a non-default control endpoint
826 * changes max packet sizes.
827 */
828 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
829 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
830 ctrl_ctx->drop_flags = 0;
831
832 ret = xhci_configure_endpoints(udev, true);
833 }
834 return ret;
835}
836
837/**
838 * Clears the Change bits of the Port Status Register
839 *
840 * @param wValue request value
841 * @param wIndex request index
842 * @param addr address of posrt status register
843 * @param port_status state of port status register
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100844 * Return: none
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530845 */
846static void xhci_clear_port_change_bit(u16 wValue,
847 u16 wIndex, volatile uint32_t *addr, u32 port_status)
848{
849 char *port_change_bit;
850 u32 status;
851
852 switch (wValue) {
853 case USB_PORT_FEAT_C_RESET:
854 status = PORT_RC;
855 port_change_bit = "reset";
856 break;
857 case USB_PORT_FEAT_C_CONNECTION:
858 status = PORT_CSC;
859 port_change_bit = "connect";
860 break;
861 case USB_PORT_FEAT_C_OVER_CURRENT:
862 status = PORT_OCC;
863 port_change_bit = "over-current";
864 break;
865 case USB_PORT_FEAT_C_ENABLE:
866 status = PORT_PEC;
867 port_change_bit = "enable/disable";
868 break;
869 case USB_PORT_FEAT_C_SUSPEND:
870 status = PORT_PLC;
871 port_change_bit = "suspend/resume";
872 break;
873 default:
874 /* Should never happen */
875 return;
876 }
877
878 /* Change bits are all write 1 to clear */
879 xhci_writel(addr, port_status | status);
880
881 port_status = xhci_readl(addr);
882 debug("clear port %s change, actual port %d status = 0x%x\n",
883 port_change_bit, wIndex, port_status);
884}
885
886/**
887 * Save Read Only (RO) bits and save read/write bits where
888 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
889 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
890 *
891 * @param state state of the Port Status and Control Regsiter
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100892 * Return: a value that would result in the port being in the
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530893 * same state, if the value was written to the port
894 * status control register.
895 */
896static u32 xhci_port_state_to_neutral(u32 state)
897{
898 /* Save read-only status and port state */
899 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
900}
901
902/**
903 * Submits the Requests to the XHCI Host Controller
904 *
905 * @param udev pointer to the USB device structure
906 * @param pipe contains the DIR_IN or OUT , devnum
907 * @param buffer buffer to be read/written based on the request
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100908 * Return: returns 0 if successful else -1 on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530909 */
910static int xhci_submit_root(struct usb_device *udev, unsigned long pipe,
911 void *buffer, struct devrequest *req)
912{
913 uint8_t tmpbuf[4];
914 u16 typeReq;
915 void *srcptr = NULL;
916 int len, srclen;
917 uint32_t reg;
918 volatile uint32_t *status_reg;
Simon Glassa49e27b2015-03-25 12:22:49 -0600919 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Bin Meng749de4c2017-07-19 21:50:03 +0800920 struct xhci_hccr *hccr = ctrl->hccr;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530921 struct xhci_hcor *hcor = ctrl->hcor;
Bin Meng749de4c2017-07-19 21:50:03 +0800922 int max_ports = HCS_MAX_PORTS(xhci_readl(&hccr->cr_hcsparams1));
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530923
Jeroen Hofsteeb351e462014-06-12 00:31:27 +0200924 if ((req->requesttype & USB_RT_PORT) &&
Bin Meng749de4c2017-07-19 21:50:03 +0800925 le16_to_cpu(req->index) > max_ports) {
926 printf("The request port(%d) exceeds maximum port number\n",
927 le16_to_cpu(req->index) - 1);
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530928 return -EINVAL;
929 }
930
931 status_reg = (volatile uint32_t *)
932 (&hcor->portregs[le16_to_cpu(req->index) - 1].or_portsc);
933 srclen = 0;
934
935 typeReq = req->request | req->requesttype << 8;
936
937 switch (typeReq) {
938 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
939 switch (le16_to_cpu(req->value) >> 8) {
940 case USB_DT_DEVICE:
941 debug("USB_DT_DEVICE request\n");
942 srcptr = &descriptor.device;
943 srclen = 0x12;
944 break;
945 case USB_DT_CONFIG:
946 debug("USB_DT_CONFIG config\n");
947 srcptr = &descriptor.config;
948 srclen = 0x19;
949 break;
950 case USB_DT_STRING:
951 debug("USB_DT_STRING config\n");
952 switch (le16_to_cpu(req->value) & 0xff) {
953 case 0: /* Language */
954 srcptr = "\4\3\11\4";
955 srclen = 4;
956 break;
957 case 1: /* Vendor String */
Simon Glassb113f6e2015-03-25 12:22:54 -0600958 srcptr = "\16\3U\0-\0B\0o\0o\0t\0";
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530959 srclen = 14;
960 break;
961 case 2: /* Product Name */
962 srcptr = "\52\3X\0H\0C\0I\0 "
963 "\0H\0o\0s\0t\0 "
964 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
965 srclen = 42;
966 break;
967 default:
968 printf("unknown value DT_STRING %x\n",
969 le16_to_cpu(req->value));
970 goto unknown;
971 }
972 break;
973 default:
974 printf("unknown value %x\n", le16_to_cpu(req->value));
975 goto unknown;
976 }
977 break;
978 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
979 switch (le16_to_cpu(req->value) >> 8) {
980 case USB_DT_HUB:
Bin Menge8930c42017-07-19 21:49:58 +0800981 case USB_DT_SS_HUB:
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530982 debug("USB_DT_HUB config\n");
Mark Kettenis4eb77d32023-01-21 20:28:00 +0100983 srcptr = &ctrl->hub_desc;
Vivek Gautam4912dcc2013-09-14 14:02:45 +0530984 srclen = 0x8;
985 break;
986 default:
987 printf("unknown value %x\n", le16_to_cpu(req->value));
988 goto unknown;
989 }
990 break;
991 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
992 debug("USB_REQ_SET_ADDRESS\n");
993 ctrl->rootdev = le16_to_cpu(req->value);
994 break;
995 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
996 /* Do nothing */
997 break;
998 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
999 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
1000 tmpbuf[1] = 0;
1001 srcptr = tmpbuf;
1002 srclen = 2;
1003 break;
1004 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
1005 memset(tmpbuf, 0, 4);
1006 reg = xhci_readl(status_reg);
1007 if (reg & PORT_CONNECT) {
1008 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
1009 switch (reg & DEV_SPEED_MASK) {
1010 case XDEV_FS:
1011 debug("SPEED = FULLSPEED\n");
1012 break;
1013 case XDEV_LS:
1014 debug("SPEED = LOWSPEED\n");
1015 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
1016 break;
1017 case XDEV_HS:
1018 debug("SPEED = HIGHSPEED\n");
1019 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
1020 break;
1021 case XDEV_SS:
1022 debug("SPEED = SUPERSPEED\n");
1023 tmpbuf[1] |= USB_PORT_STAT_SUPER_SPEED >> 8;
1024 break;
1025 }
1026 }
1027 if (reg & PORT_PE)
1028 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
1029 if ((reg & PORT_PLS_MASK) == XDEV_U3)
1030 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
1031 if (reg & PORT_OC)
1032 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
1033 if (reg & PORT_RESET)
1034 tmpbuf[0] |= USB_PORT_STAT_RESET;
1035 if (reg & PORT_POWER)
1036 /*
1037 * XXX: This Port power bit (for USB 3.0 hub)
1038 * we are faking in USB 2.0 hub port status;
1039 * since there's a change in bit positions in
1040 * two:
1041 * USB 2.0 port status PP is at position[8]
1042 * USB 3.0 port status PP is at position[9]
1043 * So, we are still keeping it at position [8]
1044 */
1045 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
1046 if (reg & PORT_CSC)
1047 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
1048 if (reg & PORT_PEC)
1049 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
1050 if (reg & PORT_OCC)
1051 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
1052 if (reg & PORT_RC)
1053 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
1054
1055 srcptr = tmpbuf;
1056 srclen = 4;
1057 break;
1058 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
1059 reg = xhci_readl(status_reg);
1060 reg = xhci_port_state_to_neutral(reg);
1061 switch (le16_to_cpu(req->value)) {
1062 case USB_PORT_FEAT_ENABLE:
1063 reg |= PORT_PE;
1064 xhci_writel(status_reg, reg);
1065 break;
1066 case USB_PORT_FEAT_POWER:
1067 reg |= PORT_POWER;
1068 xhci_writel(status_reg, reg);
1069 break;
1070 case USB_PORT_FEAT_RESET:
1071 reg |= PORT_RESET;
1072 xhci_writel(status_reg, reg);
1073 break;
1074 default:
1075 printf("unknown feature %x\n", le16_to_cpu(req->value));
1076 goto unknown;
1077 }
1078 break;
1079 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
1080 reg = xhci_readl(status_reg);
1081 reg = xhci_port_state_to_neutral(reg);
1082 switch (le16_to_cpu(req->value)) {
1083 case USB_PORT_FEAT_ENABLE:
1084 reg &= ~PORT_PE;
1085 break;
1086 case USB_PORT_FEAT_POWER:
1087 reg &= ~PORT_POWER;
1088 break;
1089 case USB_PORT_FEAT_C_RESET:
1090 case USB_PORT_FEAT_C_CONNECTION:
1091 case USB_PORT_FEAT_C_OVER_CURRENT:
1092 case USB_PORT_FEAT_C_ENABLE:
1093 xhci_clear_port_change_bit((le16_to_cpu(req->value)),
1094 le16_to_cpu(req->index),
1095 status_reg, reg);
1096 break;
1097 default:
1098 printf("unknown feature %x\n", le16_to_cpu(req->value));
1099 goto unknown;
1100 }
1101 xhci_writel(status_reg, reg);
1102 break;
1103 default:
1104 puts("Unknown request\n");
1105 goto unknown;
1106 }
1107
1108 debug("scrlen = %d\n req->length = %d\n",
1109 srclen, le16_to_cpu(req->length));
1110
Masahiro Yamadadb204642014-11-07 03:03:31 +09001111 len = min(srclen, (int)le16_to_cpu(req->length));
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301112
1113 if (srcptr != NULL && len > 0)
1114 memcpy(buffer, srcptr, len);
1115 else
1116 debug("Len is 0\n");
1117
1118 udev->act_len = len;
1119 udev->status = 0;
1120
1121 return 0;
1122
1123unknown:
1124 udev->act_len = 0;
1125 udev->status = USB_ST_STALLED;
1126
1127 return -ENODEV;
1128}
1129
1130/**
1131 * Submits the INT request to XHCI Host cotroller
1132 *
1133 * @param udev pointer to the USB device
1134 * @param pipe contains the DIR_IN or OUT , devnum
1135 * @param buffer buffer to be read/written based on the request
1136 * @param length length of the buffer
1137 * @param interval interval of the interrupt
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +01001138 * Return: 0
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301139 */
Simon Glass49b41832015-03-25 12:22:53 -06001140static int _xhci_submit_int_msg(struct usb_device *udev, unsigned long pipe,
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001141 void *buffer, int length, int interval,
1142 bool nonblock)
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301143{
Bin Meng2bc748c2017-09-18 06:40:41 -07001144 if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1145 printf("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1146 return -EINVAL;
1147 }
1148
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301149 /*
Bin Meng2bc748c2017-09-18 06:40:41 -07001150 * xHCI uses normal TRBs for both bulk and interrupt. When the
1151 * interrupt endpoint is to be serviced, the xHC will consume
1152 * (at most) one TD. A TD (comprised of sg list entries) can
1153 * take several service intervals to transmit.
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301154 */
Bin Meng2bc748c2017-09-18 06:40:41 -07001155 return xhci_bulk_tx(udev, pipe, length, buffer);
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301156}
1157
1158/**
1159 * submit the BULK type of request to the USB Device
1160 *
1161 * @param udev pointer to the USB device
1162 * @param pipe contains the DIR_IN or OUT , devnum
1163 * @param buffer buffer to be read/written based on the request
1164 * @param length length of the buffer
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +01001165 * Return: returns 0 if successful else -1 on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301166 */
Simon Glass49b41832015-03-25 12:22:53 -06001167static int _xhci_submit_bulk_msg(struct usb_device *udev, unsigned long pipe,
1168 void *buffer, int length)
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301169{
1170 if (usb_pipetype(pipe) != PIPE_BULK) {
1171 printf("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1172 return -EINVAL;
1173 }
1174
1175 return xhci_bulk_tx(udev, pipe, length, buffer);
1176}
1177
1178/**
1179 * submit the control type of request to the Root hub/Device based on the devnum
1180 *
1181 * @param udev pointer to the USB device
1182 * @param pipe contains the DIR_IN or OUT , devnum
1183 * @param buffer buffer to be read/written based on the request
1184 * @param length length of the buffer
1185 * @param setup Request type
Simon Glass4ec422c2015-03-25 12:22:51 -06001186 * @param root_portnr Root port number that this device is on
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +01001187 * Return: returns 0 if successful else -1 on failure
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301188 */
Simon Glass4ec422c2015-03-25 12:22:51 -06001189static int _xhci_submit_control_msg(struct usb_device *udev, unsigned long pipe,
1190 void *buffer, int length,
1191 struct devrequest *setup, int root_portnr)
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301192{
Simon Glassa49e27b2015-03-25 12:22:49 -06001193 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301194 int ret = 0;
1195
1196 if (usb_pipetype(pipe) != PIPE_CONTROL) {
1197 printf("non-control pipe (type=%lu)", usb_pipetype(pipe));
1198 return -EINVAL;
1199 }
1200
1201 if (usb_pipedevice(pipe) == ctrl->rootdev)
1202 return xhci_submit_root(udev, pipe, buffer, setup);
1203
Ted Chena2f4f9a2016-03-18 17:56:52 +10301204 if (setup->request == USB_REQ_SET_ADDRESS &&
1205 (setup->requesttype & USB_TYPE_MASK) == USB_TYPE_STANDARD)
Simon Glass4ec422c2015-03-25 12:22:51 -06001206 return xhci_address_device(udev, root_portnr);
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301207
Ted Chena2f4f9a2016-03-18 17:56:52 +10301208 if (setup->request == USB_REQ_SET_CONFIGURATION &&
1209 (setup->requesttype & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301210 ret = xhci_set_configuration(udev);
1211 if (ret) {
1212 puts("Failed to configure xHCI endpoint\n");
1213 return ret;
1214 }
1215 }
1216
1217 return xhci_ctrl_tx(udev, pipe, setup, length, buffer);
1218}
1219
Simon Glass686a8122015-03-25 12:22:52 -06001220static int xhci_lowlevel_init(struct xhci_ctrl *ctrl)
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301221{
Simon Glass686a8122015-03-25 12:22:52 -06001222 struct xhci_hccr *hccr;
1223 struct xhci_hcor *hcor;
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301224 uint32_t val;
1225 uint32_t val2;
1226 uint32_t reg;
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301227
Simon Glass686a8122015-03-25 12:22:52 -06001228 hccr = ctrl->hccr;
1229 hcor = ctrl->hcor;
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301230 /*
1231 * Program the Number of Device Slots Enabled field in the CONFIG
1232 * register with the max value of slots the HC can handle.
1233 */
1234 val = (xhci_readl(&hccr->cr_hcsparams1) & HCS_SLOTS_MASK);
1235 val2 = xhci_readl(&hcor->or_config);
1236 val |= (val2 & ~HCS_SLOTS_MASK);
1237 xhci_writel(&hcor->or_config, val);
1238
1239 /* initializing xhci data structures */
1240 if (xhci_mem_init(ctrl, hccr, hcor) < 0)
1241 return -ENOMEM;
Mark Kettenis4eb77d32023-01-21 20:28:00 +01001242 ctrl->hub_desc = descriptor.hub;
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301243
1244 reg = xhci_readl(&hccr->cr_hcsparams1);
Mark Kettenis4eb77d32023-01-21 20:28:00 +01001245 ctrl->hub_desc.bNbrPorts = HCS_MAX_PORTS(reg);
1246 printf("Register %x NbrPorts %d\n", reg, ctrl->hub_desc.bNbrPorts);
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301247
1248 /* Port Indicators */
1249 reg = xhci_readl(&hccr->cr_hccparams);
1250 if (HCS_INDICATOR(reg))
Mark Kettenis4eb77d32023-01-21 20:28:00 +01001251 put_unaligned(get_unaligned(&ctrl->hub_desc.wHubCharacteristics)
1252 | 0x80, &ctrl->hub_desc.wHubCharacteristics);
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301253
1254 /* Port Power Control */
1255 if (HCC_PPC(reg))
Mark Kettenis4eb77d32023-01-21 20:28:00 +01001256 put_unaligned(get_unaligned(&ctrl->hub_desc.wHubCharacteristics)
1257 | 0x01, &ctrl->hub_desc.wHubCharacteristics);
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301258
1259 if (xhci_start(hcor)) {
1260 xhci_reset(hcor);
1261 return -ENODEV;
1262 }
1263
1264 /* Zero'ing IRQ control register and IRQ pending register */
1265 xhci_writel(&ctrl->ir_set->irq_control, 0x0);
1266 xhci_writel(&ctrl->ir_set->irq_pending, 0x0);
1267
1268 reg = HC_VERSION(xhci_readl(&hccr->cr_capbase));
1269 printf("USB XHCI %x.%02x\n", reg >> 8, reg & 0xff);
developerd1c2da42020-09-08 18:59:55 +02001270 ctrl->hci_version = reg;
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301271
Simon Glass686a8122015-03-25 12:22:52 -06001272 return 0;
1273}
1274
1275static int xhci_lowlevel_stop(struct xhci_ctrl *ctrl)
1276{
1277 u32 temp;
1278
1279 xhci_reset(ctrl->hcor);
1280
1281 debug("// Disabling event ring interrupts\n");
1282 temp = xhci_readl(&ctrl->hcor->or_usbsts);
1283 xhci_writel(&ctrl->hcor->or_usbsts, temp & ~STS_EINT);
1284 temp = xhci_readl(&ctrl->ir_set->irq_pending);
1285 xhci_writel(&ctrl->ir_set->irq_pending, ER_IRQ_DISABLE(temp));
Vivek Gautam4912dcc2013-09-14 14:02:45 +05301286
1287 return 0;
1288}
1289
Simon Glass49b41832015-03-25 12:22:53 -06001290static int xhci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1291 unsigned long pipe, void *buffer, int length,
1292 struct devrequest *setup)
1293{
1294 struct usb_device *uhop;
1295 struct udevice *hub;
1296 int root_portnr = 0;
1297
1298 debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1299 dev->name, udev, udev->dev->name, udev->portnr);
1300 hub = udev->dev;
1301 if (device_get_uclass_id(hub) == UCLASS_USB_HUB) {
1302 /* Figure out our port number on the root hub */
Bin Meng5ecfd5d2017-07-19 21:51:11 +08001303 if (usb_hub_is_root_hub(hub)) {
Simon Glass49b41832015-03-25 12:22:53 -06001304 root_portnr = udev->portnr;
1305 } else {
Bin Meng5ecfd5d2017-07-19 21:51:11 +08001306 while (!usb_hub_is_root_hub(hub->parent))
Simon Glass49b41832015-03-25 12:22:53 -06001307 hub = hub->parent;
Simon Glassde44acf2015-09-28 23:32:01 -06001308 uhop = dev_get_parent_priv(hub);
Simon Glass49b41832015-03-25 12:22:53 -06001309 root_portnr = uhop->portnr;
1310 }
1311 }
1312/*
1313 struct usb_device *hop = udev;
1314
1315 if (hop->parent)
1316 while (hop->parent->parent)
1317 hop = hop->parent;
1318*/
1319 return _xhci_submit_control_msg(udev, pipe, buffer, length, setup,
1320 root_portnr);
1321}
1322
1323static int xhci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1324 unsigned long pipe, void *buffer, int length)
1325{
1326 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1327 return _xhci_submit_bulk_msg(udev, pipe, buffer, length);
1328}
1329
1330static int xhci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1331 unsigned long pipe, void *buffer, int length,
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001332 int interval, bool nonblock)
Simon Glass49b41832015-03-25 12:22:53 -06001333{
1334 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001335 return _xhci_submit_int_msg(udev, pipe, buffer, length, interval,
1336 nonblock);
Simon Glass49b41832015-03-25 12:22:53 -06001337}
1338
1339static int xhci_alloc_device(struct udevice *dev, struct usb_device *udev)
1340{
1341 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1342 return _xhci_alloc_device(udev);
1343}
1344
Bin Meng2b6f4c52017-07-19 21:51:19 +08001345static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev)
1346{
1347 struct xhci_ctrl *ctrl = dev_get_priv(dev);
1348 struct usb_hub_device *hub = dev_get_uclass_priv(udev->dev);
1349 struct xhci_virt_device *virt_dev;
1350 struct xhci_input_control_ctx *ctrl_ctx;
1351 struct xhci_container_ctx *out_ctx;
1352 struct xhci_container_ctx *in_ctx;
1353 struct xhci_slot_ctx *slot_ctx;
1354 int slot_id = udev->slot_id;
1355 unsigned think_time;
1356
1357 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1358
1359 /* Ignore root hubs */
1360 if (usb_hub_is_root_hub(udev->dev))
1361 return 0;
1362
1363 virt_dev = ctrl->devs[slot_id];
1364 BUG_ON(!virt_dev);
1365
1366 out_ctx = virt_dev->out_ctx;
1367 in_ctx = virt_dev->in_ctx;
1368
1369 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1370 /* Initialize the input context control */
Bin Meng03760fe2018-05-23 23:40:47 -07001371 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
Bin Meng2b6f4c52017-07-19 21:51:19 +08001372 ctrl_ctx->drop_flags = 0;
1373
1374 xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
1375
1376 /* slot context */
1377 xhci_slot_copy(ctrl, in_ctx, out_ctx);
1378 slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
1379
1380 /* Update hub related fields */
1381 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
Bin Meng18f5bcd2018-05-23 23:40:49 -07001382 /*
1383 * refer to section 6.2.2: MTT should be 0 for full speed hub,
1384 * but it may be already set to 1 when setup an xHCI virtual
1385 * device, so clear it anyway.
1386 */
1387 if (hub->tt.multi)
Bin Meng2b6f4c52017-07-19 21:51:19 +08001388 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
Bin Meng18f5bcd2018-05-23 23:40:49 -07001389 else if (udev->speed == USB_SPEED_FULL)
1390 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT);
Bin Meng2b6f4c52017-07-19 21:51:19 +08001391 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(udev->maxchild));
1392 /*
1393 * Set TT think time - convert from ns to FS bit times.
1394 * Note 8 FS bit times == (8 bits / 12000000 bps) ~= 666ns
1395 *
1396 * 0 = 8 FS bit times, 1 = 16 FS bit times,
1397 * 2 = 24 FS bit times, 3 = 32 FS bit times.
1398 *
1399 * This field shall be 0 if the device is not a high-spped hub.
1400 */
1401 think_time = hub->tt.think_time;
1402 if (think_time != 0)
1403 think_time = (think_time / 666) - 1;
1404 if (udev->speed == USB_SPEED_HIGH)
1405 slot_ctx->tt_info |= cpu_to_le32(TT_THINK_TIME(think_time));
Bin Mengd0383982018-05-23 23:40:48 -07001406 slot_ctx->dev_state = 0;
Bin Meng2b6f4c52017-07-19 21:51:19 +08001407
1408 return xhci_configure_endpoints(udev, false);
1409}
1410
Bin Meng1bc4ce92017-09-07 06:13:18 -07001411static int xhci_get_max_xfer_size(struct udevice *dev, size_t *size)
1412{
1413 /*
1414 * xHCD allocates one segment which includes 64 TRBs for each endpoint
1415 * and the last TRB in this segment is configured as a link TRB to form
1416 * a TRB ring. Each TRB can transfer up to 64K bytes, however data
1417 * buffers referenced by transfer TRBs shall not span 64KB boundaries.
1418 * Hence the maximum number of TRBs we can use in one transfer is 62.
1419 */
1420 *size = (TRBS_PER_SEGMENT - 2) * TRB_MAX_BUFF_SIZE;
1421
1422 return 0;
1423}
1424
Simon Glass49b41832015-03-25 12:22:53 -06001425int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,
1426 struct xhci_hcor *hcor)
1427{
1428 struct xhci_ctrl *ctrl = dev_get_priv(dev);
1429 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1430 int ret;
1431
1432 debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p\n", __func__, dev->name,
1433 ctrl, hccr, hcor);
1434
1435 ctrl->dev = dev;
1436
1437 /*
1438 * XHCI needs to issue a Address device command to setup
1439 * proper device context structures, before it can interact
1440 * with the device. So a get_descriptor will fail before any
1441 * of that is done for XHCI unlike EHCI.
1442 */
1443 priv->desc_before_addr = false;
1444
1445 ret = xhci_reset(hcor);
1446 if (ret)
1447 goto err;
1448
1449 ctrl->hccr = hccr;
1450 ctrl->hcor = hcor;
1451 ret = xhci_lowlevel_init(ctrl);
1452 if (ret)
1453 goto err;
1454
1455 return 0;
1456err:
Simon Glass49b41832015-03-25 12:22:53 -06001457 debug("%s: failed, ret=%d\n", __func__, ret);
1458 return ret;
1459}
1460
1461int xhci_deregister(struct udevice *dev)
1462{
1463 struct xhci_ctrl *ctrl = dev_get_priv(dev);
1464
1465 xhci_lowlevel_stop(ctrl);
1466 xhci_cleanup(ctrl);
1467
1468 return 0;
1469}
1470
1471struct dm_usb_ops xhci_usb_ops = {
1472 .control = xhci_submit_control_msg,
1473 .bulk = xhci_submit_bulk_msg,
1474 .interrupt = xhci_submit_int_msg,
1475 .alloc_device = xhci_alloc_device,
Bin Meng2b6f4c52017-07-19 21:51:19 +08001476 .update_hub_device = xhci_update_hub_device,
Bin Meng1bc4ce92017-09-07 06:13:18 -07001477 .get_max_xfer_size = xhci_get_max_xfer_size,
Simon Glass49b41832015-03-25 12:22:53 -06001478};