blob: d41d60ce3582767b96cb874d51d59448e4377484 [file] [log] [blame]
Simon Glass4ecaa6d2015-08-30 16:55:37 -06001/*
2 * Copyright (c) 2013 Google, Inc
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <clk.h>
9#include <dm.h>
10#include <dwmmc.h>
11#include <errno.h>
Simon Glass947fd982016-01-21 19:43:34 -070012#include <pwrseq.h>
Simon Glass4ecaa6d2015-08-30 16:55:37 -060013#include <syscon.h>
Simon Glass947fd982016-01-21 19:43:34 -070014#include <asm/gpio.h>
Simon Glass4ecaa6d2015-08-30 16:55:37 -060015#include <asm/arch/clock.h>
16#include <asm/arch/periph.h>
17#include <linux/err.h>
18
19DECLARE_GLOBAL_DATA_PTR;
20
Simon Glassae696102016-05-14 14:03:08 -060021struct rockchip_mmc_plat {
22 struct mmc_config cfg;
23 struct mmc mmc;
24};
25
Simon Glass4ecaa6d2015-08-30 16:55:37 -060026struct rockchip_dwmmc_priv {
Stephen Warrena9622432016-06-17 09:44:00 -060027 struct clk clk;
Simon Glass4ecaa6d2015-08-30 16:55:37 -060028 struct dwmci_host host;
29};
30
31static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
32{
33 struct udevice *dev = host->priv;
34 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
35 int ret;
36
Stephen Warrena9622432016-06-17 09:44:00 -060037 ret = clk_set_rate(&priv->clk, freq);
Simon Glass4ecaa6d2015-08-30 16:55:37 -060038 if (ret < 0) {
39 debug("%s: err=%d\n", __func__, ret);
40 return ret;
41 }
42
43 return freq;
44}
45
46static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
47{
48 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
49 struct dwmci_host *host = &priv->host;
50
51 host->name = dev->name;
52 host->ioaddr = (void *)dev_get_addr(dev);
53 host->buswidth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
54 "bus-width", 4);
55 host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
56 host->priv = dev;
57
huang lin8799fc12015-11-18 09:37:25 +080058 /* use non-removeable as sdcard and emmc as judgement */
59 if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "non-removable"))
huang linb06352f2016-01-08 14:06:49 +080060 host->dev_index = 0;
61 else
huang lin8799fc12015-11-18 09:37:25 +080062 host->dev_index = 1;
Simon Glass4ecaa6d2015-08-30 16:55:37 -060063
64 return 0;
65}
66
67static int rockchip_dwmmc_probe(struct udevice *dev)
68{
Simon Glassae696102016-05-14 14:03:08 -060069#ifdef CONFIG_BLK
70 struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
71#endif
Simon Glass4ecaa6d2015-08-30 16:55:37 -060072 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
73 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
74 struct dwmci_host *host = &priv->host;
Simon Glass947fd982016-01-21 19:43:34 -070075 struct udevice *pwr_dev __maybe_unused;
Simon Glass4ecaa6d2015-08-30 16:55:37 -060076 u32 minmax[2];
77 int ret;
huang linb1b71cd2015-11-17 14:20:24 +080078 int fifo_depth;
Simon Glass4ecaa6d2015-08-30 16:55:37 -060079
Simon Glass8d32f4b2016-01-21 19:43:38 -070080 ret = clk_get_by_index(dev, 0, &priv->clk);
81 if (ret < 0)
Simon Glass4ecaa6d2015-08-30 16:55:37 -060082 return ret;
83
huang linb1b71cd2015-11-17 14:20:24 +080084 if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
85 "clock-freq-min-max", minmax, 2))
86 return -EINVAL;
87
88 fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
89 "fifo-depth", 0);
90 if (fifo_depth < 0)
91 return -EINVAL;
92
93 host->fifoth_val = MSIZE(0x2) |
94 RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2);
95
96 if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "fifo-mode"))
97 host->fifo_mode = true;
98
Simon Glass947fd982016-01-21 19:43:34 -070099#ifdef CONFIG_PWRSEQ
100 /* Enable power if needed */
101 ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
102 &pwr_dev);
103 if (!ret) {
104 ret = pwrseq_set_power(pwr_dev, true);
105 if (ret)
106 return ret;
107 }
108#endif
Simon Glassae696102016-05-14 14:03:08 -0600109#ifdef CONFIG_BLK
110 dwmci_setup_cfg(&plat->cfg, dev->name, host->buswidth, host->caps,
111 minmax[1], minmax[0]);
112 host->mmc = &plat->mmc;
113#else
huang linb1b71cd2015-11-17 14:20:24 +0800114 ret = add_dwmci(host, minmax[1], minmax[0]);
Simon Glass4ecaa6d2015-08-30 16:55:37 -0600115 if (ret)
116 return ret;
117
Simon Glassae696102016-05-14 14:03:08 -0600118#endif
119 host->mmc->priv = &priv->host;
Simon Glass77ca42b2016-05-01 13:52:34 -0600120 host->mmc->dev = dev;
Simon Glass4ecaa6d2015-08-30 16:55:37 -0600121 upriv->mmc = host->mmc;
122
123 return 0;
124}
125
Simon Glassae696102016-05-14 14:03:08 -0600126static int rockchip_dwmmc_bind(struct udevice *dev)
127{
128#ifdef CONFIG_BLK
129 struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
130 int ret;
131
132 ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
133 if (ret)
134 return ret;
135#endif
136
137 return 0;
138}
139
Simon Glass4ecaa6d2015-08-30 16:55:37 -0600140static const struct udevice_id rockchip_dwmmc_ids[] = {
141 { .compatible = "rockchip,rk3288-dw-mshc" },
142 { }
143};
144
145U_BOOT_DRIVER(rockchip_dwmmc_drv) = {
146 .name = "rockchip_dwmmc",
147 .id = UCLASS_MMC,
148 .of_match = rockchip_dwmmc_ids,
149 .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata,
Simon Glassae696102016-05-14 14:03:08 -0600150 .bind = rockchip_dwmmc_bind,
Simon Glass4ecaa6d2015-08-30 16:55:37 -0600151 .probe = rockchip_dwmmc_probe,
152 .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
Simon Glassae696102016-05-14 14:03:08 -0600153 .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
Simon Glass4ecaa6d2015-08-30 16:55:37 -0600154};
Simon Glass947fd982016-01-21 19:43:34 -0700155
156#ifdef CONFIG_PWRSEQ
157static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
158{
159 struct gpio_desc reset;
160 int ret;
161
162 ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
163 if (ret)
164 return ret;
165 dm_gpio_set_value(&reset, 1);
166 udelay(1);
167 dm_gpio_set_value(&reset, 0);
168 udelay(200);
169
170 return 0;
171}
172
173static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = {
174 .set_power = rockchip_dwmmc_pwrseq_set_power,
175};
176
177static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = {
178 { .compatible = "mmc-pwrseq-emmc" },
179 { }
180};
181
182U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = {
183 .name = "mmc_pwrseq_emmc",
184 .id = UCLASS_PWRSEQ,
185 .of_match = rockchip_dwmmc_pwrseq_ids,
186 .ops = &rockchip_dwmmc_pwrseq_ops,
187};
188#endif