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Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001menu "mpc85xx CPU"
2 depends on MPC85xx
3
4config SYS_CPU
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09005 default "mpc85xx"
6
Simon Glass9fdc0de2017-05-17 03:25:15 -06007config CMD_ERRATA
8 bool "Enable the 'errata' command"
9 depends on MPC85xx
10 default y
11 help
12 This enables the 'errata' command which displays a list of errata
13 work-arounds which are enabled for the current board.
14
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090015choice
16 prompt "Target select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050017 optional
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090018
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090019config TARGET_SOCRATES
20 bool "Support socrates"
York Sun5ac012a2016-11-15 13:57:15 -080021 select ARCH_MPC8544
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090022
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090023config TARGET_P3041DS
24 bool "Support P3041DS"
Masahiro Yamada653e9fe2016-07-25 19:56:03 +090025 select PHYS_64BIT
York Sundf70d062016-11-18 11:20:40 -080026 select ARCH_P3041
Tom Rini22d567e2017-01-22 19:43:11 -050027 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Simon Glass203b3ab2017-06-14 21:28:24 -060028 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090029 imply PANIC_HANG
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090030
31config TARGET_P4080DS
32 bool "Support P4080DS"
Masahiro Yamada653e9fe2016-07-25 19:56:03 +090033 select PHYS_64BIT
York Sun84be8a92016-11-18 11:24:40 -080034 select ARCH_P4080
Tom Rini22d567e2017-01-22 19:43:11 -050035 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Simon Glass203b3ab2017-06-14 21:28:24 -060036 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090037 imply PANIC_HANG
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090038
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090039config TARGET_P5040DS
40 bool "Support P5040DS"
Masahiro Yamada653e9fe2016-07-25 19:56:03 +090041 select PHYS_64BIT
York Suna3c5b662016-11-18 11:39:36 -080042 select ARCH_P5040
Tom Rini22d567e2017-01-22 19:43:11 -050043 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Simon Glass203b3ab2017-06-14 21:28:24 -060044 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090045 imply PANIC_HANG
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090046
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090047config TARGET_MPC8548CDS
48 bool "Support MPC8548CDS"
York Sunefc49e02016-11-15 13:52:34 -080049 select ARCH_MPC8548
Rajesh Bhagat6d072982021-02-15 09:46:14 +010050 select FSL_VIA
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090051
York Sun7f945ca2016-11-16 13:30:06 -080052config TARGET_P1010RDB_PA
53 bool "Support P1010RDB_PA"
54 select ARCH_P1010
Tom Rini22d567e2017-01-22 19:43:11 -050055 select BOARD_LATE_INIT if CHAIN_OF_TRUST
York Sun7f945ca2016-11-16 13:30:06 -080056 select SUPPORT_SPL
57 select SUPPORT_TPL
Simon Glass4590d4e2017-05-17 03:25:10 -060058 imply CMD_EEPROM
Simon Glass203b3ab2017-06-14 21:28:24 -060059 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090060 imply PANIC_HANG
York Sun7f945ca2016-11-16 13:30:06 -080061
62config TARGET_P1010RDB_PB
63 bool "Support P1010RDB_PB"
York Sun24f88b32016-11-16 13:08:52 -080064 select ARCH_P1010
Tom Rini22d567e2017-01-22 19:43:11 -050065 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Masahiro Yamada6e0971b2014-10-20 17:45:56 +090066 select SUPPORT_SPL
Masahiro Yamadaf5ebc992014-10-20 17:45:57 +090067 select SUPPORT_TPL
Simon Glass4590d4e2017-05-17 03:25:10 -060068 imply CMD_EEPROM
Simon Glass203b3ab2017-06-14 21:28:24 -060069 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090070 imply PANIC_HANG
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090071
York Sun443108bf2016-11-17 13:52:44 -080072config TARGET_P1020RDB_PC
73 bool "Support P1020RDB-PC"
74 select SUPPORT_SPL
75 select SUPPORT_TPL
York Sunaf2dc812016-11-18 10:02:14 -080076 select ARCH_P1020
Simon Glass4590d4e2017-05-17 03:25:10 -060077 imply CMD_EEPROM
Simon Glass203b3ab2017-06-14 21:28:24 -060078 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090079 imply PANIC_HANG
York Sun443108bf2016-11-17 13:52:44 -080080
York Sun06732382016-11-17 13:53:33 -080081config TARGET_P1020RDB_PD
82 bool "Support P1020RDB-PD"
83 select SUPPORT_SPL
84 select SUPPORT_TPL
York Sunaf2dc812016-11-18 10:02:14 -080085 select ARCH_P1020
Simon Glass4590d4e2017-05-17 03:25:10 -060086 imply CMD_EEPROM
Simon Glass203b3ab2017-06-14 21:28:24 -060087 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +090088 imply PANIC_HANG
York Sun06732382016-11-17 13:53:33 -080089
York Sun9c01ff22016-11-17 14:19:18 -080090config TARGET_P2020RDB
91 bool "Support P2020RDB-PC"
92 select SUPPORT_SPL
93 select SUPPORT_TPL
York Sun4b08dd72016-11-18 11:08:43 -080094 select ARCH_P2020
Simon Glass4590d4e2017-05-17 03:25:10 -060095 imply CMD_EEPROM
Simon Glass203b3ab2017-06-14 21:28:24 -060096 imply CMD_SATA
Tuomas Tynkkynen104a5372017-12-08 15:36:14 +020097 imply SATA_SIL
York Sun9c01ff22016-11-17 14:19:18 -080098
Masahiro Yamadad3ae6782014-07-30 14:08:14 +090099config TARGET_P2041RDB
100 bool "Support P2041RDB"
York Sun5786fca2016-11-18 11:15:21 -0800101 select ARCH_P2041
Tom Rini22d567e2017-01-22 19:43:11 -0500102 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900103 select PHYS_64BIT
Simon Glass203b3ab2017-06-14 21:28:24 -0600104 imply CMD_SATA
Tuomas Tynkkynen8df5dd32017-12-08 15:36:17 +0200105 imply FSL_SATA
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900106
107config TARGET_QEMU_PPCE500
108 bool "Support qemu-ppce500"
York Sun51e91e82016-11-18 12:29:51 -0800109 select ARCH_QEMU_E500
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900110 select PHYS_64BIT
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900111
York Suna5ca1422016-11-18 12:45:44 -0800112config TARGET_T1024RDB
113 bool "Support T1024RDB"
York Sun7d29dd62016-11-18 13:01:34 -0800114 select ARCH_T1024
Tom Rini22d567e2017-01-22 19:43:11 -0500115 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Shengzhou Liu49912402014-11-24 17:11:56 +0800116 select SUPPORT_SPL
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900117 select PHYS_64BIT
Rajesh Bhagatba2414f2019-02-01 05:22:01 +0000118 select FSL_DDR_INTERACTIVE
Simon Glass4590d4e2017-05-17 03:25:10 -0600119 imply CMD_EEPROM
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900120 imply PANIC_HANG
Shengzhou Liu49912402014-11-24 17:11:56 +0800121
York Sun1d564e752016-11-18 13:19:39 -0800122config TARGET_T1042RDB
123 bool "Support T1042RDB"
York Sun2d7b2d42016-11-18 13:36:39 -0800124 select ARCH_T1042
Tom Rini22d567e2017-01-22 19:43:11 -0500125 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Masahiro Yamada6e0971b2014-10-20 17:45:56 +0900126 select SUPPORT_SPL
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900127 select PHYS_64BIT
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900128
York Sund08610d2016-11-21 11:04:34 -0800129config TARGET_T1042D4RDB
130 bool "Support T1042D4RDB"
131 select ARCH_T1042
Tom Rini22d567e2017-01-22 19:43:11 -0500132 select BOARD_LATE_INIT if CHAIN_OF_TRUST
York Sund08610d2016-11-21 11:04:34 -0800133 select SUPPORT_SPL
134 select PHYS_64BIT
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900135 imply PANIC_HANG
York Sund08610d2016-11-21 11:04:34 -0800136
York Sune9c8dcf2016-11-18 13:44:00 -0800137config TARGET_T1042RDB_PI
138 bool "Support T1042RDB_PI"
139 select ARCH_T1042
Tom Rini22d567e2017-01-22 19:43:11 -0500140 select BOARD_LATE_INIT if CHAIN_OF_TRUST
York Sune9c8dcf2016-11-18 13:44:00 -0800141 select SUPPORT_SPL
142 select PHYS_64BIT
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900143 imply PANIC_HANG
York Sune9c8dcf2016-11-18 13:44:00 -0800144
York Sund1a6c0f2016-11-21 12:46:58 -0800145config TARGET_T2080QDS
146 bool "Support T2080QDS"
York Sune20c6852016-11-21 12:54:19 -0800147 select ARCH_T2080
Tom Rini22d567e2017-01-22 19:43:11 -0500148 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Masahiro Yamada6e0971b2014-10-20 17:45:56 +0900149 select SUPPORT_SPL
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900150 select PHYS_64BIT
Rajesh Bhagatba2414f2019-02-01 05:22:01 +0000151 select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
152 select FSL_DDR_INTERACTIVE
Peng Ma34bed5d2019-12-23 09:28:12 +0000153 imply CMD_SATA
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900154
York Sun58459252016-11-21 12:57:22 -0800155config TARGET_T2080RDB
156 bool "Support T2080RDB"
York Sune20c6852016-11-21 12:54:19 -0800157 select ARCH_T2080
Tom Rini22d567e2017-01-22 19:43:11 -0500158 select BOARD_LATE_INIT if CHAIN_OF_TRUST
Masahiro Yamada6e0971b2014-10-20 17:45:56 +0900159 select SUPPORT_SPL
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900160 select PHYS_64BIT
Simon Glass203b3ab2017-06-14 21:28:24 -0600161 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900162 imply PANIC_HANG
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900163
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900164config TARGET_T4240RDB
165 bool "Support T4240RDB"
York Sun0fad3262016-11-21 13:35:41 -0800166 select ARCH_T4240
Chunhe Lan66cba6b2015-03-20 17:08:54 +0800167 select SUPPORT_SPL
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900168 select PHYS_64BIT
Rajesh Bhagatba2414f2019-02-01 05:22:01 +0000169 select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
Simon Glass203b3ab2017-06-14 21:28:24 -0600170 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900171 imply PANIC_HANG
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900172
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900173config TARGET_KMP204X
174 bool "Support kmp204x"
Pascal Linder305329f2019-06-18 13:27:47 +0200175 select VENDOR_KM
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900176
Niel Fouriedb7241d2021-01-21 13:19:20 +0100177config TARGET_KMCENT2
178 bool "Support kmcent2"
179 select VENDOR_KM
180
Oleksandr G Zhadan19ac6882015-04-29 16:57:39 -0400181config TARGET_UCP1020
182 bool "Support uCP1020"
York Sunaf2dc812016-11-18 10:02:14 -0800183 select ARCH_P1020
Simon Glass203b3ab2017-06-14 21:28:24 -0600184 imply CMD_SATA
Masahiro Yamadaacede7a2017-12-04 12:37:00 +0900185 imply PANIC_HANG
Oleksandr G Zhadan19ac6882015-04-29 16:57:39 -0400186
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900187endchoice
188
York Sunfda566d2016-11-18 11:56:57 -0800189config ARCH_B4420
190 bool
York Sunaf5495a2016-12-28 08:43:27 -0800191 select E500MC
York Sunf4e8a752016-12-28 08:43:48 -0800192 select E6500
York Sune7a6eaf2016-12-02 10:44:34 -0800193 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800194 select SYS_FSL_DDR_VER_47
York Sunbe735532016-12-28 08:43:43 -0800195 select SYS_FSL_ERRATUM_A004477
196 select SYS_FSL_ERRATUM_A005871
197 select SYS_FSL_ERRATUM_A006379
198 select SYS_FSL_ERRATUM_A006384
199 select SYS_FSL_ERRATUM_A006475
200 select SYS_FSL_ERRATUM_A006593
201 select SYS_FSL_ERRATUM_A007075
202 select SYS_FSL_ERRATUM_A007186
203 select SYS_FSL_ERRATUM_A007212
204 select SYS_FSL_ERRATUM_A009942
York Sund297d392016-12-28 08:43:40 -0800205 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800206 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800207 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800208 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800209 select SYS_FSL_SEC_COMPAT_4
York Sun7eafac12016-12-28 08:43:50 -0800210 select SYS_PPC64
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530211 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600212 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400213 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600214 imply CMD_REGINFO
York Sunfda566d2016-11-18 11:56:57 -0800215
York Sun68eaa9a2016-11-18 11:44:43 -0800216config ARCH_B4860
217 bool
York Sunaf5495a2016-12-28 08:43:27 -0800218 select E500MC
York Sunf4e8a752016-12-28 08:43:48 -0800219 select E6500
York Sune7a6eaf2016-12-02 10:44:34 -0800220 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800221 select SYS_FSL_DDR_VER_47
York Sunbe735532016-12-28 08:43:43 -0800222 select SYS_FSL_ERRATUM_A004477
223 select SYS_FSL_ERRATUM_A005871
224 select SYS_FSL_ERRATUM_A006379
225 select SYS_FSL_ERRATUM_A006384
226 select SYS_FSL_ERRATUM_A006475
227 select SYS_FSL_ERRATUM_A006593
228 select SYS_FSL_ERRATUM_A007075
229 select SYS_FSL_ERRATUM_A007186
230 select SYS_FSL_ERRATUM_A007212
Darwin Dingela56d6c02016-10-25 09:48:01 +1300231 select SYS_FSL_ERRATUM_A007907
York Sunbe735532016-12-28 08:43:43 -0800232 select SYS_FSL_ERRATUM_A009942
York Sund297d392016-12-28 08:43:40 -0800233 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800234 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800235 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800236 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800237 select SYS_FSL_SEC_COMPAT_4
York Sun7eafac12016-12-28 08:43:50 -0800238 select SYS_PPC64
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530239 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600240 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400241 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600242 imply CMD_REGINFO
York Sun68eaa9a2016-11-18 11:44:43 -0800243
York Suna80bdf72016-11-15 14:09:50 -0800244config ARCH_BSC9131
245 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800246 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800247 select SYS_FSL_DDR_VER_44
York Sunbe735532016-12-28 08:43:43 -0800248 select SYS_FSL_ERRATUM_A004477
249 select SYS_FSL_ERRATUM_A005125
York Sun097e3602016-12-28 08:43:42 -0800250 select SYS_FSL_ERRATUM_ESDHC111
York Sund297d392016-12-28 08:43:40 -0800251 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800252 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800253 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800254 select SYS_FSL_SEC_COMPAT_4
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530255 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600256 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400257 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600258 imply CMD_REGINFO
York Suna80bdf72016-11-15 14:09:50 -0800259
260config ARCH_BSC9132
261 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800262 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800263 select SYS_FSL_DDR_VER_46
York Sunbe735532016-12-28 08:43:43 -0800264 select SYS_FSL_ERRATUM_A004477
265 select SYS_FSL_ERRATUM_A005125
266 select SYS_FSL_ERRATUM_A005434
York Sun097e3602016-12-28 08:43:42 -0800267 select SYS_FSL_ERRATUM_ESDHC111
York Sunbe735532016-12-28 08:43:43 -0800268 select SYS_FSL_ERRATUM_I2C_A004447
269 select SYS_FSL_ERRATUM_IFC_A002769
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800270 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800271 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800272 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800273 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800274 select SYS_FSL_SEC_COMPAT_4
York Sun85ab6f02016-12-28 08:43:29 -0800275 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530276 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600277 imply CMD_EEPROM
Tom Rinic20bb732017-07-22 18:36:16 -0400278 imply CMD_MTDPARTS
Tom Rini00448d22017-07-28 21:31:42 -0400279 imply CMD_NAND
Simon Glassc88a09a2017-08-04 16:34:34 -0600280 imply CMD_PCI
Christophe Leroye538bbc2017-08-04 16:34:40 -0600281 imply CMD_REGINFO
York Suna80bdf72016-11-15 14:09:50 -0800282
York Sun4119aee2016-11-15 18:44:22 -0800283config ARCH_C29X
284 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800285 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800286 select SYS_FSL_DDR_VER_46
York Sunbe735532016-12-28 08:43:43 -0800287 select SYS_FSL_ERRATUM_A005125
York Sun097e3602016-12-28 08:43:42 -0800288 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800289 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800290 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800291 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800292 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800293 select SYS_FSL_SEC_COMPAT_6
York Sun85ab6f02016-12-28 08:43:29 -0800294 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530295 select FSL_IFC
Tom Rini00448d22017-07-28 21:31:42 -0400296 imply CMD_NAND
Simon Glassc88a09a2017-08-04 16:34:34 -0600297 imply CMD_PCI
Christophe Leroye538bbc2017-08-04 16:34:40 -0600298 imply CMD_REGINFO
York Sun4119aee2016-11-15 18:44:22 -0800299
York Sun5557d6b2016-11-16 11:06:47 -0800300config ARCH_MPC8536
301 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800302 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800303 select SYS_FSL_ERRATUM_A004508
304 select SYS_FSL_ERRATUM_A005125
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800305 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800306 select SYS_FSL_HAS_DDR2
307 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800308 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800309 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800310 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800311 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530312 select FSL_ELBC
Tom Rini00448d22017-07-28 21:31:42 -0400313 imply CMD_NAND
Simon Glass203b3ab2017-06-14 21:28:24 -0600314 imply CMD_SATA
Christophe Leroye538bbc2017-08-04 16:34:40 -0600315 imply CMD_REGINFO
York Sun5557d6b2016-11-16 11:06:47 -0800316
York Sun5ddce892016-11-16 11:13:06 -0800317config ARCH_MPC8540
318 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800319 select FSL_LAW
York Sund297d392016-12-28 08:43:40 -0800320 select SYS_FSL_HAS_DDR1
York Sun5ddce892016-11-16 11:13:06 -0800321
York Sun5ac012a2016-11-15 13:57:15 -0800322config ARCH_MPC8544
323 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800324 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800325 select SYS_FSL_ERRATUM_A005125
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800326 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800327 select SYS_FSL_HAS_DDR2
York Sun92c36e22016-12-28 08:43:30 -0800328 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800329 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800330 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800331 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530332 select FSL_ELBC
York Sun5ac012a2016-11-15 13:57:15 -0800333
York Sunefc49e02016-11-15 13:52:34 -0800334config ARCH_MPC8548
335 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800336 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800337 select SYS_FSL_ERRATUM_A005125
338 select SYS_FSL_ERRATUM_NMG_DDR120
339 select SYS_FSL_ERRATUM_NMG_LBC103
340 select SYS_FSL_ERRATUM_NMG_ETSEC129
341 select SYS_FSL_ERRATUM_I2C_A004447
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800342 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800343 select SYS_FSL_HAS_DDR2
344 select SYS_FSL_HAS_DDR1
York Sun92c36e22016-12-28 08:43:30 -0800345 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800346 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800347 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800348 select SYS_PPC_E500_USE_DEBUG_TLB
Christophe Leroye538bbc2017-08-04 16:34:40 -0600349 imply CMD_REGINFO
York Sunefc49e02016-11-15 13:52:34 -0800350
York Sunb4046f42016-11-16 11:26:45 -0800351config ARCH_MPC8560
352 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800353 select FSL_LAW
York Sund297d392016-12-28 08:43:40 -0800354 select SYS_FSL_HAS_DDR1
York Sunb4046f42016-11-16 11:26:45 -0800355
York Sun24f88b32016-11-16 13:08:52 -0800356config ARCH_P1010
357 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800358 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800359 select SYS_FSL_ERRATUM_A004477
360 select SYS_FSL_ERRATUM_A004508
361 select SYS_FSL_ERRATUM_A005125
Chris Packham434f0582018-10-04 20:03:53 +1300362 select SYS_FSL_ERRATUM_A005275
York Sunbe735532016-12-28 08:43:43 -0800363 select SYS_FSL_ERRATUM_A006261
364 select SYS_FSL_ERRATUM_A007075
York Sun097e3602016-12-28 08:43:42 -0800365 select SYS_FSL_ERRATUM_ESDHC111
York Sunbe735532016-12-28 08:43:43 -0800366 select SYS_FSL_ERRATUM_I2C_A004447
367 select SYS_FSL_ERRATUM_IFC_A002769
368 select SYS_FSL_ERRATUM_P1010_A003549
369 select SYS_FSL_ERRATUM_SEC_A003571
370 select SYS_FSL_ERRATUM_IFC_A003399
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800371 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800372 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800373 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800374 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800375 select SYS_FSL_SEC_COMPAT_4
York Sun85ab6f02016-12-28 08:43:29 -0800376 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530377 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600378 imply CMD_EEPROM
Tom Rinic20bb732017-07-22 18:36:16 -0400379 imply CMD_MTDPARTS
Tom Rini00448d22017-07-28 21:31:42 -0400380 imply CMD_NAND
Simon Glass203b3ab2017-06-14 21:28:24 -0600381 imply CMD_SATA
Simon Glassc88a09a2017-08-04 16:34:34 -0600382 imply CMD_PCI
Christophe Leroye538bbc2017-08-04 16:34:40 -0600383 imply CMD_REGINFO
Tuomas Tynkkynen8df5dd32017-12-08 15:36:17 +0200384 imply FSL_SATA
York Sun24f88b32016-11-16 13:08:52 -0800385
York Sun3680e592016-11-16 15:54:15 -0800386config ARCH_P1011
387 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800388 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800389 select SYS_FSL_ERRATUM_A004508
390 select SYS_FSL_ERRATUM_A005125
391 select SYS_FSL_ERRATUM_ELBC_A001
York Sun097e3602016-12-28 08:43:42 -0800392 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiangdeb47f52019-05-22 22:46:03 +0800393 select FSL_PCIE_DISABLE_ASPM
York Sund297d392016-12-28 08:43:40 -0800394 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800395 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800396 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800397 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800398 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530399 select FSL_ELBC
York Sun3680e592016-11-16 15:54:15 -0800400
York Sunaf2dc812016-11-18 10:02:14 -0800401config ARCH_P1020
402 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800403 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800404 select SYS_FSL_ERRATUM_A004508
405 select SYS_FSL_ERRATUM_A005125
406 select SYS_FSL_ERRATUM_ELBC_A001
York Sun097e3602016-12-28 08:43:42 -0800407 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiangdeb47f52019-05-22 22:46:03 +0800408 select FSL_PCIE_DISABLE_ASPM
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800409 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800410 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800411 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800412 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800413 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800414 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530415 select FSL_ELBC
Tom Rini00448d22017-07-28 21:31:42 -0400416 imply CMD_NAND
Simon Glass203b3ab2017-06-14 21:28:24 -0600417 imply CMD_SATA
Simon Glassc88a09a2017-08-04 16:34:34 -0600418 imply CMD_PCI
Christophe Leroye538bbc2017-08-04 16:34:40 -0600419 imply CMD_REGINFO
Tuomas Tynkkynen104a5372017-12-08 15:36:14 +0200420 imply SATA_SIL
York Sunaf2dc812016-11-18 10:02:14 -0800421
York Sun2f924be2016-11-18 10:59:02 -0800422config ARCH_P1021
423 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800424 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800425 select SYS_FSL_ERRATUM_A004508
426 select SYS_FSL_ERRATUM_A005125
427 select SYS_FSL_ERRATUM_ELBC_A001
York Sun097e3602016-12-28 08:43:42 -0800428 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiangdeb47f52019-05-22 22:46:03 +0800429 select FSL_PCIE_DISABLE_ASPM
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800430 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800431 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800432 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800433 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800434 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800435 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530436 select FSL_ELBC
Christophe Leroye538bbc2017-08-04 16:34:40 -0600437 imply CMD_REGINFO
Tom Rini00448d22017-07-28 21:31:42 -0400438 imply CMD_NAND
Simon Glass203b3ab2017-06-14 21:28:24 -0600439 imply CMD_SATA
Christophe Leroye538bbc2017-08-04 16:34:40 -0600440 imply CMD_REGINFO
Tuomas Tynkkynen104a5372017-12-08 15:36:14 +0200441 imply SATA_SIL
York Sun2f924be2016-11-18 10:59:02 -0800442
York Sunfeeaae22016-11-16 15:45:31 -0800443config ARCH_P1023
444 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800445 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800446 select SYS_FSL_ERRATUM_A004508
447 select SYS_FSL_ERRATUM_A005125
448 select SYS_FSL_ERRATUM_I2C_A004447
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800449 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800450 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800451 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800452 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800453 select SYS_FSL_SEC_COMPAT_4
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530454 select FSL_ELBC
York Sunfeeaae22016-11-16 15:45:31 -0800455
York Sun76780b22016-11-18 11:00:57 -0800456config ARCH_P1024
457 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800458 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800459 select SYS_FSL_ERRATUM_A004508
460 select SYS_FSL_ERRATUM_A005125
461 select SYS_FSL_ERRATUM_ELBC_A001
York Sun097e3602016-12-28 08:43:42 -0800462 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiangdeb47f52019-05-22 22:46:03 +0800463 select FSL_PCIE_DISABLE_ASPM
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800464 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800465 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800466 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800467 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800468 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800469 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530470 select FSL_ELBC
Simon Glass4590d4e2017-05-17 03:25:10 -0600471 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400472 imply CMD_NAND
Simon Glass203b3ab2017-06-14 21:28:24 -0600473 imply CMD_SATA
Simon Glassc88a09a2017-08-04 16:34:34 -0600474 imply CMD_PCI
Christophe Leroye538bbc2017-08-04 16:34:40 -0600475 imply CMD_REGINFO
Tuomas Tynkkynen104a5372017-12-08 15:36:14 +0200476 imply SATA_SIL
York Sun76780b22016-11-18 11:00:57 -0800477
York Sun0f577972016-11-18 11:05:38 -0800478config ARCH_P1025
479 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800480 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800481 select SYS_FSL_ERRATUM_A004508
482 select SYS_FSL_ERRATUM_A005125
483 select SYS_FSL_ERRATUM_ELBC_A001
York Sun097e3602016-12-28 08:43:42 -0800484 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiangdeb47f52019-05-22 22:46:03 +0800485 select FSL_PCIE_DISABLE_ASPM
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800486 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800487 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800488 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800489 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800490 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800491 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530492 select FSL_ELBC
Simon Glass203b3ab2017-06-14 21:28:24 -0600493 imply CMD_SATA
Christophe Leroye538bbc2017-08-04 16:34:40 -0600494 imply CMD_REGINFO
York Sun0f577972016-11-18 11:05:38 -0800495
York Sun4b08dd72016-11-18 11:08:43 -0800496config ARCH_P2020
497 bool
York Sune7a6eaf2016-12-02 10:44:34 -0800498 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800499 select SYS_FSL_ERRATUM_A004477
500 select SYS_FSL_ERRATUM_A004508
501 select SYS_FSL_ERRATUM_A005125
York Sun097e3602016-12-28 08:43:42 -0800502 select SYS_FSL_ERRATUM_ESDHC111
503 select SYS_FSL_ERRATUM_ESDHC_A001
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800504 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800505 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800506 select SYS_FSL_HAS_SEC
York Sunfa4199422016-12-28 08:43:31 -0800507 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800508 select SYS_FSL_SEC_COMPAT_2
York Sun85ab6f02016-12-28 08:43:29 -0800509 select SYS_PPC_E500_USE_DEBUG_TLB
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530510 select FSL_ELBC
Simon Glass4590d4e2017-05-17 03:25:10 -0600511 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400512 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600513 imply CMD_REGINFO
York Sun4b08dd72016-11-18 11:08:43 -0800514
York Sun5786fca2016-11-18 11:15:21 -0800515config ARCH_P2041
516 bool
York Sunaf5495a2016-12-28 08:43:27 -0800517 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800518 select FSL_LAW
York Sunbe735532016-12-28 08:43:43 -0800519 select SYS_FSL_ERRATUM_A004510
520 select SYS_FSL_ERRATUM_A004849
Chris Packham434f0582018-10-04 20:03:53 +1300521 select SYS_FSL_ERRATUM_A005275
York Sunbe735532016-12-28 08:43:43 -0800522 select SYS_FSL_ERRATUM_A006261
523 select SYS_FSL_ERRATUM_CPU_A003999
524 select SYS_FSL_ERRATUM_DDR_A003
525 select SYS_FSL_ERRATUM_DDR_A003474
York Sun097e3602016-12-28 08:43:42 -0800526 select SYS_FSL_ERRATUM_ESDHC111
York Sunbe735532016-12-28 08:43:43 -0800527 select SYS_FSL_ERRATUM_I2C_A004447
528 select SYS_FSL_ERRATUM_NMG_CPU_A011
529 select SYS_FSL_ERRATUM_SRIO_A004034
530 select SYS_FSL_ERRATUM_USB14
York Sund297d392016-12-28 08:43:40 -0800531 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800532 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800533 select SYS_FSL_QORIQ_CHASSIS1
York Sunfa4199422016-12-28 08:43:31 -0800534 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800535 select SYS_FSL_SEC_COMPAT_4
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530536 select FSL_ELBC
Tom Rini00448d22017-07-28 21:31:42 -0400537 imply CMD_NAND
York Sun5786fca2016-11-18 11:15:21 -0800538
York Sundf70d062016-11-18 11:20:40 -0800539config ARCH_P3041
540 bool
York Sunaf5495a2016-12-28 08:43:27 -0800541 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800542 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800543 select SYS_FSL_DDR_VER_44
York Sunbe735532016-12-28 08:43:43 -0800544 select SYS_FSL_ERRATUM_A004510
545 select SYS_FSL_ERRATUM_A004849
Chris Packham434f0582018-10-04 20:03:53 +1300546 select SYS_FSL_ERRATUM_A005275
York Sunbe735532016-12-28 08:43:43 -0800547 select SYS_FSL_ERRATUM_A005812
548 select SYS_FSL_ERRATUM_A006261
549 select SYS_FSL_ERRATUM_CPU_A003999
550 select SYS_FSL_ERRATUM_DDR_A003
551 select SYS_FSL_ERRATUM_DDR_A003474
York Sun097e3602016-12-28 08:43:42 -0800552 select SYS_FSL_ERRATUM_ESDHC111
York Sunbe735532016-12-28 08:43:43 -0800553 select SYS_FSL_ERRATUM_I2C_A004447
554 select SYS_FSL_ERRATUM_NMG_CPU_A011
555 select SYS_FSL_ERRATUM_SRIO_A004034
556 select SYS_FSL_ERRATUM_USB14
York Sund297d392016-12-28 08:43:40 -0800557 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800558 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800559 select SYS_FSL_QORIQ_CHASSIS1
York Sunfa4199422016-12-28 08:43:31 -0800560 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800561 select SYS_FSL_SEC_COMPAT_4
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530562 select FSL_ELBC
Tom Rini00448d22017-07-28 21:31:42 -0400563 imply CMD_NAND
Simon Glass203b3ab2017-06-14 21:28:24 -0600564 imply CMD_SATA
Christophe Leroye538bbc2017-08-04 16:34:40 -0600565 imply CMD_REGINFO
Tuomas Tynkkynen8df5dd32017-12-08 15:36:17 +0200566 imply FSL_SATA
York Sundf70d062016-11-18 11:20:40 -0800567
York Sun84be8a92016-11-18 11:24:40 -0800568config ARCH_P4080
569 bool
York Sunaf5495a2016-12-28 08:43:27 -0800570 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800571 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800572 select SYS_FSL_DDR_VER_44
York Sunbe735532016-12-28 08:43:43 -0800573 select SYS_FSL_ERRATUM_A004510
574 select SYS_FSL_ERRATUM_A004580
575 select SYS_FSL_ERRATUM_A004849
576 select SYS_FSL_ERRATUM_A005812
577 select SYS_FSL_ERRATUM_A007075
578 select SYS_FSL_ERRATUM_CPC_A002
579 select SYS_FSL_ERRATUM_CPC_A003
580 select SYS_FSL_ERRATUM_CPU_A003999
581 select SYS_FSL_ERRATUM_DDR_A003
582 select SYS_FSL_ERRATUM_DDR_A003474
583 select SYS_FSL_ERRATUM_ELBC_A001
York Sun097e3602016-12-28 08:43:42 -0800584 select SYS_FSL_ERRATUM_ESDHC111
585 select SYS_FSL_ERRATUM_ESDHC13
586 select SYS_FSL_ERRATUM_ESDHC135
York Sunbe735532016-12-28 08:43:43 -0800587 select SYS_FSL_ERRATUM_I2C_A004447
588 select SYS_FSL_ERRATUM_NMG_CPU_A011
589 select SYS_FSL_ERRATUM_SRIO_A004034
590 select SYS_P4080_ERRATUM_CPU22
591 select SYS_P4080_ERRATUM_PCIE_A003
592 select SYS_P4080_ERRATUM_SERDES8
593 select SYS_P4080_ERRATUM_SERDES9
594 select SYS_P4080_ERRATUM_SERDES_A001
595 select SYS_P4080_ERRATUM_SERDES_A005
York Sund297d392016-12-28 08:43:40 -0800596 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800597 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800598 select SYS_FSL_QORIQ_CHASSIS1
York Sunfa4199422016-12-28 08:43:31 -0800599 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800600 select SYS_FSL_SEC_COMPAT_4
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530601 select FSL_ELBC
Simon Glass203b3ab2017-06-14 21:28:24 -0600602 imply CMD_SATA
Christophe Leroye538bbc2017-08-04 16:34:40 -0600603 imply CMD_REGINFO
Tuomas Tynkkynen104a5372017-12-08 15:36:14 +0200604 imply SATA_SIL
York Sun84be8a92016-11-18 11:24:40 -0800605
York Suna3c5b662016-11-18 11:39:36 -0800606config ARCH_P5040
607 bool
York Sunaf5495a2016-12-28 08:43:27 -0800608 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800609 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800610 select SYS_FSL_DDR_VER_44
York Sunbe735532016-12-28 08:43:43 -0800611 select SYS_FSL_ERRATUM_A004510
612 select SYS_FSL_ERRATUM_A004699
Chris Packham434f0582018-10-04 20:03:53 +1300613 select SYS_FSL_ERRATUM_A005275
York Sunbe735532016-12-28 08:43:43 -0800614 select SYS_FSL_ERRATUM_A005812
615 select SYS_FSL_ERRATUM_A006261
616 select SYS_FSL_ERRATUM_DDR_A003
617 select SYS_FSL_ERRATUM_DDR_A003474
York Sun097e3602016-12-28 08:43:42 -0800618 select SYS_FSL_ERRATUM_ESDHC111
York Sunbe735532016-12-28 08:43:43 -0800619 select SYS_FSL_ERRATUM_USB14
York Sund297d392016-12-28 08:43:40 -0800620 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800621 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800622 select SYS_FSL_QORIQ_CHASSIS1
York Sunfa4199422016-12-28 08:43:31 -0800623 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800624 select SYS_FSL_SEC_COMPAT_4
York Sun7eafac12016-12-28 08:43:50 -0800625 select SYS_PPC64
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +0530626 select FSL_ELBC
Simon Glass203b3ab2017-06-14 21:28:24 -0600627 imply CMD_SATA
Christophe Leroye538bbc2017-08-04 16:34:40 -0600628 imply CMD_REGINFO
Tuomas Tynkkynen8df5dd32017-12-08 15:36:17 +0200629 imply FSL_SATA
York Suna3c5b662016-11-18 11:39:36 -0800630
York Sun51e91e82016-11-18 12:29:51 -0800631config ARCH_QEMU_E500
632 bool
633
York Sun7d29dd62016-11-18 13:01:34 -0800634config ARCH_T1024
635 bool
York Sunaf5495a2016-12-28 08:43:27 -0800636 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800637 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800638 select SYS_FSL_DDR_VER_50
York Sunbe735532016-12-28 08:43:43 -0800639 select SYS_FSL_ERRATUM_A008378
Jaiprakash Singhe230a922020-06-02 12:44:02 +0530640 select SYS_FSL_ERRATUM_A008109
York Sunbe735532016-12-28 08:43:43 -0800641 select SYS_FSL_ERRATUM_A009663
642 select SYS_FSL_ERRATUM_A009942
York Sun097e3602016-12-28 08:43:42 -0800643 select SYS_FSL_ERRATUM_ESDHC111
York Sund297d392016-12-28 08:43:40 -0800644 select SYS_FSL_HAS_DDR3
645 select SYS_FSL_HAS_DDR4
York Sun92c36e22016-12-28 08:43:30 -0800646 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800647 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800648 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800649 select SYS_FSL_SEC_COMPAT_5
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530650 select FSL_IFC
Simon Glass4590d4e2017-05-17 03:25:10 -0600651 imply CMD_EEPROM
Tom Rini00448d22017-07-28 21:31:42 -0400652 imply CMD_NAND
Tom Rinic20bb732017-07-22 18:36:16 -0400653 imply CMD_MTDPARTS
Christophe Leroye538bbc2017-08-04 16:34:40 -0600654 imply CMD_REGINFO
York Sun7d29dd62016-11-18 13:01:34 -0800655
York Suna5b5d882016-11-18 13:11:12 -0800656config ARCH_T1040
657 bool
York Sunaf5495a2016-12-28 08:43:27 -0800658 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800659 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800660 select SYS_FSL_DDR_VER_50
York Sunbe735532016-12-28 08:43:43 -0800661 select SYS_FSL_ERRATUM_A008044
662 select SYS_FSL_ERRATUM_A008378
Joakim Tjernlund477602c2019-11-20 17:07:34 +0100663 select SYS_FSL_ERRATUM_A008109
York Sunbe735532016-12-28 08:43:43 -0800664 select SYS_FSL_ERRATUM_A009663
665 select SYS_FSL_ERRATUM_A009942
York Sun097e3602016-12-28 08:43:42 -0800666 select SYS_FSL_ERRATUM_ESDHC111
York Sund297d392016-12-28 08:43:40 -0800667 select SYS_FSL_HAS_DDR3
668 select SYS_FSL_HAS_DDR4
York Sun92c36e22016-12-28 08:43:30 -0800669 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800670 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800671 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800672 select SYS_FSL_SEC_COMPAT_5
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530673 select FSL_IFC
Tom Rinic20bb732017-07-22 18:36:16 -0400674 imply CMD_MTDPARTS
Tom Rini00448d22017-07-28 21:31:42 -0400675 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600676 imply CMD_REGINFO
York Suna5b5d882016-11-18 13:11:12 -0800677
York Sun2d7b2d42016-11-18 13:36:39 -0800678config ARCH_T1042
679 bool
York Sunaf5495a2016-12-28 08:43:27 -0800680 select E500MC
York Sune7a6eaf2016-12-02 10:44:34 -0800681 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800682 select SYS_FSL_DDR_VER_50
York Sunbe735532016-12-28 08:43:43 -0800683 select SYS_FSL_ERRATUM_A008044
684 select SYS_FSL_ERRATUM_A008378
Joakim Tjernlund477602c2019-11-20 17:07:34 +0100685 select SYS_FSL_ERRATUM_A008109
York Sunbe735532016-12-28 08:43:43 -0800686 select SYS_FSL_ERRATUM_A009663
687 select SYS_FSL_ERRATUM_A009942
York Sun097e3602016-12-28 08:43:42 -0800688 select SYS_FSL_ERRATUM_ESDHC111
York Sund297d392016-12-28 08:43:40 -0800689 select SYS_FSL_HAS_DDR3
690 select SYS_FSL_HAS_DDR4
York Sun92c36e22016-12-28 08:43:30 -0800691 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800692 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800693 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800694 select SYS_FSL_SEC_COMPAT_5
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530695 select FSL_IFC
Tom Rinic20bb732017-07-22 18:36:16 -0400696 imply CMD_MTDPARTS
Tom Rini00448d22017-07-28 21:31:42 -0400697 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600698 imply CMD_REGINFO
York Sun2d7b2d42016-11-18 13:36:39 -0800699
York Sune20c6852016-11-21 12:54:19 -0800700config ARCH_T2080
701 bool
York Sunaf5495a2016-12-28 08:43:27 -0800702 select E500MC
York Sunf4e8a752016-12-28 08:43:48 -0800703 select E6500
York Sune7a6eaf2016-12-02 10:44:34 -0800704 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800705 select SYS_FSL_DDR_VER_47
York Sunbe735532016-12-28 08:43:43 -0800706 select SYS_FSL_ERRATUM_A006379
707 select SYS_FSL_ERRATUM_A006593
708 select SYS_FSL_ERRATUM_A007186
709 select SYS_FSL_ERRATUM_A007212
Tony O'Brien8acb1272016-12-02 09:22:34 +1300710 select SYS_FSL_ERRATUM_A007815
Darwin Dingela56d6c02016-10-25 09:48:01 +1300711 select SYS_FSL_ERRATUM_A007907
Jaiprakash Singhe230a922020-06-02 12:44:02 +0530712 select SYS_FSL_ERRATUM_A008109
York Sunbe735532016-12-28 08:43:43 -0800713 select SYS_FSL_ERRATUM_A009942
York Sun097e3602016-12-28 08:43:42 -0800714 select SYS_FSL_ERRATUM_ESDHC111
Hou Zhiqiang01500f52019-05-23 11:52:44 +0800715 select FSL_PCIE_RESET
York Sund297d392016-12-28 08:43:40 -0800716 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800717 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800718 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800719 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800720 select SYS_FSL_SEC_COMPAT_4
York Sun7eafac12016-12-28 08:43:50 -0800721 select SYS_PPC64
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530722 select FSL_IFC
Peng Ma34bed5d2019-12-23 09:28:12 +0000723 imply CMD_SATA
Tom Rini00448d22017-07-28 21:31:42 -0400724 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600725 imply CMD_REGINFO
Peng Ma34bed5d2019-12-23 09:28:12 +0000726 imply FSL_SATA
York Sune20c6852016-11-21 12:54:19 -0800727
York Sun0fad3262016-11-21 13:35:41 -0800728config ARCH_T4240
729 bool
York Sunaf5495a2016-12-28 08:43:27 -0800730 select E500MC
York Sunf4e8a752016-12-28 08:43:48 -0800731 select E6500
York Sune7a6eaf2016-12-02 10:44:34 -0800732 select FSL_LAW
York Sun4e577972016-12-28 08:43:46 -0800733 select SYS_FSL_DDR_VER_47
York Sunbe735532016-12-28 08:43:43 -0800734 select SYS_FSL_ERRATUM_A004468
735 select SYS_FSL_ERRATUM_A005871
736 select SYS_FSL_ERRATUM_A006261
737 select SYS_FSL_ERRATUM_A006379
738 select SYS_FSL_ERRATUM_A006593
739 select SYS_FSL_ERRATUM_A007186
740 select SYS_FSL_ERRATUM_A007798
Tony O'Brien8acb1272016-12-02 09:22:34 +1300741 select SYS_FSL_ERRATUM_A007815
Darwin Dingela56d6c02016-10-25 09:48:01 +1300742 select SYS_FSL_ERRATUM_A007907
Jaiprakash Singhe230a922020-06-02 12:44:02 +0530743 select SYS_FSL_ERRATUM_A008109
York Sunbe735532016-12-28 08:43:43 -0800744 select SYS_FSL_ERRATUM_A009942
York Sund297d392016-12-28 08:43:40 -0800745 select SYS_FSL_HAS_DDR3
York Sun92c36e22016-12-28 08:43:30 -0800746 select SYS_FSL_HAS_SEC
York Sun0d3b8592016-12-28 08:43:49 -0800747 select SYS_FSL_QORIQ_CHASSIS2
York Sunfa4199422016-12-28 08:43:31 -0800748 select SYS_FSL_SEC_BE
York Sun92c36e22016-12-28 08:43:30 -0800749 select SYS_FSL_SEC_COMPAT_4
York Sun7eafac12016-12-28 08:43:50 -0800750 select SYS_PPC64
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +0530751 select FSL_IFC
Simon Glass203b3ab2017-06-14 21:28:24 -0600752 imply CMD_SATA
Tom Rini00448d22017-07-28 21:31:42 -0400753 imply CMD_NAND
Christophe Leroye538bbc2017-08-04 16:34:40 -0600754 imply CMD_REGINFO
Tuomas Tynkkynen8df5dd32017-12-08 15:36:17 +0200755 imply FSL_SATA
York Sune7a6eaf2016-12-02 10:44:34 -0800756
Jagdish Gediya7f2ad252018-09-03 21:35:10 +0530757config MPC85XX_HAVE_RESET_VECTOR
758 bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc"
759 depends on MPC85xx
760
York Sunaf5495a2016-12-28 08:43:27 -0800761config BOOKE
762 bool
763 default y
764
765config E500
766 bool
767 default y
768 help
769 Enable PowerPC E500 cores, including e500v1, e500v2, e500mc
770
771config E500MC
772 bool
Simon Glassc88a09a2017-08-04 16:34:34 -0600773 imply CMD_PCI
York Sunaf5495a2016-12-28 08:43:27 -0800774 help
775 Enble PowerPC E500MC core
776
York Sunf4e8a752016-12-28 08:43:48 -0800777config E6500
778 bool
779 help
780 Enable PowerPC E6500 core
781
York Sune7a6eaf2016-12-02 10:44:34 -0800782config FSL_LAW
783 bool
784 help
785 Use Freescale common code for Local Access Window
York Sun0fad3262016-11-21 13:35:41 -0800786
Udit Agarwald2dd2f72019-11-07 16:11:39 +0000787config NXP_ESBC
788 bool "NXP_ESBC"
York Sunafa0fd32016-12-02 09:33:14 -0800789 help
790 Enable Freescale Secure Boot feature. Normally selected
791 by defconfig. If unsure, do not change.
792
York Suncbf7bf32016-11-23 12:30:40 -0800793config MAX_CPUS
794 int "Maximum number of CPUs permitted for MPC85xx"
795 default 12 if ARCH_T4240
Tom Rinia7ffa3d2021-05-23 10:58:05 -0400796 default 8 if ARCH_P4080
York Suncbf7bf32016-11-23 12:30:40 -0800797 default 4 if ARCH_B4860 || \
798 ARCH_P2041 || \
799 ARCH_P3041 || \
800 ARCH_P5040 || \
801 ARCH_T1040 || \
802 ARCH_T1042 || \
Tom Rini3ec582b2021-02-20 20:06:21 -0500803 ARCH_T2080
York Suncbf7bf32016-11-23 12:30:40 -0800804 default 2 if ARCH_B4420 || \
805 ARCH_BSC9132 || \
York Suncbf7bf32016-11-23 12:30:40 -0800806 ARCH_P1020 || \
807 ARCH_P1021 || \
York Suncbf7bf32016-11-23 12:30:40 -0800808 ARCH_P1023 || \
809 ARCH_P1024 || \
810 ARCH_P1025 || \
811 ARCH_P2020 || \
York Suncbf7bf32016-11-23 12:30:40 -0800812 ARCH_T1024
813 default 1
814 help
815 Set this number to the maximum number of possible CPUs in the SoC.
816 SoCs may have multiple clusters with each cluster may have multiple
817 ports. If some ports are reserved but higher ports are used for
818 cores, count the reserved ports. This will allocate enough memory
819 in spin table to properly handle all cores.
820
York Sun7ea6f352016-12-01 13:26:06 -0800821config SYS_CCSRBAR_DEFAULT
822 hex "Default CCSRBAR address"
823 default 0xff700000 if ARCH_BSC9131 || \
824 ARCH_BSC9132 || \
825 ARCH_C29X || \
826 ARCH_MPC8536 || \
827 ARCH_MPC8540 || \
York Sun7ea6f352016-12-01 13:26:06 -0800828 ARCH_MPC8544 || \
829 ARCH_MPC8548 || \
York Sun7ea6f352016-12-01 13:26:06 -0800830 ARCH_MPC8560 || \
York Sun7ea6f352016-12-01 13:26:06 -0800831 ARCH_P1010 || \
832 ARCH_P1011 || \
833 ARCH_P1020 || \
834 ARCH_P1021 || \
York Sun7ea6f352016-12-01 13:26:06 -0800835 ARCH_P1024 || \
836 ARCH_P1025 || \
837 ARCH_P2020
838 default 0xff600000 if ARCH_P1023
839 default 0xfe000000 if ARCH_B4420 || \
840 ARCH_B4860 || \
841 ARCH_P2041 || \
842 ARCH_P3041 || \
843 ARCH_P4080 || \
York Sun7ea6f352016-12-01 13:26:06 -0800844 ARCH_P5040 || \
York Sun7ea6f352016-12-01 13:26:06 -0800845 ARCH_T1024 || \
846 ARCH_T1040 || \
847 ARCH_T1042 || \
848 ARCH_T2080 || \
York Sun7ea6f352016-12-01 13:26:06 -0800849 ARCH_T4240
850 default 0xe0000000 if ARCH_QEMU_E500
851 help
852 Default value of CCSRBAR comes from power-on-reset. It
853 is fixed on each SoC. Some SoCs can have different value
854 if changed by pre-boot regime. The value here must match
855 the current value in SoC. If not sure, do not change.
856
York Sunbe735532016-12-28 08:43:43 -0800857config SYS_FSL_ERRATUM_A004468
858 bool
859
860config SYS_FSL_ERRATUM_A004477
861 bool
862
863config SYS_FSL_ERRATUM_A004508
864 bool
865
866config SYS_FSL_ERRATUM_A004580
867 bool
868
869config SYS_FSL_ERRATUM_A004699
870 bool
871
872config SYS_FSL_ERRATUM_A004849
873 bool
874
875config SYS_FSL_ERRATUM_A004510
876 bool
877
878config SYS_FSL_ERRATUM_A004510_SVR_REV
879 hex
880 depends on SYS_FSL_ERRATUM_A004510
881 default 0x20 if ARCH_P4080
882 default 0x10
883
884config SYS_FSL_ERRATUM_A004510_SVR_REV2
885 hex
886 depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041))
887 default 0x11
888
889config SYS_FSL_ERRATUM_A005125
890 bool
891
892config SYS_FSL_ERRATUM_A005434
893 bool
894
895config SYS_FSL_ERRATUM_A005812
896 bool
897
898config SYS_FSL_ERRATUM_A005871
899 bool
900
Chris Packham434f0582018-10-04 20:03:53 +1300901config SYS_FSL_ERRATUM_A005275
902 bool
903
York Sunbe735532016-12-28 08:43:43 -0800904config SYS_FSL_ERRATUM_A006261
905 bool
906
907config SYS_FSL_ERRATUM_A006379
908 bool
909
910config SYS_FSL_ERRATUM_A006384
911 bool
912
913config SYS_FSL_ERRATUM_A006475
914 bool
915
916config SYS_FSL_ERRATUM_A006593
917 bool
918
919config SYS_FSL_ERRATUM_A007075
920 bool
921
922config SYS_FSL_ERRATUM_A007186
923 bool
924
925config SYS_FSL_ERRATUM_A007212
926 bool
927
Tony O'Brien8acb1272016-12-02 09:22:34 +1300928config SYS_FSL_ERRATUM_A007815
929 bool
930
York Sunbe735532016-12-28 08:43:43 -0800931config SYS_FSL_ERRATUM_A007798
932 bool
933
Darwin Dingela56d6c02016-10-25 09:48:01 +1300934config SYS_FSL_ERRATUM_A007907
935 bool
936
York Sunbe735532016-12-28 08:43:43 -0800937config SYS_FSL_ERRATUM_A008044
938 bool
939
940config SYS_FSL_ERRATUM_CPC_A002
941 bool
942
943config SYS_FSL_ERRATUM_CPC_A003
944 bool
945
946config SYS_FSL_ERRATUM_CPU_A003999
947 bool
948
949config SYS_FSL_ERRATUM_ELBC_A001
950 bool
951
952config SYS_FSL_ERRATUM_I2C_A004447
953 bool
954
955config SYS_FSL_A004447_SVR_REV
956 hex
957 depends on SYS_FSL_ERRATUM_I2C_A004447
958 default 0x00 if ARCH_MPC8548
959 default 0x10 if ARCH_P1010
960 default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132
Tom Rini30900822021-02-20 20:06:30 -0500961 default 0x20 if ARCH_P3041 || ARCH_P4080
York Sunbe735532016-12-28 08:43:43 -0800962
963config SYS_FSL_ERRATUM_IFC_A002769
964 bool
965
966config SYS_FSL_ERRATUM_IFC_A003399
967 bool
968
969config SYS_FSL_ERRATUM_NMG_CPU_A011
970 bool
971
972config SYS_FSL_ERRATUM_NMG_ETSEC129
973 bool
974
975config SYS_FSL_ERRATUM_NMG_LBC103
976 bool
977
978config SYS_FSL_ERRATUM_P1010_A003549
979 bool
980
981config SYS_FSL_ERRATUM_SATA_A001
982 bool
983
984config SYS_FSL_ERRATUM_SEC_A003571
985 bool
986
987config SYS_FSL_ERRATUM_SRIO_A004034
988 bool
989
990config SYS_FSL_ERRATUM_USB14
991 bool
992
993config SYS_P4080_ERRATUM_CPU22
994 bool
995
996config SYS_P4080_ERRATUM_PCIE_A003
997 bool
998
999config SYS_P4080_ERRATUM_SERDES8
1000 bool
1001
1002config SYS_P4080_ERRATUM_SERDES9
1003 bool
1004
1005config SYS_P4080_ERRATUM_SERDES_A001
1006 bool
1007
1008config SYS_P4080_ERRATUM_SERDES_A005
1009 bool
1010
Hou Zhiqiangdeb47f52019-05-22 22:46:03 +08001011config FSL_PCIE_DISABLE_ASPM
1012 bool
1013
Hou Zhiqiang01500f52019-05-23 11:52:44 +08001014config FSL_PCIE_RESET
1015 bool
1016
York Sun0d3b8592016-12-28 08:43:49 -08001017config SYS_FSL_QORIQ_CHASSIS1
1018 bool
1019
1020config SYS_FSL_QORIQ_CHASSIS2
1021 bool
1022
York Sun091e5e52016-12-01 14:05:02 -08001023config SYS_FSL_NUM_LAWS
1024 int "Number of local access windows"
1025 depends on FSL_LAW
1026 default 32 if ARCH_B4420 || \
1027 ARCH_B4860 || \
1028 ARCH_P2041 || \
1029 ARCH_P3041 || \
1030 ARCH_P4080 || \
York Sun091e5e52016-12-01 14:05:02 -08001031 ARCH_P5040 || \
1032 ARCH_T2080 || \
York Sun091e5e52016-12-01 14:05:02 -08001033 ARCH_T4240
Tom Rinib4e60262021-05-14 21:34:22 -04001034 default 16 if ARCH_T1024 || \
York Sun091e5e52016-12-01 14:05:02 -08001035 ARCH_T1040 || \
1036 ARCH_T1042
1037 default 12 if ARCH_BSC9131 || \
1038 ARCH_BSC9132 || \
1039 ARCH_C29X || \
1040 ARCH_MPC8536 || \
York Sun091e5e52016-12-01 14:05:02 -08001041 ARCH_P1010 || \
1042 ARCH_P1011 || \
1043 ARCH_P1020 || \
1044 ARCH_P1021 || \
York Sun091e5e52016-12-01 14:05:02 -08001045 ARCH_P1023 || \
1046 ARCH_P1024 || \
1047 ARCH_P1025 || \
1048 ARCH_P2020
1049 default 10 if ARCH_MPC8544 || \
Tom Rini31f56052021-05-14 21:34:23 -04001050 ARCH_MPC8548
York Sun091e5e52016-12-01 14:05:02 -08001051 default 8 if ARCH_MPC8540 || \
York Sun091e5e52016-12-01 14:05:02 -08001052 ARCH_MPC8560
1053 help
1054 Number of local access windows. This is fixed per SoC.
1055 If not sure, do not change.
1056
York Sunf4e8a752016-12-28 08:43:48 -08001057config SYS_FSL_THREADS_PER_CORE
1058 int
1059 default 2 if E6500
1060 default 1
1061
York Sun14e098d2016-12-28 08:43:28 -08001062config SYS_NUM_TLBCAMS
1063 int "Number of TLB CAM entries"
1064 default 64 if E500MC
1065 default 16
1066 help
1067 Number of TLB CAM entries for Book-E chips. 64 for E500MC,
1068 16 for other E500 SoCs.
1069
York Sun7eafac12016-12-28 08:43:50 -08001070config SYS_PPC64
1071 bool
1072
York Sun85ab6f02016-12-28 08:43:29 -08001073config SYS_PPC_E500_USE_DEBUG_TLB
1074 bool
1075
Prabhakar Kushwahab0f8bae2017-02-02 15:01:13 +05301076config FSL_IFC
1077 bool
1078
Prabhakar Kushwaha4c6be552017-02-02 15:01:48 +05301079config FSL_ELBC
1080 bool
1081
York Sun85ab6f02016-12-28 08:43:29 -08001082config SYS_PPC_E500_DEBUG_TLB
1083 int "Temporary TLB entry for external debugger"
1084 depends on SYS_PPC_E500_USE_DEBUG_TLB
1085 default 0 if ARCH_MPC8544 || ARCH_MPC8548
1086 default 1 if ARCH_MPC8536
Tom Rinie1ef7082021-05-14 21:34:25 -04001087 default 2 if ARCH_P1011 || \
York Sun85ab6f02016-12-28 08:43:29 -08001088 ARCH_P1020 || \
1089 ARCH_P1021 || \
York Sun85ab6f02016-12-28 08:43:29 -08001090 ARCH_P1024 || \
1091 ARCH_P1025 || \
1092 ARCH_P2020
1093 default 3 if ARCH_P1010 || \
1094 ARCH_BSC9132 || \
1095 ARCH_C29X
1096 help
1097 Select a temporary TLB entry to be used during boot to work
1098 around limitations in e500v1 and e500v2 external debugger
1099 support. This reduces the portions of the boot code where
1100 breakpoints and single stepping do not work. The value of this
1101 symbol should be set to the TLB1 entry to be used for this
1102 purpose. If unsure, do not change.
1103
Prabhakar Kushwaha3c48f582017-02-02 15:01:26 +05301104config SYS_FSL_IFC_CLK_DIV
1105 int "Divider of platform clock"
1106 depends on FSL_IFC
1107 default 2 if ARCH_B4420 || \
1108 ARCH_B4860 || \
1109 ARCH_T1024 || \
Prabhakar Kushwaha3c48f582017-02-02 15:01:26 +05301110 ARCH_T1040 || \
1111 ARCH_T1042 || \
Prabhakar Kushwaha3c48f582017-02-02 15:01:26 +05301112 ARCH_T4240
1113 default 1
1114 help
1115 Defines divider of platform clock(clock input to
1116 IFC controller).
1117
Prabhakar Kushwahabedc5622017-02-02 15:02:00 +05301118config SYS_FSL_LBC_CLK_DIV
1119 int "Divider of platform clock"
1120 depends on FSL_ELBC || ARCH_MPC8540 || \
Tom Rini7707c552021-05-14 21:34:20 -04001121 ARCH_MPC8548 || \
Tom Rini31f56052021-05-14 21:34:23 -04001122 ARCH_MPC8560
Prabhakar Kushwahabedc5622017-02-02 15:02:00 +05301123
1124 default 2 if ARCH_P2041 || \
1125 ARCH_P3041 || \
1126 ARCH_P4080 || \
Prabhakar Kushwahabedc5622017-02-02 15:02:00 +05301127 ARCH_P5040
1128 default 1
1129
1130 help
1131 Defines divider of platform clock(clock input to
1132 eLBC controller).
1133
Rajesh Bhagat6d072982021-02-15 09:46:14 +01001134config FSL_VIA
1135 bool
1136
Bin Meng2076d992021-02-25 17:22:58 +08001137source "board/emulation/qemu-ppce500/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001138source "board/freescale/corenet_ds/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001139source "board/freescale/mpc8548cds/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001140source "board/freescale/p1010rdb/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001141source "board/freescale/p1_p2_rdb_pc/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001142source "board/freescale/p2041rdb/Kconfig"
Shengzhou Liu49912402014-11-24 17:11:56 +08001143source "board/freescale/t102xrdb/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001144source "board/freescale/t104xrdb/Kconfig"
1145source "board/freescale/t208xqds/Kconfig"
1146source "board/freescale/t208xrdb/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001147source "board/freescale/t4rdb/Kconfig"
Pascal Linder305329f2019-06-18 13:27:47 +02001148source "board/keymile/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001149source "board/socrates/Kconfig"
Oleksandr G Zhadan19ac6882015-04-29 16:57:39 -04001150source "board/Arcturus/ucp1020/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +09001151
1152endmenu