ddr: Rework errata A008109, A008378, 009942 workaround
Move errata A008109, A008378, 009942 workaround implementation from
compute_fsl_memctl_config_regs() to fsl_ddr_set_memctl_regs()
and add register write after each workaround implementation.
Signed-off-by: Jaiprakash Singh <Jaiprakash.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 5bd69d5..285cc56 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -996,6 +996,7 @@
select FSL_LAW
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
@@ -1016,6 +1017,7 @@
select FSL_LAW
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
@@ -1091,6 +1093,7 @@
select SYS_FSL_ERRATUM_A007212
select SYS_FSL_ERRATUM_A007815
select SYS_FSL_ERRATUM_A007907
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
select FSL_PCIE_RESET
@@ -1169,6 +1172,7 @@
select SYS_FSL_ERRATUM_A007798
select SYS_FSL_ERRATUM_A007815
select SYS_FSL_ERRATUM_A007907
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_SEC