blob: 0c96506b5fbeb0316cd02f16c09d456b2170f73f [file] [log] [blame]
Martyn Welch0a14bac2018-12-11 11:34:46 +00001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2018 Collabora Ltd.
4 *
5 * Based on include/configs/xpress.h:
6 * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
7 */
8#ifndef __PCL063_H
9#define __PCL063_H
10
11#include <linux/sizes.h>
12#include "mx6_common.h"
13
Martyn Welch0a14bac2018-12-11 11:34:46 +000014/*
15 * There is a bug in some i.MX6UL processors that results in the initial
16 * portion of OCRAM being unavailable when booting from (at least) an SD
17 * card.
18 *
19 * Tweak the SPL text base address to avoid this.
20 */
Martyn Welch0a14bac2018-12-11 11:34:46 +000021
Tom Rini376b88a2022-10-28 20:27:13 -040022#define CFG_SYS_FSL_USDHC_NUM 1
Parthiban Nallathambic4669382019-04-10 16:35:32 +020023
Martyn Welch0a14bac2018-12-11 11:34:46 +000024/* Console configs */
Tom Rinia17aa192022-12-04 10:04:55 -050025#define CFG_MXC_UART_BASE UART1_BASE
Martyn Welch0a14bac2018-12-11 11:34:46 +000026
27/* MMC Configs */
Martyn Welch0a14bac2018-12-11 11:34:46 +000028
Tom Rini376b88a2022-10-28 20:27:13 -040029#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
Martyn Welch0a14bac2018-12-11 11:34:46 +000030
31/* Miscellaneous configurable options */
Martyn Welch0a14bac2018-12-11 11:34:46 +000032
Martyn Welch0a14bac2018-12-11 11:34:46 +000033/* Physical Memory Map */
34#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
35#define PHYS_SDRAM_SIZE SZ_256M
36
Tom Rinibb4dd962022-11-16 13:10:37 -050037#define CFG_SYS_SDRAM_BASE PHYS_SDRAM
Tom Rini6a5dccc2022-11-16 13:10:41 -050038#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
39#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
Martyn Welch0a14bac2018-12-11 11:34:46 +000040
Martyn Welch0a14bac2018-12-11 11:34:46 +000041/* NAND */
Tom Rinib4213492022-11-12 17:36:51 -050042#define CFG_SYS_NAND_BASE 0x40000000
Martyn Welch0a14bac2018-12-11 11:34:46 +000043
Tom Rinic9edebe2022-12-04 10:03:50 -050044#define CFG_EXTRA_ENV_SETTINGS \
Martyn Welch0a14bac2018-12-11 11:34:46 +000045 "console=ttymxc0,115200n8\0" \
Martyn Welch0a14bac2018-12-11 11:34:46 +000046 "fdt_addr_r=0x82000000\0" \
47 "fdt_high=0xffffffff\0" \
48 "initrd_high=0xffffffff\0" \
49 "kernel_addr_r=0x81000000\0" \
50 "pxefile_addr_r=0x87100000\0" \
51 "ramdisk_addr_r=0x82100000\0" \
52 "scriptaddr=0x87000000\0" \
53 BOOTENV
54
55#define BOOT_TARGET_DEVICES(func) \
56 func(MMC, mmc, 0) \
Pali Rohárdd54f6c2022-05-31 10:32:36 +020057 func(UBIFS, ubifs, 0, UBI, boot) \
Martyn Welch0a14bac2018-12-11 11:34:46 +000058 func(PXE, pxe, na) \
59 func(DHCP, dhcp, na)
60
61#include <config_distro_bootcmd.h>
62
63#endif /* __PCL063_H */