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Stefan Roese42fbddd2006-09-07 11:51:23 +02001/*
Stefan Roesea9e665e2008-04-08 10:31:00 +02002 * (C) Copyright 2006-2008
Stefan Roese42fbddd2006-09-07 11:51:23 +02003 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20
21#include <common.h>
22#include <nand.h>
Stefan Roese897a4502008-01-05 16:49:37 +010023#include <asm/io.h>
Stefan Roese42fbddd2006-09-07 11:51:23 +020024
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020025static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
Stefan Roese39013542007-06-01 15:23:04 +020026
Scott Woodb72e9622012-01-11 15:41:01 -060027#define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
28 CONFIG_SYS_NAND_ECCSIZE)
29#define ECCTOTAL (ECCSTEPS * CONFIG_SYS_NAND_ECCBYTES)
30
31
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020032#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
Stefan Roesea9e665e2008-04-08 10:31:00 +020033/*
34 * NAND command for small page NAND devices (512)
35 */
Stefan Roese39013542007-06-01 15:23:04 +020036static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
Stefan Roese42fbddd2006-09-07 11:51:23 +020037{
Wolfgang Denk4df0da52006-10-09 00:42:01 +020038 struct nand_chip *this = mtd->priv;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020039 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
Stefan Roese39013542007-06-01 15:23:04 +020040
Stefan Roese1fb84412011-05-16 13:04:00 +020041 while (!this->dev_ready(mtd))
42 ;
Stefan Roese42fbddd2006-09-07 11:51:23 +020043
44 /* Begin command latch cycle */
Scott Woodd2a5bb92008-08-05 11:15:59 -050045 this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Stefan Roese42fbddd2006-09-07 11:51:23 +020046 /* Set ALE and clear CLE to start address cycle */
Stefan Roese42fbddd2006-09-07 11:51:23 +020047 /* Column address */
Scott Woodd2a5bb92008-08-05 11:15:59 -050048 this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
Scott Wood13f222a2009-06-24 17:23:49 -050049 this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
50 this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
51 NAND_CTRL_ALE); /* A[24:17] */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020052#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
Stefan Roese42fbddd2006-09-07 11:51:23 +020053 /* One more address cycle for devices > 32MiB */
Scott Wood13f222a2009-06-24 17:23:49 -050054 this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
55 NAND_CTRL_ALE); /* A[28:25] */
Stefan Roese42fbddd2006-09-07 11:51:23 +020056#endif
57 /* Latch in address */
Stefan Roese897a4502008-01-05 16:49:37 +010058 this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Stefan Roese42fbddd2006-09-07 11:51:23 +020059
60 /*
61 * Wait a while for the data to be ready
62 */
Stefan Roese71c72692011-05-04 11:44:14 +020063 while (!this->dev_ready(mtd))
64 ;
Stefan Roese42fbddd2006-09-07 11:51:23 +020065
Stefan Roese39013542007-06-01 15:23:04 +020066 return 0;
67}
Stefan Roesea9e665e2008-04-08 10:31:00 +020068#else
69/*
70 * NAND command for large page NAND devices (2k)
71 */
72static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
73{
74 struct nand_chip *this = mtd->priv;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020075 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
Alex Watermanea72c1b2011-05-04 09:10:15 -040076 void (*hwctrl)(struct mtd_info *mtd, int cmd,
77 unsigned int ctrl) = this->cmd_ctrl;
Stefan Roesea9e665e2008-04-08 10:31:00 +020078
Stefan Roese71c72692011-05-04 11:44:14 +020079 while (!this->dev_ready(mtd))
80 ;
Stefan Roesea9e665e2008-04-08 10:31:00 +020081
82 /* Emulate NAND_CMD_READOOB */
83 if (cmd == NAND_CMD_READOOB) {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020084 offs += CONFIG_SYS_NAND_PAGE_SIZE;
Stefan Roesea9e665e2008-04-08 10:31:00 +020085 cmd = NAND_CMD_READ0;
86 }
87
Alex Waterman6e1a80a2011-04-06 16:01:52 -040088 /* Shift the offset from byte addressing to word addressing. */
89 if (this->options & NAND_BUSWIDTH_16)
90 offs >>= 1;
91
Stefan Roesea9e665e2008-04-08 10:31:00 +020092 /* Begin command latch cycle */
Alex Watermanea72c1b2011-05-04 09:10:15 -040093 hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Stefan Roesea9e665e2008-04-08 10:31:00 +020094 /* Set ALE and clear CLE to start address cycle */
Stefan Roesea9e665e2008-04-08 10:31:00 +020095 /* Column address */
Alex Watermanea72c1b2011-05-04 09:10:15 -040096 hwctrl(mtd, offs & 0xff,
Wolfgang Denk74e0dde2008-08-14 14:41:06 +020097 NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
Alex Watermanea72c1b2011-05-04 09:10:15 -040098 hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
Stefan Roesea9e665e2008-04-08 10:31:00 +020099 /* Row address */
Alex Watermanea72c1b2011-05-04 09:10:15 -0400100 hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
101 hwctrl(mtd, ((page_addr >> 8) & 0xff),
Scott Wood13f222a2009-06-24 17:23:49 -0500102 NAND_CTRL_ALE); /* A[27:20] */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200103#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
Stefan Roesea9e665e2008-04-08 10:31:00 +0200104 /* One more address cycle for devices > 128MiB */
Alex Watermanea72c1b2011-05-04 09:10:15 -0400105 hwctrl(mtd, (page_addr >> 16) & 0x0f,
Scott Wood13f222a2009-06-24 17:23:49 -0500106 NAND_CTRL_ALE); /* A[31:28] */
Stefan Roesea9e665e2008-04-08 10:31:00 +0200107#endif
108 /* Latch in address */
Alex Watermanea72c1b2011-05-04 09:10:15 -0400109 hwctrl(mtd, NAND_CMD_READSTART,
Wolfgang Denk74e0dde2008-08-14 14:41:06 +0200110 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Alex Watermanea72c1b2011-05-04 09:10:15 -0400111 hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Stefan Roesea9e665e2008-04-08 10:31:00 +0200112
113 /*
114 * Wait a while for the data to be ready
115 */
Stefan Roese71c72692011-05-04 11:44:14 +0200116 while (!this->dev_ready(mtd))
117 ;
Stefan Roesea9e665e2008-04-08 10:31:00 +0200118
119 return 0;
120}
121#endif
Stefan Roese39013542007-06-01 15:23:04 +0200122
123static int nand_is_bad_block(struct mtd_info *mtd, int block)
124{
125 struct nand_chip *this = mtd->priv;
126
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200127 nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
Stefan Roese39013542007-06-01 15:23:04 +0200128
Stefan Roese42fbddd2006-09-07 11:51:23 +0200129 /*
Alex Watermancd6aae32011-05-19 15:08:36 -0400130 * Read one byte (or two if it's a 16 bit chip).
Stefan Roese42fbddd2006-09-07 11:51:23 +0200131 */
Alex Watermancd6aae32011-05-19 15:08:36 -0400132 if (this->options & NAND_BUSWIDTH_16) {
133 if (readw(this->IO_ADDR_R) != 0xffff)
134 return 1;
135 } else {
136 if (readb(this->IO_ADDR_R) != 0xff)
137 return 1;
138 }
Stefan Roese42fbddd2006-09-07 11:51:23 +0200139
140 return 0;
141}
142
Heiko Schochercd0fc5f2011-07-16 00:06:49 +0000143#if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST)
Stefan Roese42fbddd2006-09-07 11:51:23 +0200144static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
145{
Wolfgang Denk4df0da52006-10-09 00:42:01 +0200146 struct nand_chip *this = mtd->priv;
Scott Woodb72e9622012-01-11 15:41:01 -0600147 u_char ecc_calc[ECCTOTAL];
148 u_char ecc_code[ECCTOTAL];
149 u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
Stefan Roese42fbddd2006-09-07 11:51:23 +0200150 int i;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200151 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
152 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
Scott Woodb72e9622012-01-11 15:41:01 -0600153 int eccsteps = ECCSTEPS;
Stefan Roese39013542007-06-01 15:23:04 +0200154 uint8_t *p = dst;
Stefan Roese42fbddd2006-09-07 11:51:23 +0200155
Heiko Schochercd0fc5f2011-07-16 00:06:49 +0000156 nand_command(mtd, block, page, 0, NAND_CMD_READOOB);
157 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
158 nand_command(mtd, block, page, 0, NAND_CMD_READ0);
159
160 /* Pick the ECC bytes out of the oob data */
Scott Woodb72e9622012-01-11 15:41:01 -0600161 for (i = 0; i < ECCTOTAL; i++)
Heiko Schochercd0fc5f2011-07-16 00:06:49 +0000162 ecc_code[i] = oob_data[nand_ecc_pos[i]];
163
164
165 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
166 this->ecc.hwctl(mtd, NAND_ECC_READ);
167 this->read_buf(mtd, p, eccsize);
168 this->ecc.calculate(mtd, p, &ecc_calc[i]);
Anatolij Gustschindf272822011-12-07 11:58:56 +0000169 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Heiko Schochercd0fc5f2011-07-16 00:06:49 +0000170 }
171
172 return 0;
173}
174#else
175static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
176{
177 struct nand_chip *this = mtd->priv;
Scott Woodb72e9622012-01-11 15:41:01 -0600178 u_char ecc_calc[ECCTOTAL];
179 u_char ecc_code[ECCTOTAL];
180 u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
Heiko Schochercd0fc5f2011-07-16 00:06:49 +0000181 int i;
182 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
183 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
Scott Woodb72e9622012-01-11 15:41:01 -0600184 int eccsteps = ECCSTEPS;
Heiko Schochercd0fc5f2011-07-16 00:06:49 +0000185 uint8_t *p = dst;
Heiko Schochercd0fc5f2011-07-16 00:06:49 +0000186
Stefan Roese39013542007-06-01 15:23:04 +0200187 nand_command(mtd, block, page, 0, NAND_CMD_READ0);
Stefan Roese42fbddd2006-09-07 11:51:23 +0200188
Stefan Roese39013542007-06-01 15:23:04 +0200189 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
Stefan Roese897a4502008-01-05 16:49:37 +0100190 this->ecc.hwctl(mtd, NAND_ECC_READ);
Stefan Roese39013542007-06-01 15:23:04 +0200191 this->read_buf(mtd, p, eccsize);
Stefan Roese897a4502008-01-05 16:49:37 +0100192 this->ecc.calculate(mtd, p, &ecc_calc[i]);
Stefan Roese39013542007-06-01 15:23:04 +0200193 }
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200194 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
Stefan Roese39013542007-06-01 15:23:04 +0200195
196 /* Pick the ECC bytes out of the oob data */
Scott Woodb72e9622012-01-11 15:41:01 -0600197 for (i = 0; i < ECCTOTAL; i++)
Stefan Roese39013542007-06-01 15:23:04 +0200198 ecc_code[i] = oob_data[nand_ecc_pos[i]];
199
Scott Woodb72e9622012-01-11 15:41:01 -0600200 eccsteps = ECCSTEPS;
Stefan Roese39013542007-06-01 15:23:04 +0200201 p = dst;
202
203 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
204 /* No chance to do something with the possible error message
205 * from correct_data(). We just hope that all possible errors
206 * are corrected by this routine.
207 */
Stefan Roese42c4bae2011-11-15 08:02:54 +0000208 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Stefan Roese39013542007-06-01 15:23:04 +0200209 }
Stefan Roese42fbddd2006-09-07 11:51:23 +0200210
211 return 0;
212}
Heiko Schochercd0fc5f2011-07-16 00:06:49 +0000213#endif /* #if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST) */
Stefan Roese42fbddd2006-09-07 11:51:23 +0200214
Guennadi Liakhovetski6e88dc22008-08-06 21:42:07 +0200215static int nand_load(struct mtd_info *mtd, unsigned int offs,
Wolfgang Denk74e0dde2008-08-14 14:41:06 +0200216 unsigned int uboot_size, uchar *dst)
Stefan Roese42fbddd2006-09-07 11:51:23 +0200217{
Guennadi Liakhovetski6e88dc22008-08-06 21:42:07 +0200218 unsigned int block, lastblock;
219 unsigned int page;
Stefan Roese42fbddd2006-09-07 11:51:23 +0200220
221 /*
Guennadi Liakhovetski6e88dc22008-08-06 21:42:07 +0200222 * offs has to be aligned to a page address!
Stefan Roese42fbddd2006-09-07 11:51:23 +0200223 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200224 block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
225 lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
226 page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
Stefan Roese42fbddd2006-09-07 11:51:23 +0200227
Guennadi Liakhovetski6e88dc22008-08-06 21:42:07 +0200228 while (block <= lastblock) {
Stefan Roese42fbddd2006-09-07 11:51:23 +0200229 if (!nand_is_bad_block(mtd, block)) {
230 /*
231 * Skip bad blocks
232 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200233 while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
Stefan Roese42fbddd2006-09-07 11:51:23 +0200234 nand_read_page(mtd, block, page, dst);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200235 dst += CONFIG_SYS_NAND_PAGE_SIZE;
Guennadi Liakhovetski6e88dc22008-08-06 21:42:07 +0200236 page++;
Stefan Roese42fbddd2006-09-07 11:51:23 +0200237 }
238
Guennadi Liakhovetski6e88dc22008-08-06 21:42:07 +0200239 page = 0;
240 } else {
241 lastblock++;
Stefan Roese42fbddd2006-09-07 11:51:23 +0200242 }
243
244 block++;
245 }
246
247 return 0;
248}
249
Stefan Roese7d72e022008-06-02 14:35:44 +0200250/*
251 * The main entry for NAND booting. It's necessary that SDRAM is already
252 * configured and available since this code loads the main U-Boot image
253 * from NAND into SDRAM and starts it from there.
254 */
Stefan Roese42fbddd2006-09-07 11:51:23 +0200255void nand_boot(void)
256{
Stefan Roese42fbddd2006-09-07 11:51:23 +0200257 struct nand_chip nand_chip;
258 nand_info_t nand_info;
Scott Woodb71689b2008-06-30 14:13:28 -0500259 __attribute__((noreturn)) void (*uboot)(void);
Stefan Roese42fbddd2006-09-07 11:51:23 +0200260
261 /*
Stefan Roese42fbddd2006-09-07 11:51:23 +0200262 * Init board specific nand support
263 */
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -0500264 nand_chip.select_chip = NULL;
Stefan Roese42fbddd2006-09-07 11:51:23 +0200265 nand_info.priv = &nand_chip;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200266 nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
Stefan Roese42fbddd2006-09-07 11:51:23 +0200267 nand_chip.dev_ready = NULL; /* preset to NULL */
Stefan Roese22d2d802011-05-04 11:44:44 +0200268 nand_chip.options = 0;
Stefan Roese42fbddd2006-09-07 11:51:23 +0200269 board_nand_init(&nand_chip);
270
Guennadi Liakhovetski6e88dc22008-08-06 21:42:07 +0200271 if (nand_chip.select_chip)
272 nand_chip.select_chip(&nand_info, 0);
273
Stefan Roese42fbddd2006-09-07 11:51:23 +0200274 /*
275 * Load U-Boot image from NAND into RAM
276 */
Stefan Roese42c4bae2011-11-15 08:02:54 +0000277 nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
278 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
Stefan Roese42fbddd2006-09-07 11:51:23 +0200279
Guennadi Liakhovetskifad24442009-05-18 16:07:22 +0200280#ifdef CONFIG_NAND_ENV_DST
281 nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
282 (uchar *)CONFIG_NAND_ENV_DST);
283
284#ifdef CONFIG_ENV_OFFSET_REDUND
285 nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
286 (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
287#endif
288#endif
289
Guennadi Liakhovetski6e88dc22008-08-06 21:42:07 +0200290 if (nand_chip.select_chip)
291 nand_chip.select_chip(&nand_info, -1);
292
Stefan Roese42fbddd2006-09-07 11:51:23 +0200293 /*
294 * Jump to U-Boot image
295 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200296 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
Stefan Roese42fbddd2006-09-07 11:51:23 +0200297 (*uboot)();
298}