Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 1 | /* |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 2 | * (C) Copyright 2006-2008 |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 3 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License as |
| 7 | * published by the Free Software Foundation; either version 2 of |
| 8 | * the License, or (at your option) any later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 18 | * MA 02111-1307 USA |
| 19 | */ |
| 20 | |
| 21 | #include <common.h> |
| 22 | #include <nand.h> |
Stefan Roese | 897a450 | 2008-01-05 16:49:37 +0100 | [diff] [blame] | 23 | #include <asm/io.h> |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 24 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 25 | static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS; |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 26 | |
Scott Wood | b72e962 | 2012-01-11 15:41:01 -0600 | [diff] [blame] | 27 | #define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ |
| 28 | CONFIG_SYS_NAND_ECCSIZE) |
| 29 | #define ECCTOTAL (ECCSTEPS * CONFIG_SYS_NAND_ECCBYTES) |
| 30 | |
| 31 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 32 | #if (CONFIG_SYS_NAND_PAGE_SIZE <= 512) |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 33 | /* |
| 34 | * NAND command for small page NAND devices (512) |
| 35 | */ |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 36 | static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd) |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 37 | { |
Wolfgang Denk | 4df0da5 | 2006-10-09 00:42:01 +0200 | [diff] [blame] | 38 | struct nand_chip *this = mtd->priv; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 39 | int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 40 | |
Stefan Roese | 1fb8441 | 2011-05-16 13:04:00 +0200 | [diff] [blame] | 41 | while (!this->dev_ready(mtd)) |
| 42 | ; |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 43 | |
| 44 | /* Begin command latch cycle */ |
Scott Wood | d2a5bb9 | 2008-08-05 11:15:59 -0500 | [diff] [blame] | 45 | this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 46 | /* Set ALE and clear CLE to start address cycle */ |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 47 | /* Column address */ |
Scott Wood | d2a5bb9 | 2008-08-05 11:15:59 -0500 | [diff] [blame] | 48 | this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE); |
Scott Wood | 13f222a | 2009-06-24 17:23:49 -0500 | [diff] [blame] | 49 | this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */ |
| 50 | this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff, |
| 51 | NAND_CTRL_ALE); /* A[24:17] */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 52 | #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 53 | /* One more address cycle for devices > 32MiB */ |
Scott Wood | 13f222a | 2009-06-24 17:23:49 -0500 | [diff] [blame] | 54 | this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, |
| 55 | NAND_CTRL_ALE); /* A[28:25] */ |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 56 | #endif |
| 57 | /* Latch in address */ |
Stefan Roese | 897a450 | 2008-01-05 16:49:37 +0100 | [diff] [blame] | 58 | this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 59 | |
| 60 | /* |
| 61 | * Wait a while for the data to be ready |
| 62 | */ |
Stefan Roese | 71c7269 | 2011-05-04 11:44:14 +0200 | [diff] [blame] | 63 | while (!this->dev_ready(mtd)) |
| 64 | ; |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 65 | |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 66 | return 0; |
| 67 | } |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 68 | #else |
| 69 | /* |
| 70 | * NAND command for large page NAND devices (2k) |
| 71 | */ |
| 72 | static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd) |
| 73 | { |
| 74 | struct nand_chip *this = mtd->priv; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 75 | int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; |
Alex Waterman | ea72c1b | 2011-05-04 09:10:15 -0400 | [diff] [blame] | 76 | void (*hwctrl)(struct mtd_info *mtd, int cmd, |
| 77 | unsigned int ctrl) = this->cmd_ctrl; |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 78 | |
Stefan Roese | 71c7269 | 2011-05-04 11:44:14 +0200 | [diff] [blame] | 79 | while (!this->dev_ready(mtd)) |
| 80 | ; |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 81 | |
| 82 | /* Emulate NAND_CMD_READOOB */ |
| 83 | if (cmd == NAND_CMD_READOOB) { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 84 | offs += CONFIG_SYS_NAND_PAGE_SIZE; |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 85 | cmd = NAND_CMD_READ0; |
| 86 | } |
| 87 | |
Alex Waterman | 6e1a80a | 2011-04-06 16:01:52 -0400 | [diff] [blame] | 88 | /* Shift the offset from byte addressing to word addressing. */ |
| 89 | if (this->options & NAND_BUSWIDTH_16) |
| 90 | offs >>= 1; |
| 91 | |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 92 | /* Begin command latch cycle */ |
Alex Waterman | ea72c1b | 2011-05-04 09:10:15 -0400 | [diff] [blame] | 93 | hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 94 | /* Set ALE and clear CLE to start address cycle */ |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 95 | /* Column address */ |
Alex Waterman | ea72c1b | 2011-05-04 09:10:15 -0400 | [diff] [blame] | 96 | hwctrl(mtd, offs & 0xff, |
Wolfgang Denk | 74e0dde | 2008-08-14 14:41:06 +0200 | [diff] [blame] | 97 | NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */ |
Alex Waterman | ea72c1b | 2011-05-04 09:10:15 -0400 | [diff] [blame] | 98 | hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 99 | /* Row address */ |
Alex Waterman | ea72c1b | 2011-05-04 09:10:15 -0400 | [diff] [blame] | 100 | hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ |
| 101 | hwctrl(mtd, ((page_addr >> 8) & 0xff), |
Scott Wood | 13f222a | 2009-06-24 17:23:49 -0500 | [diff] [blame] | 102 | NAND_CTRL_ALE); /* A[27:20] */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 103 | #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 104 | /* One more address cycle for devices > 128MiB */ |
Alex Waterman | ea72c1b | 2011-05-04 09:10:15 -0400 | [diff] [blame] | 105 | hwctrl(mtd, (page_addr >> 16) & 0x0f, |
Scott Wood | 13f222a | 2009-06-24 17:23:49 -0500 | [diff] [blame] | 106 | NAND_CTRL_ALE); /* A[31:28] */ |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 107 | #endif |
| 108 | /* Latch in address */ |
Alex Waterman | ea72c1b | 2011-05-04 09:10:15 -0400 | [diff] [blame] | 109 | hwctrl(mtd, NAND_CMD_READSTART, |
Wolfgang Denk | 74e0dde | 2008-08-14 14:41:06 +0200 | [diff] [blame] | 110 | NAND_CTRL_CLE | NAND_CTRL_CHANGE); |
Alex Waterman | ea72c1b | 2011-05-04 09:10:15 -0400 | [diff] [blame] | 111 | hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 112 | |
| 113 | /* |
| 114 | * Wait a while for the data to be ready |
| 115 | */ |
Stefan Roese | 71c7269 | 2011-05-04 11:44:14 +0200 | [diff] [blame] | 116 | while (!this->dev_ready(mtd)) |
| 117 | ; |
Stefan Roese | a9e665e | 2008-04-08 10:31:00 +0200 | [diff] [blame] | 118 | |
| 119 | return 0; |
| 120 | } |
| 121 | #endif |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 122 | |
| 123 | static int nand_is_bad_block(struct mtd_info *mtd, int block) |
| 124 | { |
| 125 | struct nand_chip *this = mtd->priv; |
| 126 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 127 | nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB); |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 128 | |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 129 | /* |
Alex Waterman | cd6aae3 | 2011-05-19 15:08:36 -0400 | [diff] [blame] | 130 | * Read one byte (or two if it's a 16 bit chip). |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 131 | */ |
Alex Waterman | cd6aae3 | 2011-05-19 15:08:36 -0400 | [diff] [blame] | 132 | if (this->options & NAND_BUSWIDTH_16) { |
| 133 | if (readw(this->IO_ADDR_R) != 0xffff) |
| 134 | return 1; |
| 135 | } else { |
| 136 | if (readb(this->IO_ADDR_R) != 0xff) |
| 137 | return 1; |
| 138 | } |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 139 | |
| 140 | return 0; |
| 141 | } |
| 142 | |
Heiko Schocher | cd0fc5f | 2011-07-16 00:06:49 +0000 | [diff] [blame] | 143 | #if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST) |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 144 | static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst) |
| 145 | { |
Wolfgang Denk | 4df0da5 | 2006-10-09 00:42:01 +0200 | [diff] [blame] | 146 | struct nand_chip *this = mtd->priv; |
Scott Wood | b72e962 | 2012-01-11 15:41:01 -0600 | [diff] [blame] | 147 | u_char ecc_calc[ECCTOTAL]; |
| 148 | u_char ecc_code[ECCTOTAL]; |
| 149 | u_char oob_data[CONFIG_SYS_NAND_OOBSIZE]; |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 150 | int i; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 151 | int eccsize = CONFIG_SYS_NAND_ECCSIZE; |
| 152 | int eccbytes = CONFIG_SYS_NAND_ECCBYTES; |
Scott Wood | b72e962 | 2012-01-11 15:41:01 -0600 | [diff] [blame] | 153 | int eccsteps = ECCSTEPS; |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 154 | uint8_t *p = dst; |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 155 | |
Heiko Schocher | cd0fc5f | 2011-07-16 00:06:49 +0000 | [diff] [blame] | 156 | nand_command(mtd, block, page, 0, NAND_CMD_READOOB); |
| 157 | this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE); |
| 158 | nand_command(mtd, block, page, 0, NAND_CMD_READ0); |
| 159 | |
| 160 | /* Pick the ECC bytes out of the oob data */ |
Scott Wood | b72e962 | 2012-01-11 15:41:01 -0600 | [diff] [blame] | 161 | for (i = 0; i < ECCTOTAL; i++) |
Heiko Schocher | cd0fc5f | 2011-07-16 00:06:49 +0000 | [diff] [blame] | 162 | ecc_code[i] = oob_data[nand_ecc_pos[i]]; |
| 163 | |
| 164 | |
| 165 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 166 | this->ecc.hwctl(mtd, NAND_ECC_READ); |
| 167 | this->read_buf(mtd, p, eccsize); |
| 168 | this->ecc.calculate(mtd, p, &ecc_calc[i]); |
Anatolij Gustschin | df27282 | 2011-12-07 11:58:56 +0000 | [diff] [blame] | 169 | this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
Heiko Schocher | cd0fc5f | 2011-07-16 00:06:49 +0000 | [diff] [blame] | 170 | } |
| 171 | |
| 172 | return 0; |
| 173 | } |
| 174 | #else |
| 175 | static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst) |
| 176 | { |
| 177 | struct nand_chip *this = mtd->priv; |
Scott Wood | b72e962 | 2012-01-11 15:41:01 -0600 | [diff] [blame] | 178 | u_char ecc_calc[ECCTOTAL]; |
| 179 | u_char ecc_code[ECCTOTAL]; |
| 180 | u_char oob_data[CONFIG_SYS_NAND_OOBSIZE]; |
Heiko Schocher | cd0fc5f | 2011-07-16 00:06:49 +0000 | [diff] [blame] | 181 | int i; |
| 182 | int eccsize = CONFIG_SYS_NAND_ECCSIZE; |
| 183 | int eccbytes = CONFIG_SYS_NAND_ECCBYTES; |
Scott Wood | b72e962 | 2012-01-11 15:41:01 -0600 | [diff] [blame] | 184 | int eccsteps = ECCSTEPS; |
Heiko Schocher | cd0fc5f | 2011-07-16 00:06:49 +0000 | [diff] [blame] | 185 | uint8_t *p = dst; |
Heiko Schocher | cd0fc5f | 2011-07-16 00:06:49 +0000 | [diff] [blame] | 186 | |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 187 | nand_command(mtd, block, page, 0, NAND_CMD_READ0); |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 188 | |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 189 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
Stefan Roese | 897a450 | 2008-01-05 16:49:37 +0100 | [diff] [blame] | 190 | this->ecc.hwctl(mtd, NAND_ECC_READ); |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 191 | this->read_buf(mtd, p, eccsize); |
Stefan Roese | 897a450 | 2008-01-05 16:49:37 +0100 | [diff] [blame] | 192 | this->ecc.calculate(mtd, p, &ecc_calc[i]); |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 193 | } |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 194 | this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE); |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 195 | |
| 196 | /* Pick the ECC bytes out of the oob data */ |
Scott Wood | b72e962 | 2012-01-11 15:41:01 -0600 | [diff] [blame] | 197 | for (i = 0; i < ECCTOTAL; i++) |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 198 | ecc_code[i] = oob_data[nand_ecc_pos[i]]; |
| 199 | |
Scott Wood | b72e962 | 2012-01-11 15:41:01 -0600 | [diff] [blame] | 200 | eccsteps = ECCSTEPS; |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 201 | p = dst; |
| 202 | |
| 203 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 204 | /* No chance to do something with the possible error message |
| 205 | * from correct_data(). We just hope that all possible errors |
| 206 | * are corrected by this routine. |
| 207 | */ |
Stefan Roese | 42c4bae | 2011-11-15 08:02:54 +0000 | [diff] [blame] | 208 | this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
Stefan Roese | 3901354 | 2007-06-01 15:23:04 +0200 | [diff] [blame] | 209 | } |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 210 | |
| 211 | return 0; |
| 212 | } |
Heiko Schocher | cd0fc5f | 2011-07-16 00:06:49 +0000 | [diff] [blame] | 213 | #endif /* #if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST) */ |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 214 | |
Guennadi Liakhovetski | 6e88dc2 | 2008-08-06 21:42:07 +0200 | [diff] [blame] | 215 | static int nand_load(struct mtd_info *mtd, unsigned int offs, |
Wolfgang Denk | 74e0dde | 2008-08-14 14:41:06 +0200 | [diff] [blame] | 216 | unsigned int uboot_size, uchar *dst) |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 217 | { |
Guennadi Liakhovetski | 6e88dc2 | 2008-08-06 21:42:07 +0200 | [diff] [blame] | 218 | unsigned int block, lastblock; |
| 219 | unsigned int page; |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 220 | |
| 221 | /* |
Guennadi Liakhovetski | 6e88dc2 | 2008-08-06 21:42:07 +0200 | [diff] [blame] | 222 | * offs has to be aligned to a page address! |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 223 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 224 | block = offs / CONFIG_SYS_NAND_BLOCK_SIZE; |
| 225 | lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE; |
| 226 | page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE; |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 227 | |
Guennadi Liakhovetski | 6e88dc2 | 2008-08-06 21:42:07 +0200 | [diff] [blame] | 228 | while (block <= lastblock) { |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 229 | if (!nand_is_bad_block(mtd, block)) { |
| 230 | /* |
| 231 | * Skip bad blocks |
| 232 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 233 | while (page < CONFIG_SYS_NAND_PAGE_COUNT) { |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 234 | nand_read_page(mtd, block, page, dst); |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 235 | dst += CONFIG_SYS_NAND_PAGE_SIZE; |
Guennadi Liakhovetski | 6e88dc2 | 2008-08-06 21:42:07 +0200 | [diff] [blame] | 236 | page++; |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 237 | } |
| 238 | |
Guennadi Liakhovetski | 6e88dc2 | 2008-08-06 21:42:07 +0200 | [diff] [blame] | 239 | page = 0; |
| 240 | } else { |
| 241 | lastblock++; |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 242 | } |
| 243 | |
| 244 | block++; |
| 245 | } |
| 246 | |
| 247 | return 0; |
| 248 | } |
| 249 | |
Stefan Roese | 7d72e02 | 2008-06-02 14:35:44 +0200 | [diff] [blame] | 250 | /* |
| 251 | * The main entry for NAND booting. It's necessary that SDRAM is already |
| 252 | * configured and available since this code loads the main U-Boot image |
| 253 | * from NAND into SDRAM and starts it from there. |
| 254 | */ |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 255 | void nand_boot(void) |
| 256 | { |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 257 | struct nand_chip nand_chip; |
| 258 | nand_info_t nand_info; |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 259 | __attribute__((noreturn)) void (*uboot)(void); |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 260 | |
| 261 | /* |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 262 | * Init board specific nand support |
| 263 | */ |
Sughosh Ganu | 1b9c52b | 2010-11-30 11:25:01 -0500 | [diff] [blame] | 264 | nand_chip.select_chip = NULL; |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 265 | nand_info.priv = &nand_chip; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 266 | nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE; |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 267 | nand_chip.dev_ready = NULL; /* preset to NULL */ |
Stefan Roese | 22d2d80 | 2011-05-04 11:44:44 +0200 | [diff] [blame] | 268 | nand_chip.options = 0; |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 269 | board_nand_init(&nand_chip); |
| 270 | |
Guennadi Liakhovetski | 6e88dc2 | 2008-08-06 21:42:07 +0200 | [diff] [blame] | 271 | if (nand_chip.select_chip) |
| 272 | nand_chip.select_chip(&nand_info, 0); |
| 273 | |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 274 | /* |
| 275 | * Load U-Boot image from NAND into RAM |
| 276 | */ |
Stefan Roese | 42c4bae | 2011-11-15 08:02:54 +0000 | [diff] [blame] | 277 | nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE, |
| 278 | (uchar *)CONFIG_SYS_NAND_U_BOOT_DST); |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 279 | |
Guennadi Liakhovetski | fad2444 | 2009-05-18 16:07:22 +0200 | [diff] [blame] | 280 | #ifdef CONFIG_NAND_ENV_DST |
| 281 | nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, |
| 282 | (uchar *)CONFIG_NAND_ENV_DST); |
| 283 | |
| 284 | #ifdef CONFIG_ENV_OFFSET_REDUND |
| 285 | nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE, |
| 286 | (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE); |
| 287 | #endif |
| 288 | #endif |
| 289 | |
Guennadi Liakhovetski | 6e88dc2 | 2008-08-06 21:42:07 +0200 | [diff] [blame] | 290 | if (nand_chip.select_chip) |
| 291 | nand_chip.select_chip(&nand_info, -1); |
| 292 | |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 293 | /* |
| 294 | * Jump to U-Boot image |
| 295 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 296 | uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; |
Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 297 | (*uboot)(); |
| 298 | } |