Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: NXP i.MX Co-Processor |
| 8 | |
| 9 | description: |
| 10 | This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs. |
| 11 | |
| 12 | maintainers: |
| 13 | - Peng Fan <peng.fan@nxp.com> |
| 14 | |
| 15 | properties: |
| 16 | compatible: |
| 17 | enum: |
| 18 | - fsl,imx6sx-cm4 |
| 19 | - fsl,imx7d-cm4 |
| 20 | - fsl,imx7ulp-cm4 |
| 21 | - fsl,imx8mm-cm4 |
| 22 | - fsl,imx8mn-cm7 |
| 23 | - fsl,imx8mn-cm7-mmio |
| 24 | - fsl,imx8mp-cm7 |
| 25 | - fsl,imx8mp-cm7-mmio |
| 26 | - fsl,imx8mq-cm4 |
| 27 | - fsl,imx8qm-cm4 |
| 28 | - fsl,imx8qxp-cm4 |
| 29 | - fsl,imx8ulp-cm33 |
| 30 | - fsl,imx93-cm33 |
| 31 | |
| 32 | clocks: |
| 33 | maxItems: 1 |
| 34 | |
| 35 | syscon: |
| 36 | $ref: /schemas/types.yaml#/definitions/phandle |
| 37 | description: |
| 38 | Phandle to syscon block which provide access to System Reset Controller |
| 39 | |
| 40 | mbox-names: |
| 41 | items: |
| 42 | - const: tx |
| 43 | - const: rx |
| 44 | - const: rxdb |
| 45 | |
| 46 | mboxes: |
| 47 | description: |
| 48 | This property is required only if the rpmsg/virtio functionality is used. |
| 49 | List of <&phandle type channel> - 1 channel for TX, 1 channel for RX, 1 channel for RXDB. |
| 50 | (see mailbox/fsl,mu.yaml) |
| 51 | minItems: 1 |
| 52 | maxItems: 3 |
| 53 | |
| 54 | memory-region: |
| 55 | description: |
| 56 | If present, a phandle for a reserved memory area that used for vdev buffer, |
| 57 | resource table, vring region and others used by remote processor. |
| 58 | minItems: 1 |
| 59 | maxItems: 32 |
| 60 | |
| 61 | power-domains: |
| 62 | maxItems: 8 |
| 63 | |
| 64 | fsl,auto-boot: |
| 65 | $ref: /schemas/types.yaml#/definitions/flag |
| 66 | description: |
| 67 | Indicate whether need to load the default firmware and start the remote |
| 68 | processor automatically. |
| 69 | |
| 70 | fsl,entry-address: |
| 71 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 72 | description: |
| 73 | Specify CPU entry address for SCU enabled processor. |
| 74 | |
| 75 | fsl,iomuxc-gpr: |
| 76 | $ref: /schemas/types.yaml#/definitions/phandle |
| 77 | description: |
| 78 | Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit. |
| 79 | |
| 80 | fsl,resource-id: |
| 81 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 82 | description: |
| 83 | This property is to specify the resource id of the remote processor in SoC |
| 84 | which supports SCFW |
| 85 | |
| 86 | required: |
| 87 | - compatible |
| 88 | |
| 89 | allOf: |
| 90 | - if: |
| 91 | properties: |
| 92 | compatible: |
| 93 | not: |
| 94 | contains: |
| 95 | enum: |
| 96 | - fsl,imx8mn-cm7-mmio |
| 97 | - fsl,imx8mp-cm7-mmio |
| 98 | then: |
| 99 | properties: |
| 100 | fsl,iomuxc-gpr: false |
| 101 | |
| 102 | additionalProperties: false |
| 103 | |
| 104 | examples: |
| 105 | - | |
| 106 | #include <dt-bindings/clock/imx7d-clock.h> |
| 107 | m4_reserved_sysmem1: cm4@80000000 { |
| 108 | reg = <0x80000000 0x80000>; |
| 109 | }; |
| 110 | |
| 111 | m4_reserved_sysmem2: cm4@81000000 { |
| 112 | reg = <0x81000000 0x80000>; |
| 113 | }; |
| 114 | |
| 115 | imx7d-cm4 { |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 116 | compatible = "fsl,imx7d-cm4"; |
| 117 | memory-region = <&m4_reserved_sysmem1>, <&m4_reserved_sysmem2>; |
| 118 | syscon = <&src>; |
| 119 | clocks = <&clks IMX7D_ARM_M4_ROOT_CLK>; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 120 | }; |
| 121 | |
| 122 | - | |
| 123 | #include <dt-bindings/clock/imx8mm-clock.h> |
| 124 | |
| 125 | imx8mm-cm4 { |
| 126 | compatible = "fsl,imx8mm-cm4"; |
| 127 | clocks = <&clk IMX8MM_CLK_M4_DIV>; |
| 128 | mbox-names = "tx", "rx", "rxdb"; |
| 129 | mboxes = <&mu 0 1 |
| 130 | &mu 1 1 |
| 131 | &mu 3 1>; |
| 132 | memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>; |
| 133 | syscon = <&src>; |
| 134 | }; |
| 135 | ... |