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+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX Co-Processor
+
+description:
+ This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
+
+maintainers:
+ - Peng Fan <peng.fan@nxp.com>
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx6sx-cm4
+ - fsl,imx7d-cm4
+ - fsl,imx7ulp-cm4
+ - fsl,imx8mm-cm4
+ - fsl,imx8mn-cm7
+ - fsl,imx8mn-cm7-mmio
+ - fsl,imx8mp-cm7
+ - fsl,imx8mp-cm7-mmio
+ - fsl,imx8mq-cm4
+ - fsl,imx8qm-cm4
+ - fsl,imx8qxp-cm4
+ - fsl,imx8ulp-cm33
+ - fsl,imx93-cm33
+
+ clocks:
+ maxItems: 1
+
+ syscon:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to syscon block which provide access to System Reset Controller
+
+ mbox-names:
+ items:
+ - const: tx
+ - const: rx
+ - const: rxdb
+
+ mboxes:
+ description:
+ This property is required only if the rpmsg/virtio functionality is used.
+ List of <&phandle type channel> - 1 channel for TX, 1 channel for RX, 1 channel for RXDB.
+ (see mailbox/fsl,mu.yaml)
+ minItems: 1
+ maxItems: 3
+
+ memory-region:
+ description:
+ If present, a phandle for a reserved memory area that used for vdev buffer,
+ resource table, vring region and others used by remote processor.
+ minItems: 1
+ maxItems: 32
+
+ power-domains:
+ maxItems: 8
+
+ fsl,auto-boot:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ Indicate whether need to load the default firmware and start the remote
+ processor automatically.
+
+ fsl,entry-address:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Specify CPU entry address for SCU enabled processor.
+
+ fsl,iomuxc-gpr:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit.
+
+ fsl,resource-id:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ This property is to specify the resource id of the remote processor in SoC
+ which supports SCFW
+
+required:
+ - compatible
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ not:
+ contains:
+ enum:
+ - fsl,imx8mn-cm7-mmio
+ - fsl,imx8mp-cm7-mmio
+ then:
+ properties:
+ fsl,iomuxc-gpr: false
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx7d-clock.h>
+ m4_reserved_sysmem1: cm4@80000000 {
+ reg = <0x80000000 0x80000>;
+ };
+
+ m4_reserved_sysmem2: cm4@81000000 {
+ reg = <0x81000000 0x80000>;
+ };
+
+ imx7d-cm4 {
+ compatible = "fsl,imx7d-cm4";
+ memory-region = <&m4_reserved_sysmem1>, <&m4_reserved_sysmem2>;
+ syscon = <&src>;
+ clocks = <&clks IMX7D_ARM_M4_ROOT_CLK>;
+ };
+
+ - |
+ #include <dt-bindings/clock/imx8mm-clock.h>
+
+ imx8mm-cm4 {
+ compatible = "fsl,imx8mm-cm4";
+ clocks = <&clk IMX8MM_CLK_M4_DIV>;
+ mbox-names = "tx", "rx", "rxdb";
+ mboxes = <&mu 0 1
+ &mu 1 1
+ &mu 3 1>;
+ memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>;
+ syscon = <&src>;
+ };
+...