wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 1 | /* |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 2 | * (C) Copyright 2008 - 2015 Michal Simek <monstr@monstr.eu> |
Michal Simek | 403d619 | 2008-07-11 10:10:31 +0200 | [diff] [blame] | 3 | * Clean driver and add xilinx constant from header file |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 4 | * |
Michal Simek | 403d619 | 2008-07-11 10:10:31 +0200 | [diff] [blame] | 5 | * (C) Copyright 2004 Atmark Techno, Inc. |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 6 | * Yasushi SHOJI <yashi@atmark-techno.com> |
| 7 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <config.h> |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 12 | #include <common.h> |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 13 | #include <dm.h> |
Michal Simek | 403d619 | 2008-07-11 10:10:31 +0200 | [diff] [blame] | 14 | #include <asm/io.h> |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 15 | #include <linux/compiler.h> |
| 16 | #include <serial.h> |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 17 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 18 | DECLARE_GLOBAL_DATA_PTR; |
| 19 | |
| 20 | #define SR_TX_FIFO_FULL BIT(3) /* transmit FIFO full */ |
| 21 | #define SR_TX_FIFO_EMPTY BIT(2) /* transmit FIFO empty */ |
| 22 | #define SR_RX_FIFO_VALID_DATA BIT(0) /* data in receive FIFO */ |
| 23 | #define SR_RX_FIFO_FULL BIT(1) /* receive FIFO full */ |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 24 | |
Michal Simek | e5b3c1d | 2014-01-21 07:29:47 +0100 | [diff] [blame] | 25 | #define ULITE_CONTROL_RST_TX 0x01 |
| 26 | #define ULITE_CONTROL_RST_RX 0x02 |
| 27 | |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 28 | struct uartlite { |
| 29 | unsigned int rx_fifo; |
| 30 | unsigned int tx_fifo; |
| 31 | unsigned int status; |
Michal Simek | e5b3c1d | 2014-01-21 07:29:47 +0100 | [diff] [blame] | 32 | unsigned int control; |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 33 | }; |
| 34 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 35 | struct uartlite_platdata { |
| 36 | struct uartlite *regs; |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 37 | }; |
| 38 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 39 | static int uartlite_serial_putc(struct udevice *dev, const char ch) |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 40 | { |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 41 | struct uartlite_platdata *plat = dev_get_platdata(dev); |
| 42 | struct uartlite *regs = plat->regs; |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 43 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 44 | if (in_be32(®s->status) & SR_TX_FIFO_FULL) |
| 45 | return -EAGAIN; |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 46 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 47 | out_be32(®s->tx_fifo, ch & 0xff); |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 48 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 49 | return 0; |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 50 | } |
| 51 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 52 | static int uartlite_serial_getc(struct udevice *dev) |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 53 | { |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 54 | struct uartlite_platdata *plat = dev_get_platdata(dev); |
| 55 | struct uartlite *regs = plat->regs; |
| 56 | |
| 57 | if (!(in_be32(®s->status) & SR_RX_FIFO_VALID_DATA)) |
| 58 | return -EAGAIN; |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 59 | |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 60 | return in_be32(®s->rx_fifo) & 0xff; |
| 61 | } |
| 62 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 63 | static int uartlite_serial_pending(struct udevice *dev, bool input) |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 64 | { |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 65 | struct uartlite_platdata *plat = dev_get_platdata(dev); |
| 66 | struct uartlite *regs = plat->regs; |
wdenk | 1249065 | 2004-04-18 21:13:41 +0000 | [diff] [blame] | 67 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 68 | if (input) |
| 69 | return in_be32(®s->status) & SR_RX_FIFO_VALID_DATA; |
| 70 | |
| 71 | return !(in_be32(®s->status) & SR_TX_FIFO_EMPTY); |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 72 | } |
| 73 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 74 | static int uartlite_serial_probe(struct udevice *dev) |
Michal Simek | d40a252 | 2012-07-02 10:32:18 +0200 | [diff] [blame] | 75 | { |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 76 | struct uartlite_platdata *plat = dev_get_platdata(dev); |
| 77 | struct uartlite *regs = plat->regs; |
Michal Simek | e5b3c1d | 2014-01-21 07:29:47 +0100 | [diff] [blame] | 78 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 79 | out_be32(®s->control, 0); |
| 80 | out_be32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); |
| 81 | in_be32(®s->control); |
Michal Simek | e5b3c1d | 2014-01-21 07:29:47 +0100 | [diff] [blame] | 82 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 83 | return 0; |
Michal Simek | d40a252 | 2012-07-02 10:32:18 +0200 | [diff] [blame] | 84 | } |
| 85 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 86 | static int uartlite_serial_ofdata_to_platdata(struct udevice *dev) |
| 87 | { |
| 88 | struct uartlite_platdata *plat = dev_get_platdata(dev); |
| 89 | |
Simon Glass | ba1dea4 | 2017-05-17 17:18:05 -0600 | [diff] [blame] | 90 | plat->regs = (struct uartlite *)devfdt_get_addr(dev); |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 91 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 92 | return 0; |
Marek Vasut | 5bcdf24 | 2012-09-09 18:48:28 +0200 | [diff] [blame] | 93 | } |
Michal Simek | 75348da | 2011-09-25 21:03:08 +0000 | [diff] [blame] | 94 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 95 | static const struct dm_serial_ops uartlite_serial_ops = { |
| 96 | .putc = uartlite_serial_putc, |
| 97 | .pending = uartlite_serial_pending, |
| 98 | .getc = uartlite_serial_getc, |
| 99 | }; |
Michal Simek | d40a252 | 2012-07-02 10:32:18 +0200 | [diff] [blame] | 100 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 101 | static const struct udevice_id uartlite_serial_ids[] = { |
| 102 | { .compatible = "xlnx,opb-uartlite-1.00.b", }, |
| 103 | { .compatible = "xlnx,xps-uartlite-1.00.a" }, |
| 104 | { } |
| 105 | }; |
Marek Vasut | d97fb5c | 2012-09-12 19:45:58 +0200 | [diff] [blame] | 106 | |
Michal Simek | 7e4372a | 2015-12-01 14:24:20 +0100 | [diff] [blame] | 107 | U_BOOT_DRIVER(serial_uartlite) = { |
| 108 | .name = "serial_uartlite", |
| 109 | .id = UCLASS_SERIAL, |
| 110 | .of_match = uartlite_serial_ids, |
| 111 | .ofdata_to_platdata = uartlite_serial_ofdata_to_platdata, |
| 112 | .platdata_auto_alloc_size = sizeof(struct uartlite_platdata), |
| 113 | .probe = uartlite_serial_probe, |
| 114 | .ops = &uartlite_serial_ops, |
| 115 | .flags = DM_FLAG_PRE_RELOC, |
| 116 | }; |
Michal Simek | 8af618b | 2015-12-14 16:55:10 +0100 | [diff] [blame] | 117 | |
| 118 | #ifdef CONFIG_DEBUG_UART_UARTLITE |
| 119 | |
| 120 | #include <debug_uart.h> |
| 121 | |
| 122 | static inline void _debug_uart_init(void) |
| 123 | { |
| 124 | struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE; |
| 125 | |
| 126 | out_be32(®s->control, 0); |
| 127 | out_be32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); |
| 128 | in_be32(®s->control); |
| 129 | } |
| 130 | |
| 131 | static inline void _debug_uart_putc(int ch) |
| 132 | { |
| 133 | struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE; |
| 134 | |
| 135 | while (in_be32(®s->status) & SR_TX_FIFO_FULL) |
| 136 | ; |
| 137 | |
| 138 | out_be32(®s->tx_fifo, ch & 0xff); |
| 139 | } |
| 140 | |
| 141 | DEBUG_UART_FUNCS |
| 142 | #endif |