blob: b4353ef5cb5d39206ea9c4114a9ac1fe05cb1810 [file] [log] [blame]
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +01001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
26#include <asm/arch/at91_common.h>
27#include <asm/arch/at91_pmc.h>
28#include <asm/arch/gpio.h>
29#include <asm/arch/io.h>
30
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020031void at91_serial0_hw_init(void)
32{
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010033 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
34
Jens Scharsigb49d15c2010-02-03 22:46:46 +010035 at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */
36 at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010037 writel(1 << AT91SAM9261_ID_US0, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020038}
39
40void at91_serial1_hw_init(void)
41{
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010042 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
43
Jens Scharsigb49d15c2010-02-03 22:46:46 +010044 at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */
45 at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010046 writel(1 << AT91SAM9261_ID_US1, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020047}
48
49void at91_serial2_hw_init(void)
50{
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010051 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
52
Jens Scharsigb49d15c2010-02-03 22:46:46 +010053 at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */
54 at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010055 writel(1 << AT91SAM9261_ID_US2, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020056}
57
58void at91_serial3_hw_init(void)
59{
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010060 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
61
Jens Scharsigb49d15c2010-02-03 22:46:46 +010062 at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */
63 at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010064 writel(1 << AT91_ID_SYS, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020065}
66
67void at91_serial_hw_init(void)
68{
69#ifdef CONFIG_USART0
70 at91_serial0_hw_init();
71#endif
72
73#ifdef CONFIG_USART1
74 at91_serial1_hw_init();
75#endif
76
77#ifdef CONFIG_USART2
78 at91_serial2_hw_init();
79#endif
80
81#ifdef CONFIG_USART3 /* DBGU */
82 at91_serial3_hw_init();
83#endif
84}
85
86#ifdef CONFIG_HAS_DATAFLASH
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010087void at91_spi0_hw_init(unsigned long cs_mask)
88{
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010089 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
90
Jens Scharsigb49d15c2010-02-03 22:46:46 +010091 at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */
92 at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */
93 at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010094
95 /* Enable clock */
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010096 writel(1 << AT91SAM9261_ID_SPI0, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010097
98 if (cs_mask & (1 << 0)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010099 at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100100 }
101 if (cs_mask & (1 << 1)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100102 at91_set_a_periph(AT91_PIO_PORTA, 4, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100103 }
104 if (cs_mask & (1 << 2)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100105 at91_set_a_periph(AT91_PIO_PORTA, 5, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100106 }
107 if (cs_mask & (1 << 3)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100108 at91_set_a_periph(AT91_PIO_PORTA, 6, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100109 }
110 if (cs_mask & (1 << 4)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100111 at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100112 }
113 if (cs_mask & (1 << 5)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100114 at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100115 }
116 if (cs_mask & (1 << 6)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100117 at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100118 }
119 if (cs_mask & (1 << 7)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100120 at91_set_pio_output(AT91_PIO_PORTA, 6, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100121 }
122}
123
124void at91_spi1_hw_init(unsigned long cs_mask)
125{
Jens Scharsiga4db1ca2010-02-03 22:46:58 +0100126 at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
127
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100128 at91_set_a_periph(AT91_PIO_PORTB, 30, 0); /* SPI1_MISO */
129 at91_set_a_periph(AT91_PIO_PORTB, 31, 0); /* SPI1_MOSI */
130 at91_set_a_periph(AT91_PIO_PORTB, 29, 0); /* SPI1_SPCK */
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100131
132 /* Enable clock */
Jens Scharsiga4db1ca2010-02-03 22:46:58 +0100133 writel(1 << AT91SAM9261_ID_SPI1, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100134
135 if (cs_mask & (1 << 0)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100136 at91_set_a_periph(AT91_PIO_PORTB, 28, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100137 }
138 if (cs_mask & (1 << 1)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100139 at91_set_b_periph(AT91_PIO_PORTA, 24, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100140 }
141 if (cs_mask & (1 << 2)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100142 at91_set_b_periph(AT91_PIO_PORTA, 25, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100143 }
144 if (cs_mask & (1 << 3)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100145 at91_set_a_periph(AT91_PIO_PORTA, 26, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100146 }
147 if (cs_mask & (1 << 4)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100148 at91_set_pio_output(AT91_PIO_PORTB, 28, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100149 }
150 if (cs_mask & (1 << 5)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100151 at91_set_pio_output(AT91_PIO_PORTA, 24, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100152 }
153 if (cs_mask & (1 << 6)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100154 at91_set_pio_output(AT91_PIO_PORTA, 25, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100155 }
156 if (cs_mask & (1 << 7)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100157 at91_set_pio_output(AT91_PIO_PORTA, 26, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100158 }
159}
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200160#endif