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Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +01001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
26#include <asm/arch/at91_common.h>
27#include <asm/arch/at91_pmc.h>
28#include <asm/arch/gpio.h>
29#include <asm/arch/io.h>
30
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020031void at91_serial0_hw_init(void)
32{
Jens Scharsigb49d15c2010-02-03 22:46:46 +010033 at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */
34 at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020035 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US0);
36}
37
38void at91_serial1_hw_init(void)
39{
Jens Scharsigb49d15c2010-02-03 22:46:46 +010040 at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */
41 at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020042 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US1);
43}
44
45void at91_serial2_hw_init(void)
46{
Jens Scharsigb49d15c2010-02-03 22:46:46 +010047 at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */
48 at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020049 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US2);
50}
51
52void at91_serial3_hw_init(void)
53{
Jens Scharsigb49d15c2010-02-03 22:46:46 +010054 at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */
55 at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020056 at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
57}
58
59void at91_serial_hw_init(void)
60{
61#ifdef CONFIG_USART0
62 at91_serial0_hw_init();
63#endif
64
65#ifdef CONFIG_USART1
66 at91_serial1_hw_init();
67#endif
68
69#ifdef CONFIG_USART2
70 at91_serial2_hw_init();
71#endif
72
73#ifdef CONFIG_USART3 /* DBGU */
74 at91_serial3_hw_init();
75#endif
76}
77
78#ifdef CONFIG_HAS_DATAFLASH
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010079void at91_spi0_hw_init(unsigned long cs_mask)
80{
Jens Scharsigb49d15c2010-02-03 22:46:46 +010081 at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */
82 at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */
83 at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010084
85 /* Enable clock */
86 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
87
88 if (cs_mask & (1 << 0)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010089 at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010090 }
91 if (cs_mask & (1 << 1)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010092 at91_set_a_periph(AT91_PIO_PORTA, 4, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010093 }
94 if (cs_mask & (1 << 2)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010095 at91_set_a_periph(AT91_PIO_PORTA, 5, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010096 }
97 if (cs_mask & (1 << 3)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010098 at91_set_a_periph(AT91_PIO_PORTA, 6, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +010099 }
100 if (cs_mask & (1 << 4)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100101 at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100102 }
103 if (cs_mask & (1 << 5)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100104 at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100105 }
106 if (cs_mask & (1 << 6)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100107 at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100108 }
109 if (cs_mask & (1 << 7)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100110 at91_set_pio_output(AT91_PIO_PORTA, 6, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100111 }
112}
113
114void at91_spi1_hw_init(unsigned long cs_mask)
115{
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100116 at91_set_a_periph(AT91_PIO_PORTB, 30, 0); /* SPI1_MISO */
117 at91_set_a_periph(AT91_PIO_PORTB, 31, 0); /* SPI1_MOSI */
118 at91_set_a_periph(AT91_PIO_PORTB, 29, 0); /* SPI1_SPCK */
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100119
120 /* Enable clock */
121 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI1);
122
123 if (cs_mask & (1 << 0)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100124 at91_set_a_periph(AT91_PIO_PORTB, 28, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100125 }
126 if (cs_mask & (1 << 1)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100127 at91_set_b_periph(AT91_PIO_PORTA, 24, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100128 }
129 if (cs_mask & (1 << 2)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100130 at91_set_b_periph(AT91_PIO_PORTA, 25, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100131 }
132 if (cs_mask & (1 << 3)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100133 at91_set_a_periph(AT91_PIO_PORTA, 26, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100134 }
135 if (cs_mask & (1 << 4)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100136 at91_set_pio_output(AT91_PIO_PORTB, 28, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100137 }
138 if (cs_mask & (1 << 5)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100139 at91_set_pio_output(AT91_PIO_PORTA, 24, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100140 }
141 if (cs_mask & (1 << 6)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100142 at91_set_pio_output(AT91_PIO_PORTA, 25, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100143 }
144 if (cs_mask & (1 << 7)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100145 at91_set_pio_output(AT91_PIO_PORTA, 26, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100146 }
147}
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200148#endif