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git01.mediatek.com / filogic / uboot / a4a2912434b417b6eb6611b1e1fa884004717cdb / . / drivers / pci / pcie_layerscape_fixup_common.c
blob: c11c691b864b462df53ed32a0d7172de38572388 [file] [log] [blame]
Wasim Khan54e44ef2020-01-06 12:05:57 +0000[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019-2020 NXP
4 *
5 * PCIe DT fixup for NXP Layerscape SoCs
6 * Author: Wasim Khan <wasim.khan@nxp.com>
7 *
8 */
9
10#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -0600[diff] [blame]11#include <init.h>
Wasim Khan54e44ef2020-01-06 12:05:57 +0000[diff] [blame]12#include <asm/arch/clock.h>
13#include <asm/arch/soc.h>
14#include "pcie_layerscape_fixup_common.h"
15
16void ft_pci_setup(void *blob, bd_t *bd)
17{
18#if defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
19 uint svr;
20
21 svr = SVR_SOC_VER(get_svr());
22
23 if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 1, 0))
24 ft_pci_setup_ls_gen4(blob, bd);
25 else
26#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */
27 ft_pci_setup_ls(blob, bd);
28}
Wasim Khan9d3d2302020-01-06 12:05:59 +0000[diff] [blame]29
30#if defined(CONFIG_FSL_LAYERSCAPE)
Wasim Khan70bec5c2020-01-06 12:06:00 +0000[diff] [blame]31int lx2_board_fix_fdt(void *fdt)
32{
33 char *reg_name, *old_str, *new_str;
34 const char *reg_names;
35 int names_len, old_str_len, new_str_len, remaining_str_len;
36 struct str_map {
37 char *old_str;
38 char *new_str;
39 } reg_names_map[] = {
40 { "csr_axi_slave", "regs" },
41 { "config_axi_slave", "config" }
42 };
43 int off = -1, i;
44
45 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie");
46 while (off != -FDT_ERR_NOTFOUND) {
47 fdt_setprop(fdt, off, "compatible", "fsl,ls2088a-pcie",
48 strlen("fsl,ls2088a-pcie") + 1);
49
50 reg_names = fdt_getprop(fdt, off, "reg-names", &names_len);
51 if (!reg_names)
52 continue;
53 reg_name = (char *)reg_names;
54 remaining_str_len = names_len - (reg_name - reg_names);
55 i = 0;
56 while ((i < ARRAY_SIZE(reg_names_map)) && remaining_str_len) {
57 old_str = reg_names_map[i].old_str;
58 new_str = reg_names_map[i].new_str;
59 old_str_len = strlen(old_str);
60 new_str_len = strlen(new_str);
61 if (memcmp(reg_name, old_str, old_str_len) == 0) {
62 /* first only leave required bytes for new_str
63 * and copy rest of the string after it
64 */
65 memcpy(reg_name + new_str_len,
66 reg_name + old_str_len,
67 remaining_str_len - old_str_len);
68
69 /* Now copy new_str */
70 memcpy(reg_name, new_str, new_str_len);
71 names_len -= old_str_len;
72 names_len += new_str_len;
73 i++;
74 }
75
76 reg_name = memchr(reg_name, '\0', remaining_str_len);
77 if (!reg_name)
78 break;
79 reg_name += 1;
80
81 remaining_str_len = names_len - (reg_name - reg_names);
82 }
83 fdt_setprop(fdt, off, "reg-names", reg_names, names_len);
84 fdt_delprop(fdt, off, "apio-wins");
85 fdt_delprop(fdt, off, "ppio-wins");
86 off = fdt_node_offset_by_compatible(fdt, off,
87 "fsl,lx2160a-pcie");
88 }
89 return 0;
90}
91
92int pcie_board_fix_fdt(void *fdt)
93{
94 uint svr;
95
96 svr = SVR_SOC_VER(get_svr());
97
98 if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 2, 0))
99 return lx2_board_fix_fdt(fdt);
100
101 return 0;
102}
103
Wasim Khan9d3d2302020-01-06 12:05:59 +0000[diff] [blame]104#ifdef CONFIG_ARCH_LX2160A
105/* returns the next available streamid for pcie, -errno if failed */
106int pcie_next_streamid(int currentid, int idx)
107{
108 if (currentid > FSL_PEX_STREAM_ID_END)
109 return -EINVAL;
110
111 return currentid | ((idx + 1) << 11);
112}
113#else
114/* returns the next available streamid for pcie, -errno if failed */
115int pcie_next_streamid(int currentid, int idx)
116{
117 static int next_stream_id = FSL_PEX_STREAM_ID_START;
118
119 if (next_stream_id > FSL_PEX_STREAM_ID_END)
120 return -EINVAL;
121
122 return next_stream_id++;
123}
124#endif
125#endif /* CONFIG_FSL_LAYERSCAPE */