| Wasim Khan | 54e44ef | 2020-01-06 12:05:57 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2019-2020 NXP |
| 4 | * |
| 5 | * PCIe DT fixup for NXP Layerscape SoCs |
| 6 | * Author: Wasim Khan <wasim.khan@nxp.com> |
| 7 | * |
| 8 | */ |
| 9 | |
| 10 | #include <common.h> |
| 11 | #include <asm/arch/clock.h> |
| 12 | #include <asm/arch/soc.h> |
| 13 | #include "pcie_layerscape_fixup_common.h" |
| 14 | |
| 15 | void ft_pci_setup(void *blob, bd_t *bd) |
| 16 | { |
| 17 | #if defined(CONFIG_PCIE_LAYERSCAPE_GEN4) |
| 18 | uint svr; |
| 19 | |
| 20 | svr = SVR_SOC_VER(get_svr()); |
| 21 | |
| 22 | if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 1, 0)) |
| 23 | ft_pci_setup_ls_gen4(blob, bd); |
| 24 | else |
| 25 | #endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */ |
| 26 | ft_pci_setup_ls(blob, bd); |
| 27 | } |