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git01.mediatek.com / filogic / uboot / a40f7825e10cf7bc40153dce2d468a091e5ae871 / . / configs / x530_defconfig
blob: 68f8870eed319d28f470111d2e0d85938050c007 [file] [log] [blame]
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]3CONFIG_ARCH_MVEBU=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]4CONFIG_TEXT_BASE=0x00800000
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]5CONFIG_SPL_LIBCOMMON_SUPPORT=y
6CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=2
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]8CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
9CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]10CONFIG_TARGET_X530=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]11CONFIG_ENV_SIZE=0x10000
12CONFIG_ENV_OFFSET=0x100000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]13CONFIG_ENV_SECT_SIZE=0x40000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]14CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]15CONFIG_SPL_TEXT_BASE=0x40000030
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]16CONFIG_SPL_SERIAL=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]17CONFIG_SPL_STACK=0x4002c000
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]18CONFIG_SPL=y
Pali Rohár40954732022-05-09 20:17:07 +0200[diff] [blame]19CONFIG_DEBUG_UART_BASE=0xf1012000
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]20CONFIG_DEBUG_UART_CLOCK=250000000
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]21CONFIG_SYS_LOAD_ADDR=0x1000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]22CONFIG_ENV_ADDR=0x100000
23CONFIG_DEBUG_UART=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]24CONFIG_FIT=y
25CONFIG_FIT_VERBOSE=y
26CONFIG_SILENT_CONSOLE=y
27CONFIG_SILENT_U_BOOT_ONLY=y
28CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y
Tom Rini36f48792021-10-30 23:03:57 -0400[diff] [blame]29CONFIG_DISPLAY_BOARDINFO_LATE=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]30CONFIG_MISC_INIT_R=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]31CONFIG_SPL_MAX_SIZE=0x22fd0
Tom Rini65aa1242022-05-27 10:19:45 -0400[diff] [blame]32CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
33CONFIG_SPL_BSS_START_ADDR=0x40023000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]34CONFIG_SPL_BSS_MAX_SIZE=0x4000
Chris Packham17ca1432019-02-18 10:30:54 +1300[diff] [blame]35CONFIG_SPL_BOARD_INIT=y
Tom Rinie7d67a42022-05-20 12:36:05 -0400[diff] [blame]36CONFIG_SPL_SYS_MALLOC_SIMPLE=y
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]37# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Simon Glass1ba1d4e2021-07-10 21:14:28 -0600[diff] [blame]38CONFIG_SPL_WATCHDOG=y
Tom Riniae17fa32022-05-11 18:01:06 -0400[diff] [blame]39CONFIG_SYS_CBSIZE=256
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]40CONFIG_SYS_PBSIZE=276
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]41CONFIG_CMD_MEMINFO=y
42# CONFIG_CMD_FLASH is not set
43CONFIG_CMD_GPIO=y
44CONFIG_CMD_I2C=y
Tom Rini32c75d62020-05-26 15:06:18 -0400[diff] [blame]45CONFIG_CMD_PCI=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]46CONFIG_CMD_SPI=y
47CONFIG_CMD_USB=y
48# CONFIG_CMD_SETEXPR is not set
49CONFIG_CMD_DHCP=y
50CONFIG_CMD_TFTPPUT=y
51CONFIG_CMD_MII=y
52CONFIG_CMD_PING=y
53CONFIG_CMD_CACHE=y
54CONFIG_CMD_TIME=y
55CONFIG_CMD_EXT2=y
56CONFIG_CMD_EXT4=y
57CONFIG_CMD_FAT=y
58CONFIG_CMD_FS_GENERIC=y
Tom Rini32c75d62020-05-26 15:06:18 -0400[diff] [blame]59CONFIG_CMD_MTDPARTS=y
Patrick Delaunaya6a44392022-12-07 09:26:41 +0100[diff] [blame]60CONFIG_MTDIDS_DEFAULT="nand0=nand"
61CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:240M(user),8M(errlog),8M(nand-bbt)"
Tom Rini32c75d62020-05-26 15:06:18 -0400[diff] [blame]62CONFIG_CMD_UBI=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]63CONFIG_ENV_OVERWRITE=y
Tom Rinia8a77502022-03-11 09:12:01 -0500[diff] [blame]64CONFIG_ARP_TIMEOUT=200
Tom Rini26011a32022-03-11 09:12:02 -0500[diff] [blame]65CONFIG_NET_RETRY_COUNT=50
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]66CONFIG_SPL_OF_TRANSLATE=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]67CONFIG_DM_I2C=y
68CONFIG_SYS_I2C_MVTWSI=y
69CONFIG_I2C_MUX=y
70CONFIG_I2C_MUX_PCA954x=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]71# CONFIG_MMC is not set
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]72CONFIG_MTD=y
Miquel Raynald0935362019-10-03 19:50:03 +0200[diff] [blame]73CONFIG_MTD_RAW_NAND=y
Stefan Roese23b37f92019-08-22 12:28:04 +0200[diff] [blame]74CONFIG_SYS_NAND_USE_FLASH_BBT=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]75CONFIG_NAND_PXA3XX=y
Tom Rinifdae0072021-09-22 14:50:34 -0400[diff] [blame]76CONFIG_SYS_NAND_ONFI_DETECTION=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]77CONFIG_SF_DEFAULT_BUS=1
78CONFIG_SF_DEFAULT_SPEED=50000000
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]79CONFIG_SPI_FLASH_MACRONIX=y
80CONFIG_SPI_FLASH_STMICRO=y
81CONFIG_SPI_FLASH_SST=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]82CONFIG_PCI=y
Stefan Roese3179ec62019-01-25 11:52:43 +0100[diff] [blame]83CONFIG_PCI_MVEBU=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]84CONFIG_DM_RTC=y
85CONFIG_RTC_DS1307=y
Tom Rini37576b62020-06-16 19:06:21 -0400[diff] [blame]86CONFIG_SPECIFY_CONSOLE_INDEX=y
Pali Rohár40954732022-05-09 20:17:07 +0200[diff] [blame]87CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]88CONFIG_DEBUG_UART_SHIFT=2
89CONFIG_SYS_NS16550=y
90CONFIG_KIRKWOOD_SPI=y
91CONFIG_USB=y
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]92CONFIG_USB_EHCI_HCD=y
93CONFIG_USB_STORAGE=y
94CONFIG_USB_HOST_ETHER=y
95CONFIG_USB_ETHER_ASIX=y
96CONFIG_USB_ETHER_ASIX88179=y
Chris Packham17ca1432019-02-18 10:30:54 +1300[diff] [blame]97CONFIG_WDT=y
98CONFIG_WDT_ORION=y
Stefan Roese691aa9c2021-05-12 09:18:37 +0200[diff] [blame]99CONFIG_SPL_TINY_MEMSET=y