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Stelian Pop0bf5cad2008-05-08 18:52:25 +02001/*
2 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Stelian Pop0bf5cad2008-05-08 18:52:25 +02004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9RLEK board.
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Stelian Pop0bf5cad2008-05-08 18:52:25 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Xu, Hong0c0fb212011-08-01 03:56:53 +000014#include <asm/hardware.h>
15
16#define CONFIG_SYS_TEXT_BASE 0x21F00000
Jens Scharsig128ecd02010-02-03 22:45:42 +010017
Stelian Pop0bf5cad2008-05-08 18:52:25 +020018/* ARM asynchronous clock */
Xu, Hong0c0fb212011-08-01 03:56:53 +000019#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
20#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
Stelian Pop0bf5cad2008-05-08 18:52:25 +020021
Xu, Hong0c0fb212011-08-01 03:56:53 +000022#define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */
23
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020024#define CONFIG_ARCH_CPU_INIT
Xu, Hong0c0fb212011-08-01 03:56:53 +000025#define CONFIG_SKIP_LOWLEVEL_INIT
Stelian Pop0bf5cad2008-05-08 18:52:25 +020026
Xu, Hong0c0fb212011-08-01 03:56:53 +000027#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
28#define CONFIG_SETUP_MEMORY_TAGS 1
29#define CONFIG_INITRD_TAG 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +020030
Xu, Hong0c0fb212011-08-01 03:56:53 +000031#define CONFIG_ATMEL_LEGACY
Stelian Pop0bf5cad2008-05-08 18:52:25 +020032
33/*
34 * Hardware drivers
35 */
Xu, Hong0c0fb212011-08-01 03:56:53 +000036
Stelian Popcea5c532008-05-08 14:52:32 +020037/* LCD */
Stelian Popcea5c532008-05-08 14:52:32 +020038#define LCD_BPP LCD_COLOR8
39#define CONFIG_LCD_LOGO 1
40#undef LCD_TEST_PATTERN
41#define CONFIG_LCD_INFO 1
42#define CONFIG_LCD_INFO_BELOW_LOGO 1
Stelian Popcea5c532008-05-08 14:52:32 +020043#define CONFIG_ATMEL_LCD 1
44#define CONFIG_ATMEL_LCD_RGB565 1
Xu, Hong0c0fb212011-08-01 03:56:53 +000045/* Let board_init_f handle the framebuffer allocation */
46#undef CONFIG_FB_ADDR
Xu, Hong0c0fb212011-08-01 03:56:53 +000047
Stelian Pop0bf5cad2008-05-08 18:52:25 +020048/*
49 * Command line configuration.
50 */
Stelian Pop0bf5cad2008-05-08 18:52:25 +020051
Xu, Hong0c0fb212011-08-01 03:56:53 +000052#define CONFIG_CMD_NAND 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +020053
54/* SDRAM */
55#define CONFIG_NR_DRAM_BANKS 1
Xu, Hong0c0fb212011-08-01 03:56:53 +000056#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
57#define CONFIG_SYS_SDRAM_SIZE 0x04000000
58
59#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yang3cbbeb12017-04-18 15:28:27 +080060 (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Stelian Pop0bf5cad2008-05-08 18:52:25 +020061
62/* DataFlash */
Jean-Christophe PLAGNIOL-VILLARDe5437ac2009-03-27 23:26:44 +010063#define CONFIG_ATMEL_DATAFLASH_SPI
Xu, Hong0c0fb212011-08-01 03:56:53 +000064#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020065#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
66#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
Xu, Hong0c0fb212011-08-01 03:56:53 +000067#define AT91_SPI_CLK 15000000
68#define DATAFLASH_TCSS (0x1a << 16)
69#define DATAFLASH_TCHS (0x1 << 24)
Stelian Pop0bf5cad2008-05-08 18:52:25 +020070
Stelian Pop0bf5cad2008-05-08 18:52:25 +020071/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010072#ifdef CONFIG_CMD_NAND
73#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020074#define CONFIG_SYS_MAX_NAND_DEVICE 1
Xu, Hong0c0fb212011-08-01 03:56:53 +000075#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020076#define CONFIG_SYS_NAND_DBW_8 1
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010077/* our ALE is AD21 */
78#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
79/* our CLE is AD22 */
80#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
81#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
82#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
Wolfgang Denk1f797742009-07-18 21:52:24 +020083
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010084#endif
Stelian Pop0bf5cad2008-05-08 18:52:25 +020085
86/* Ethernet - not present */
87
88/* USB - not supported */
89
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020090#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Pop0bf5cad2008-05-08 18:52:25 +020091
Xu, Hong0c0fb212011-08-01 03:56:53 +000092#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020093#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Pop0bf5cad2008-05-08 18:52:25 +020094
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020095#ifdef CONFIG_SYS_USE_DATAFLASH
Stelian Pop0bf5cad2008-05-08 18:52:25 +020096
97/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Jean-Christophe PLAGNIOL-VILLARD2b14d2b2008-09-10 22:47:58 +020098#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020099#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200100#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200101#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200102#define CONFIG_ENV_SIZE 0x4200
Alexandre Belloni9ef19ba2012-07-02 04:26:58 +0000103#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200104#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
105 "root=/dev/mtdblock0 " \
Albin Tonnerreeaa6db22009-07-22 18:30:03 +0200106 "mtdparts=atmel_nand:-(root) "\
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200107 "rw rootfstype=jffs2"
108
Wu, Josh7ff194f2015-02-02 17:51:01 +0800109#elif CONFIG_SYS_USE_NANDFLASH
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200110
111/* bootstrap + u-boot + env + linux in nandflash */
Xu, Hong0c0fb212011-08-01 03:56:53 +0000112#define CONFIG_ENV_IS_IN_NAND 1
Wenyou Yang3cbbeb12017-04-18 15:28:27 +0800113#define CONFIG_ENV_OFFSET 0x120000
Wu, Joshf8e70d92015-02-03 11:38:30 +0800114#define CONFIG_ENV_OFFSET_REDUND 0x100000
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200115#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Wu, Joshf8e70d92015-02-03 11:38:30 +0800116#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \
117 "nand read 0x21000000 0x180000 0x80000; " \
118 "bootz 0x22000000 - 0x21000000"
119#define CONFIG_BOOTARGS \
120 "console=ttyS0,115200 earlyprintk " \
121 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
Robert P. J. Daya7e1f502016-09-01 09:49:14 -0400122 "256K(env),256k(env_redundant),256k(spare)," \
Wu, Joshf8e70d92015-02-03 11:38:30 +0800123 "512k(dtb),6M(kernel)ro,-(rootfs) " \
124 "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200125
Wu, Josh7ff194f2015-02-02 17:51:01 +0800126#else /* CONFIG_SYS_USE_MMC */
127
128/* bootstrap + u-boot + env + linux in mmc */
129#define CONFIG_ENV_IS_IN_FAT
130#define CONFIG_FAT_WRITE
131#define FAT_ENV_INTERFACE "mmc"
132#define FAT_ENV_FILE "uboot.env"
133#define FAT_ENV_DEVICE_AND_PART "0"
134#define CONFIG_ENV_SIZE 0x4000
135#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
136 "fatload mmc 0:1 0x22000000 zImage; " \
137 "bootz 0x22000000 - 0x21000000"
138#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
139 "mtdparts=atmel_nand:" \
140 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
141 "root=/dev/mmcblk0p2 rw rootwait"
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200142#endif
143
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200144#define CONFIG_SYS_CBSIZE 256
145#define CONFIG_SYS_MAXARGS 16
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200146#define CONFIG_SYS_LONGHELP 1
Xu, Hong0c0fb212011-08-01 03:56:53 +0000147#define CONFIG_CMDLINE_EDITING 1
Alexandre Belloni9ef19ba2012-07-02 04:26:58 +0000148#define CONFIG_AUTO_COMPLETE
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200149
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200150/*
151 * Size of malloc() pool
152 */
Xu, Hong0c0fb212011-08-01 03:56:53 +0000153#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200154
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200155#endif