| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 1 | # |
| 2 | # From Coreboot src/northbridge/intel/sandybridge/Kconfig |
| 3 | # |
| 4 | # Copyright (C) 2010 Google Inc. |
| 5 | # |
| 6 | # SPDX-License-Identifier: GPL-2.0 |
| 7 | |
| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 8 | config NORTHBRIDGE_INTEL_IVYBRIDGE |
| 9 | bool |
| Simon Glass | d4e9074 | 2016-03-11 22:07:08 -0700 | [diff] [blame] | 10 | select CACHE_MRC_BIN if HAVE_MRC |
| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 11 | |
| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 12 | if NORTHBRIDGE_INTEL_IVYBRIDGE |
| 13 | |
| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 14 | config DCACHE_RAM_BASE |
| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 15 | default 0xff7e0000 |
| 16 | |
| 17 | config DCACHE_RAM_SIZE |
| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 18 | default 0x20000 |
| 19 | |
| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 20 | config DCACHE_RAM_MRC_VAR_SIZE |
| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 21 | default 0x4000 |
| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 22 | |
| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 23 | config CPU_SPECIFIC_OPTIONS |
| 24 | def_bool y |
| 25 | select SMM_TSEG |
| Simon Glass | 268eefd | 2014-11-12 22:42:28 -0700 | [diff] [blame] | 26 | select X86_RAMTEST |
| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 27 | |
| 28 | config SMM_TSEG_SIZE |
| 29 | hex |
| 30 | default 0x800000 |
| 31 | |
| 32 | config ENABLE_VMX |
| 33 | bool "Enable VMX for virtualization" |
| 34 | default n |
| 35 | help |
| 36 | Virtual Machine Extensions are provided in many x86 CPUs. These |
| 37 | provide various facilities for allowing a host OS to provide an |
| 38 | environment where potentially several guest OSes have only |
| 39 | limited access to the underlying hardware. This is achieved |
| 40 | without resorting to software trapping and/or instruction set |
| 41 | emulation (which would be very slow). |
| 42 | |
| 43 | Intel's implementation of this is called VT-x. This option enables |
| 44 | VT-x this so that the OS that is booted by U-Boot can make use of |
| 45 | these facilities. If this option is not enabled, then the host OS |
| 46 | will be unable to support virtualisation, or it will run very |
| 47 | slowly. |
| 48 | |
| Bin Meng | 5dbe304 | 2016-02-17 00:16:21 -0800 | [diff] [blame] | 49 | config FSP_ADDR |
| 50 | hex |
| 51 | default 0xfff80000 |
| 52 | |
| 53 | config FSP_USE_UPD |
| 54 | bool |
| 55 | default n |
| 56 | |
| Bin Meng | 5afa22a | 2016-02-17 00:16:25 -0800 | [diff] [blame] | 57 | config FSP_BROKEN_HOB |
| 58 | bool |
| 59 | default y |
| 60 | |
| Simon Glass | 0b36ecd | 2014-11-12 22:42:07 -0700 | [diff] [blame] | 61 | endif |