Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 1 | /* |
Enric Balletbò i Serra | 19f9df8 | 2012-03-05 11:32:16 +0000 | [diff] [blame] | 2 | * Common configuration settings for IGEP technology based boards |
| 3 | * |
| 4 | * (C) Copyright 2012 |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 5 | * ISEE 2007 SL, <www.iseebcn.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | |
Enric Balletbò i Serra | 19f9df8 | 2012-03-05 11:32:16 +0000 | [diff] [blame] | 23 | #ifndef __IGEP00X0_H |
| 24 | #define __IGEP00X0_H |
| 25 | |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 26 | #include <asm/sizes.h> |
| 27 | |
| 28 | /* |
| 29 | * High Level Configuration Options |
| 30 | */ |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 31 | #define CONFIG_OMAP 1 /* in a TI OMAP core */ |
| 32 | #define CONFIG_OMAP34XX 1 /* which is a 34XX */ |
Marek Vasut | aede188 | 2012-07-21 05:02:23 +0000 | [diff] [blame] | 33 | #define CONFIG_OMAP_GPIO |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 34 | |
| 35 | #define CONFIG_SDRC /* The chip has SDRC controller */ |
| 36 | |
| 37 | #include <asm/arch/cpu.h> |
| 38 | #include <asm/arch/omap3.h> |
| 39 | |
| 40 | /* |
| 41 | * Display CPU and Board information |
| 42 | */ |
| 43 | #define CONFIG_DISPLAY_CPUINFO 1 |
| 44 | #define CONFIG_DISPLAY_BOARDINFO 1 |
| 45 | |
| 46 | /* Clock Defines */ |
| 47 | #define V_OSCK 26000000 /* Clock output from T2 */ |
| 48 | #define V_SCLK (V_OSCK >> 1) |
| 49 | |
| 50 | #define CONFIG_MISC_INIT_R |
| 51 | |
| 52 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 53 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 54 | #define CONFIG_INITRD_TAG 1 |
| 55 | #define CONFIG_REVISION_TAG 1 |
| 56 | |
Grant Likely | 100b849 | 2011-03-28 09:59:07 +0000 | [diff] [blame] | 57 | #define CONFIG_OF_LIBFDT 1 |
| 58 | |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 59 | /* |
| 60 | * NS16550 Configuration |
| 61 | */ |
| 62 | |
| 63 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
| 64 | |
| 65 | #define CONFIG_SYS_NS16550 |
| 66 | #define CONFIG_SYS_NS16550_SERIAL |
| 67 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 68 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
| 69 | |
| 70 | /* select serial console configuration */ |
| 71 | #define CONFIG_CONS_INDEX 3 |
| 72 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
| 73 | #define CONFIG_SERIAL3 3 |
| 74 | |
| 75 | /* allow to overwrite serial and ethaddr */ |
| 76 | #define CONFIG_ENV_OVERWRITE |
| 77 | #define CONFIG_BAUDRATE 115200 |
Enric Balletbò i Serra | 19f9df8 | 2012-03-05 11:32:16 +0000 | [diff] [blame] | 78 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ |
| 79 | 115200} |
Enric Balletbo i Serra | da898a9 | 2010-11-04 15:34:33 -0400 | [diff] [blame] | 80 | #define CONFIG_GENERIC_MMC 1 |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 81 | #define CONFIG_MMC 1 |
Enric Balletbo i Serra | da898a9 | 2010-11-04 15:34:33 -0400 | [diff] [blame] | 82 | #define CONFIG_OMAP_HSMMC 1 |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 83 | #define CONFIG_DOS_PARTITION 1 |
| 84 | |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 85 | /* USB */ |
| 86 | #define CONFIG_MUSB_UDC 1 |
| 87 | #define CONFIG_USB_OMAP3 1 |
| 88 | #define CONFIG_TWL4030_USB 1 |
| 89 | |
| 90 | /* USB device configuration */ |
| 91 | #define CONFIG_USB_DEVICE 1 |
| 92 | #define CONFIG_USB_TTY 1 |
| 93 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 |
| 94 | |
| 95 | /* Change these to suit your needs */ |
| 96 | #define CONFIG_USBD_VENDORID 0x0451 |
| 97 | #define CONFIG_USBD_PRODUCTID 0x5678 |
| 98 | #define CONFIG_USBD_MANUFACTURER "Texas Instruments" |
| 99 | #define CONFIG_USBD_PRODUCT_NAME "IGEP" |
| 100 | |
| 101 | /* commands to include */ |
| 102 | #include <config_cmd_default.h> |
| 103 | |
| 104 | #define CONFIG_CMD_CACHE |
| 105 | #define CONFIG_CMD_EXT2 /* EXT2 Support */ |
| 106 | #define CONFIG_CMD_FAT /* FAT support */ |
| 107 | #define CONFIG_CMD_I2C /* I2C serial bus support */ |
| 108 | #define CONFIG_CMD_MMC /* MMC support */ |
Javier Martinez Canillas | 758b7c6 | 2012-07-28 01:19:32 +0000 | [diff] [blame] | 109 | #ifdef CONFIG_BOOT_ONENAND |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 110 | #define CONFIG_CMD_ONENAND /* ONENAND support */ |
Javier Martinez Canillas | 758b7c6 | 2012-07-28 01:19:32 +0000 | [diff] [blame] | 111 | #endif |
| 112 | #ifdef CONFIG_BOOT_NAND |
| 113 | #define CONFIG_CMD_NAND |
| 114 | #endif |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 115 | #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ |
| 116 | #define CONFIG_CMD_DHCP |
| 117 | #define CONFIG_CMD_PING |
| 118 | #define CONFIG_CMD_NFS /* NFS support */ |
| 119 | #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ |
| 120 | #define CONFIG_MTD_DEVICE |
| 121 | |
| 122 | #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ |
| 123 | #undef CONFIG_CMD_IMLS /* List all found images */ |
| 124 | |
| 125 | #define CONFIG_SYS_NO_FLASH |
| 126 | #define CONFIG_HARD_I2C 1 |
| 127 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 128 | #define CONFIG_SYS_I2C_SLAVE 1 |
| 129 | #define CONFIG_SYS_I2C_BUS 0 |
| 130 | #define CONFIG_SYS_I2C_BUS_SELECT 1 |
| 131 | #define CONFIG_DRIVER_OMAP34XX_I2C 1 |
| 132 | |
| 133 | /* |
| 134 | * TWL4030 |
| 135 | */ |
| 136 | #define CONFIG_TWL4030_POWER 1 |
| 137 | |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 138 | #define CONFIG_BOOTDELAY 3 |
| 139 | |
| 140 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Enric Balletbo i Serra | 4adf801 | 2011-04-19 09:16:36 -0400 | [diff] [blame] | 141 | "usbtty=cdc_acm\0" \ |
| 142 | "loadaddr=0x82000000\0" \ |
| 143 | "usbtty=cdc_acm\0" \ |
Javier Martinez Canillas | df32d2c | 2012-06-29 02:45:40 +0000 | [diff] [blame] | 144 | "console=ttyO2,115200n8\0" \ |
Enric Balletbo i Serra | 52ac7ac | 2012-04-25 02:34:31 +0000 | [diff] [blame] | 145 | "mpurate=auto\0" \ |
Enric Balletbo i Serra | 4adf801 | 2011-04-19 09:16:36 -0400 | [diff] [blame] | 146 | "vram=12M\0" \ |
| 147 | "dvimode=1024x768MR-16@60\0" \ |
| 148 | "defaultdisplay=dvi\0" \ |
| 149 | "mmcdev=0\0" \ |
| 150 | "mmcroot=/dev/mmcblk0p2 rw\0" \ |
Javier Martinez Canillas | c5d6fb2 | 2012-06-29 02:45:41 +0000 | [diff] [blame] | 151 | "mmcrootfstype=ext4 rootwait\0" \ |
Enric Balletbo i Serra | 4adf801 | 2011-04-19 09:16:36 -0400 | [diff] [blame] | 152 | "nandroot=/dev/mtdblock4 rw\0" \ |
| 153 | "nandrootfstype=jffs2\0" \ |
| 154 | "mmcargs=setenv bootargs console=${console} " \ |
| 155 | "mpurate=${mpurate} " \ |
| 156 | "vram=${vram} " \ |
| 157 | "omapfb.mode=dvi:${dvimode} " \ |
| 158 | "omapfb.debug=y " \ |
| 159 | "omapdss.def_disp=${defaultdisplay} " \ |
| 160 | "root=${mmcroot} " \ |
| 161 | "rootfstype=${mmcrootfstype}\0" \ |
| 162 | "nandargs=setenv bootargs console=${console} " \ |
| 163 | "mpurate=${mpurate} " \ |
| 164 | "vram=${vram} " \ |
| 165 | "omapfb.mode=dvi:${dvimode} " \ |
| 166 | "omapfb.debug=y " \ |
| 167 | "omapdss.def_disp=${defaultdisplay} " \ |
| 168 | "root=${nandroot} " \ |
| 169 | "rootfstype=${nandrootfstype}\0" \ |
Enric Balletbo i Serra | d7cba70 | 2012-04-25 02:33:50 +0000 | [diff] [blame] | 170 | "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ |
| 171 | "importbootenv=echo Importing environment from mmc ...; " \ |
| 172 | "env import -t $loadaddr $filesize\0" \ |
Enric Balletbo i Serra | 4adf801 | 2011-04-19 09:16:36 -0400 | [diff] [blame] | 173 | "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ |
| 174 | "mmcboot=echo Booting from mmc ...; " \ |
| 175 | "run mmcargs; " \ |
| 176 | "bootm ${loadaddr}\0" \ |
| 177 | "nandboot=echo Booting from onenand ...; " \ |
| 178 | "run nandargs; " \ |
| 179 | "onenand read ${loadaddr} 280000 400000; " \ |
| 180 | "bootm ${loadaddr}\0" \ |
| 181 | |
| 182 | #define CONFIG_BOOTCOMMAND \ |
Andrew Bradford | e1c7c8a | 2012-10-01 05:06:52 +0000 | [diff] [blame] | 183 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
Enric Balletbo i Serra | d7cba70 | 2012-04-25 02:33:50 +0000 | [diff] [blame] | 184 | "echo SD/MMC found on device ${mmcdev};" \ |
| 185 | "if run loadbootenv; then " \ |
| 186 | "run importbootenv;" \ |
| 187 | "fi;" \ |
| 188 | "if test -n $uenvcmd; then " \ |
| 189 | "echo Running uenvcmd ...;" \ |
| 190 | "run uenvcmd;" \ |
| 191 | "fi;" \ |
| 192 | "if run loaduimage; then " \ |
| 193 | "run mmcboot;" \ |
| 194 | "fi;" \ |
| 195 | "fi;" \ |
| 196 | "run nandboot;" \ |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 197 | |
| 198 | #define CONFIG_AUTO_COMPLETE 1 |
| 199 | |
| 200 | /* |
| 201 | * Miscellaneous configurable options |
| 202 | */ |
| 203 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 204 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 205 | #define CONFIG_SYS_PROMPT "U-Boot # " |
| 206 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 207 | /* Print Buffer Size */ |
| 208 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 209 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 210 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 211 | /* Boot Argument Buffer Size */ |
| 212 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
| 213 | |
| 214 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ |
| 215 | /* works on */ |
| 216 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ |
| 217 | 0x01F00000) /* 31MB */ |
| 218 | |
| 219 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ |
| 220 | /* load address */ |
| 221 | |
| 222 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) |
| 223 | |
| 224 | /* |
| 225 | * OMAP3 has 12 GP timers, they can be driven by the system clock |
| 226 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
| 227 | * This rate is divided by a local divisor. |
| 228 | */ |
| 229 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) |
| 230 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
| 231 | #define CONFIG_SYS_HZ 1000 |
| 232 | |
| 233 | /* |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 234 | * Physical Memory Map |
| 235 | * |
| 236 | */ |
| 237 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
| 238 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
| 239 | #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */ |
| 240 | #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 |
| 241 | |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 242 | /* |
| 243 | * FLASH and environment organization |
| 244 | */ |
| 245 | |
Javier Martinez Canillas | 758b7c6 | 2012-07-28 01:19:32 +0000 | [diff] [blame] | 246 | #ifdef CONFIG_BOOT_ONENAND |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 247 | #define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */ |
| 248 | |
| 249 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP |
| 250 | |
| 251 | #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ |
| 252 | |
| 253 | #define CONFIG_ENV_IS_IN_ONENAND 1 |
| 254 | #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ |
| 255 | #define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET |
Javier Martinez Canillas | 758b7c6 | 2012-07-28 01:19:32 +0000 | [diff] [blame] | 256 | #endif |
| 257 | |
| 258 | #ifdef CONFIG_BOOT_NAND |
| 259 | #define PISMO1_NAND_SIZE GPMC_SIZE_128M /* Configure the PISMO */ |
| 260 | #define CONFIG_NAND_OMAP_GPMC |
| 261 | #define CONFIG_SYS_NAND_BASE NAND_BASE |
| 262 | #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 |
| 263 | #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ |
| 264 | #define CONFIG_ENV_IS_IN_NAND 1 |
| 265 | #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ |
| 266 | #define CONFIG_ENV_ADDR NAND_ENV_OFFSET |
| 267 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 268 | #endif |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 269 | |
| 270 | /* |
| 271 | * Size of malloc() pool |
| 272 | */ |
| 273 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 274 | |
| 275 | /* |
| 276 | * SMSC911x Ethernet |
| 277 | */ |
| 278 | #if defined(CONFIG_CMD_NET) |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 279 | #define CONFIG_SMC911X |
| 280 | #define CONFIG_SMC911X_32_BIT |
| 281 | #define CONFIG_SMC911X_BASE 0x2C000000 |
| 282 | #endif /* (CONFIG_CMD_NET) */ |
| 283 | |
Javier Martinez Canillas | 361fc83 | 2012-07-28 01:19:34 +0000 | [diff] [blame] | 284 | /* |
| 285 | * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader |
| 286 | * and older u-boot.bin with the new U-Boot SPL. |
| 287 | */ |
| 288 | #define CONFIG_SYS_TEXT_BASE 0x80008000 |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 289 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
Steve Sakoman | b74d3b4 | 2010-10-27 05:04:30 -0700 | [diff] [blame] | 290 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
| 291 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
| 292 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 293 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 294 | GENERATED_GBL_DATA_SIZE) |
Enric Balletbo i Serra | 2ce268c | 2010-10-14 16:54:59 -0400 | [diff] [blame] | 295 | |
Javier Martinez Canillas | 361fc83 | 2012-07-28 01:19:34 +0000 | [diff] [blame] | 296 | /* SPL */ |
| 297 | #define CONFIG_SPL |
Tom Rini | 28591df | 2012-08-13 12:03:19 -0700 | [diff] [blame] | 298 | #define CONFIG_SPL_FRAMEWORK |
Javier Martinez Canillas | 361fc83 | 2012-07-28 01:19:34 +0000 | [diff] [blame] | 299 | #define CONFIG_SPL_NAND_SIMPLE |
| 300 | #define CONFIG_SPL_TEXT_BASE 0x40200800 |
| 301 | #define CONFIG_SPL_MAX_SIZE (54 * 1024) |
| 302 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK |
| 303 | |
| 304 | /* move malloc and bss high to prevent clashing with the main image */ |
| 305 | #define CONFIG_SYS_SPL_MALLOC_START 0x87000000 |
| 306 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 |
| 307 | #define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */ |
| 308 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ |
| 309 | |
| 310 | /* MMC boot config */ |
| 311 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ |
| 312 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ |
| 313 | #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 |
| 314 | #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" |
| 315 | |
| 316 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| 317 | #define CONFIG_SPL_LIBDISK_SUPPORT |
| 318 | #define CONFIG_SPL_I2C_SUPPORT |
| 319 | #define CONFIG_SPL_LIBGENERIC_SUPPORT |
| 320 | #define CONFIG_SPL_MMC_SUPPORT |
| 321 | #define CONFIG_SPL_FAT_SUPPORT |
| 322 | #define CONFIG_SPL_SERIAL_SUPPORT |
| 323 | |
| 324 | #define CONFIG_SPL_POWER_SUPPORT |
| 325 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" |
| 326 | |
| 327 | #ifdef CONFIG_BOOT_ONENAND |
| 328 | #define CONFIG_SPL_ONENAND_SUPPORT |
| 329 | |
| 330 | /* OneNAND boot config */ |
| 331 | #define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000 |
| 332 | #define CONFIG_SYS_ONENAND_PAGE_SIZE 2048 |
| 333 | #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000 |
| 334 | #define CONFIG_SPL_ONENAND_LOAD_SIZE \ |
| 335 | (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR) |
| 336 | |
| 337 | #endif |
| 338 | |
| 339 | #ifdef CONFIG_BOOT_NAND |
| 340 | #define CONFIG_SPL_NAND_SUPPORT |
Scott Wood | c352a0c | 2012-09-20 19:09:07 -0500 | [diff] [blame] | 341 | #define CONFIG_SPL_NAND_BASE |
| 342 | #define CONFIG_SPL_NAND_DRIVERS |
| 343 | #define CONFIG_SPL_NAND_ECC |
Javier Martinez Canillas | 361fc83 | 2012-07-28 01:19:34 +0000 | [diff] [blame] | 344 | |
| 345 | /* NAND boot config */ |
| 346 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| 347 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 |
| 348 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 |
| 349 | #define CONFIG_SYS_NAND_OOBSIZE 64 |
| 350 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) |
| 351 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 |
| 352 | #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ |
| 353 | 10, 11, 12, 13} |
| 354 | #define CONFIG_SYS_NAND_ECCSIZE 512 |
| 355 | #define CONFIG_SYS_NAND_ECCBYTES 3 |
| 356 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
| 357 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 |
| 358 | #endif |
| 359 | |
Enric Balletbò i Serra | 19f9df8 | 2012-03-05 11:32:16 +0000 | [diff] [blame] | 360 | #endif /* __IGEP00X0_H */ |