blob: 3bb28c03ca74efb92caf73f06b01cd8428ba6828 [file] [log] [blame]
Adam Ford3e3aa272017-04-17 08:09:43 -05001/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
5 */
6
7#include <dt-bindings/input/input.h>
8
9/ {
10 cpus {
11 cpu@0 {
12 cpu0-supply = <&vcc>;
13 };
14 };
15
16 memory@80000000 {
17 device_type = "memory";
18 reg = <0x80000000 0>;
19 };
20
21 wl12xx_vmmc: wl12xx_vmmc {
22 compatible = "regulator-fixed";
23 regulator-name = "vwl1271";
24 regulator-min-microvolt = <1800000>;
25 regulator-max-microvolt = <1800000>;
26 gpio = <&gpio1 3 0>; /* gpio_3 */
27 startup-delay-us = <70000>;
28 enable-active-high;
Adam Forda4f234e2018-07-09 20:18:44 -050029 vin-supply = <&vaux3>;
Adam Ford3e3aa272017-04-17 08:09:43 -050030 };
31
32 /* HS USB Host PHY on PORT 1 */
33 hsusb2_phy: hsusb2_phy {
34 compatible = "usb-nop-xceiv";
35 reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
Adam Ford4acee2a2018-03-05 04:16:33 -060036 #phy-cells = <0>;
Adam Ford3e3aa272017-04-17 08:09:43 -050037 };
Adam Forda4f234e2018-07-09 20:18:44 -050038
39 /* fixed 26MHz oscillator */
40 hfclk_26m: oscillator {
41 #clock-cells = <0>;
42 compatible = "fixed-clock";
43 clock-frequency = <26000000>;
44 };
Adam Ford3e3aa272017-04-17 08:09:43 -050045};
46
47&gpmc {
Adam Ford4acee2a2018-03-05 04:16:33 -060048 ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
Adam Ford3e3aa272017-04-17 08:09:43 -050049
50 nand@0,0 {
51 compatible = "ti,omap2-nand";
52 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
53 interrupt-parent = <&gpmc>;
54 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
55 <1 IRQ_TYPE_NONE>; /* termcount */
56 linux,mtd-name = "micron,mt29f4g16abbda3w";
57 nand-bus-width = <16>;
58 ti,nand-ecc-opt = "bch8";
59 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
60 gpmc,sync-clk-ps = <0>;
61 gpmc,cs-on-ns = <0>;
62 gpmc,cs-rd-off-ns = <44>;
63 gpmc,cs-wr-off-ns = <44>;
64 gpmc,adv-on-ns = <6>;
65 gpmc,adv-rd-off-ns = <34>;
66 gpmc,adv-wr-off-ns = <44>;
67 gpmc,we-off-ns = <40>;
68 gpmc,oe-off-ns = <54>;
69 gpmc,access-ns = <64>;
70 gpmc,rd-cycle-ns = <82>;
71 gpmc,wr-cycle-ns = <82>;
72 gpmc,wr-access-ns = <40>;
73 gpmc,wr-data-mux-bus-ns = <0>;
74 gpmc,device-width = <2>;
75 #address-cells = <1>;
76 #size-cells = <1>;
Adam Ford3e3aa272017-04-17 08:09:43 -050077 };
78};
79
80&i2c1 {
Adam Forda4f234e2018-07-09 20:18:44 -050081 pinctrl-names = "default";
82 pinctrl-0 = <&i2c1_pins>;
Adam Ford4acee2a2018-03-05 04:16:33 -060083 clock-frequency = <2600000>;
Adam Ford3e3aa272017-04-17 08:09:43 -050084
85 twl: twl@48 {
86 reg = <0x48>;
87 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
88 interrupt-parent = <&intc>;
Adam Forda4f234e2018-07-09 20:18:44 -050089 clocks = <&hfclk_26m>;
90 clock-names = "fck";
Adam Ford3e3aa272017-04-17 08:09:43 -050091 twl_audio: audio {
92 compatible = "ti,twl4030-audio";
93 codec {
Adam Forda4f234e2018-07-09 20:18:44 -050094 ti,hs_extmute_gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
Adam Ford3e3aa272017-04-17 08:09:43 -050095 };
96 };
97 };
98};
99
100&i2c2 {
Adam Forda4f234e2018-07-09 20:18:44 -0500101 pinctrl-names = "default";
102 pinctrl-0 = <&i2c2_pins>;
Adam Ford3e3aa272017-04-17 08:09:43 -0500103 clock-frequency = <400000>;
104};
105
106&i2c3 {
Adam Forda4f234e2018-07-09 20:18:44 -0500107 pinctrl-names = "default";
108 pinctrl-0 = <&i2c3_pins>;
Adam Ford3e3aa272017-04-17 08:09:43 -0500109 clock-frequency = <400000>;
Adam Forda4f234e2018-07-09 20:18:44 -0500110
111 touchscreen: tsc2004@48 {
112 compatible = "ti,tsc2004";
113 reg = <0x48>;
114 vio-supply = <&vaux1>;
115 pinctrl-names = "default";
116 pinctrl-0 = <&tsc2004_pins>;
117 interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
118
119 touchscreen-fuzz-x = <4>;
120 touchscreen-fuzz-y = <7>;
121 touchscreen-fuzz-pressure = <2>;
122 touchscreen-size-x = <4096>;
123 touchscreen-size-y = <4096>;
124 touchscreen-max-pressure = <2048>;
125
126 ti,x-plate-ohms = <280>;
127 ti,esd-recovery-timeout-ms = <8000>;
128 };
Adam Ford3e3aa272017-04-17 08:09:43 -0500129};
130
131&mmc3 {
132 interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
Adam Ford4acee2a2018-03-05 04:16:33 -0600133 pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
Adam Ford3e3aa272017-04-17 08:09:43 -0500134 pinctrl-names = "default";
135 vmmc-supply = <&wl12xx_vmmc>;
136 non-removable;
137 bus-width = <4>;
138 cap-power-off-card;
139 #address-cells = <1>;
140 #size-cells = <0>;
141 wlcore: wlcore@2 {
142 compatible = "ti,wl1273";
143 reg = <2>;
Adam Ford4acee2a2018-03-05 04:16:33 -0600144 interrupt-parent = <&gpio1>;
145 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; /* gpio 2 */
Adam Ford3e3aa272017-04-17 08:09:43 -0500146 ref-clock-frequency = <26000000>;
147 };
148};
149
150&usbhshost {
151 port2-mode = "ehci-phy";
152};
153
154&usbhsehci {
155 phys = <0 &hsusb2_phy>;
156};
157
158
159&omap3_pmx_core {
160 pinctrl-names = "default";
161 pinctrl-0 = <&hsusb2_pins>;
162
163 mmc3_pins: pinmux_mm3_pins {
164 pinctrl-single,pins = <
165 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
166 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
167 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
168 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
Adam Ford3e3aa272017-04-17 08:09:43 -0500169 OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
170 OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
171 >;
172 };
173 mcbsp2_pins: pinmux_mcbsp2_pins {
174 pinctrl-single,pins = <
175 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
176 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
177 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
178 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
179 >;
180 };
181 uart2_pins: pinmux_uart2_pins {
182 pinctrl-single,pins = <
183 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
184 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
185 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
186 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
187 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
188 >;
189 };
190 mcspi1_pins: pinmux_mcspi1_pins {
191 pinctrl-single,pins = <
192 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
193 OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
194 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
195 OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
196 >;
197 };
198
199 hsusb2_pins: pinmux_hsusb2_pins {
200 pinctrl-single,pins = <
201 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
202 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
203 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
204 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
205 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
206 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
207 >;
208 };
209
210 hsusb_otg_pins: pinmux_hsusb_otg_pins {
211 pinctrl-single,pins = <
212 OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
213 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
214 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
215 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
216 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
217 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
218 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
219 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
220 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
221 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
222 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
223 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
224 >;
225 };
226
Adam Forda4f234e2018-07-09 20:18:44 -0500227 i2c1_pins: pinmux_i2c1_pins {
228 pinctrl-single,pins = <
229 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
230 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
231 OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */
232 >;
233 };
Adam Ford3e3aa272017-04-17 08:09:43 -0500234
Adam Forda4f234e2018-07-09 20:18:44 -0500235 tsc2004_pins: pinmux_tsc2004_pins {
236 pinctrl-single,pins = <
237 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4) /* mcbsp4_dr.gpio_153 */
238 >;
239 };
Adam Ford3e3aa272017-04-17 08:09:43 -0500240};
241
242&omap3_pmx_wkup {
243 pinctrl-names = "default";
244 pinctrl-0 = <&hsusb2_reset_pin>;
245 hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
246 pinctrl-single,pins = <
247 OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
248 >;
249 };
Adam Ford4acee2a2018-03-05 04:16:33 -0600250 wl127x_gpio: pinmux_wl127x_gpio_pin {
251 pinctrl-single,pins = <
Adam Forda4f234e2018-07-09 20:18:44 -0500252 OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT | MUX_MODE4) /* sys_boot0.gpio_2 */
Adam Ford4acee2a2018-03-05 04:16:33 -0600253 OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
254 >;
255 };
Adam Forda4f234e2018-07-09 20:18:44 -0500256 i2c2_pins: pinmux_i2c2_pins {
257 pinctrl-single,pins = <
258 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
259 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
260 >;
261 };
262 i2c3_pins: pinmux_i2c3_pins {
263 pinctrl-single,pins = <
264 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
265 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
266 >;
267 };
Adam Ford3e3aa272017-04-17 08:09:43 -0500268};
269
270&omap3_pmx_core2 {
271 pinctrl-names = "default";
272 pinctrl-0 = <&hsusb2_2_pins>;
273 hsusb2_2_pins: pinmux_hsusb2_2_pins {
274 pinctrl-single,pins = <
275 OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
276 OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
277 OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
278 OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
279 OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
280 OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
281 >;
282 };
283};
284
285&uart2 {
286 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
287 pinctrl-names = "default";
288 pinctrl-0 = <&uart2_pins>;
289};
290
291&mcspi1 {
292 pinctrl-names = "default";
293 pinctrl-0 = <&mcspi1_pins>;
294};
295
296#include "twl4030.dtsi"
297#include "twl4030_omap3.dtsi"
298
Adam Forda4f234e2018-07-09 20:18:44 -0500299&vaux3 {
300 regulator-min-microvolt = <2800000>;
301 regulator-max-microvolt = <2800000>;
302};
303
Adam Ford3e3aa272017-04-17 08:09:43 -0500304&twl {
305 twl_power: power {
306 compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
307 ti,use_poweroff;
308 };
309};
310
311&twl_gpio {
312 ti,use-leds;
313};