Tom Rini | 8b0c8a1 | 2018-05-06 18:27:01 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2018, STMicroelectronics - All Rights Reserved |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <config.h> |
| 7 | #include <common.h> |
| 8 | #include <spl.h> |
| 9 | #include <dm.h> |
| 10 | #include <ram.h> |
| 11 | #include <asm/io.h> |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 12 | #include <power/pmic.h> |
Patrick Delaunay | 91be594 | 2019-02-04 11:26:16 +0100 | [diff] [blame] | 13 | #include <power/stpmic1.h> |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 14 | #include <asm/arch/ddr.h> |
| 15 | |
| 16 | void spl_board_init(void) |
| 17 | { |
| 18 | /* Keep vdd on during the reset cycle */ |
Patrick Delaunay | d79218f | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 19 | #if defined(CONFIG_PMIC_STPMIC1) && defined(CONFIG_SPL_POWER_SUPPORT) |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 20 | struct udevice *dev; |
| 21 | int ret; |
| 22 | |
| 23 | ret = uclass_get_device_by_driver(UCLASS_PMIC, |
Patrick Delaunay | d79218f | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 24 | DM_GET_DRIVER(pmic_stpmic1), &dev); |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 25 | if (!ret) |
| 26 | pmic_clrsetbits(dev, |
Patrick Delaunay | 880f29b | 2019-02-04 11:26:18 +0100 | [diff] [blame] | 27 | STPMIC1_BUCKS_MRST_CR, |
| 28 | STPMIC1_MRST_BUCK(STPMIC1_BUCK3), |
| 29 | STPMIC1_MRST_BUCK(STPMIC1_BUCK3)); |
Patrick Delaunay | bff284f | 2019-07-30 19:16:20 +0200 | [diff] [blame] | 30 | |
| 31 | /* Check if debug is enabled to program PMIC according to the bit */ |
| 32 | if ((readl(TAMP_BOOT_CONTEXT) & TAMP_BOOT_DEBUG_ON) && !ret) { |
| 33 | printf("Keep debug unit ON\n"); |
| 34 | |
| 35 | pmic_clrsetbits(dev, STPMIC1_BUCKS_MRST_CR, |
| 36 | STPMIC1_MRST_BUCK_DEBUG, |
| 37 | STPMIC1_MRST_BUCK_DEBUG); |
| 38 | |
| 39 | if (STPMIC1_MRST_LDO_DEBUG) |
| 40 | pmic_clrsetbits(dev, STPMIC1_LDOS_MRST_CR, |
| 41 | STPMIC1_MRST_LDO_DEBUG, |
| 42 | STPMIC1_MRST_LDO_DEBUG); |
| 43 | } |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 44 | #endif |
| 45 | } |