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Simon Glass8c0629b2019-12-08 17:40:08 -07001// SPDX-License-Identifier: GPL-2.0
2/*
Wolfgang Wallner12ea8582020-01-22 16:01:44 +01003 * Interrupt Timer Subsystem
Simon Glass8c0629b2019-12-08 17:40:08 -07004 *
5 * Copyright (C) 2017 Intel Corporation.
6 * Copyright (C) 2017 Siemens AG
7 * Copyright 2019 Google LLC
8 *
9 * Taken from coreboot itss.c
10 */
11
12#include <common.h>
13#include <dm.h>
14#include <dt-structs.h>
15#include <irq.h>
Simon Glass0f2af882020-05-10 11:40:05 -060016#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070017#include <malloc.h>
Simon Glass8c0629b2019-12-08 17:40:08 -070018#include <p2sb.h>
19#include <spl.h>
Wolfgang Wallner97132162020-01-22 16:01:45 +010020#include <asm/itss.h>
Simon Glass8c0629b2019-12-08 17:40:08 -070021
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +010022struct itss_platdata {
Simon Glass8c0629b2019-12-08 17:40:08 -070023#if CONFIG_IS_ENABLED(OF_PLATDATA)
24 /* Put this first since driver model will copy the data here */
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +010025 struct dtd_intel_itss dtplat;
Simon Glass8c0629b2019-12-08 17:40:08 -070026#endif
27};
28
29/* struct pmc_route - Routing for PMC to GPIO */
30struct pmc_route {
31 u32 pmc;
32 u32 gpio;
33};
34
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +010035struct itss_priv {
Simon Glass8c0629b2019-12-08 17:40:08 -070036 struct pmc_route *route;
37 uint route_count;
38 u32 irq_snapshot[NUM_IPC_REGS];
39};
40
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +010041static int set_polarity(struct udevice *dev, uint irq, bool active_low)
Simon Glass8c0629b2019-12-08 17:40:08 -070042{
43 u32 mask;
44 uint reg;
45
46 if (irq > ITSS_MAX_IRQ)
47 return -EINVAL;
48
49 reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * (irq / IRQS_PER_IPC);
50 mask = 1 << (irq % IRQS_PER_IPC);
51
52 pcr_clrsetbits32(dev, reg, mask, active_low ? mask : 0);
53
54 return 0;
55}
56
57#ifndef CONFIG_TPL_BUILD
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +010058static int snapshot_polarities(struct udevice *dev)
Simon Glass8c0629b2019-12-08 17:40:08 -070059{
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +010060 struct itss_priv *priv = dev_get_priv(dev);
Simon Glass8c0629b2019-12-08 17:40:08 -070061 const int start = GPIO_IRQ_START;
62 const int end = GPIO_IRQ_END;
63 int reg_start;
64 int reg_end;
65 int i;
66
67 reg_start = start / IRQS_PER_IPC;
Simon Glassd89f1932020-07-16 21:22:30 -060068 reg_end = DIV_ROUND_UP(end, IRQS_PER_IPC);
Simon Glass8c0629b2019-12-08 17:40:08 -070069
Simon Glassd89f1932020-07-16 21:22:30 -060070 log_info("ITSS IRQ Polarities snapshot %p\n", priv->irq_snapshot);
Simon Glass8c0629b2019-12-08 17:40:08 -070071 for (i = reg_start; i < reg_end; i++) {
72 uint reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i;
73
74 priv->irq_snapshot[i] = pcr_read32(dev, reg);
Simon Glassd89f1932020-07-16 21:22:30 -060075 log_debug(" - %d, reg %x: irq_snapshot[i] %x\n", i, reg,
76 priv->irq_snapshot[i]);
Simon Glass8c0629b2019-12-08 17:40:08 -070077 }
78
Simon Glassd89f1932020-07-16 21:22:30 -060079 /* Save the snapshot for use after relocation */
80 gd->start_addr_sp -= sizeof(*priv);
81 gd->start_addr_sp &= ~0xf;
82 gd->arch.itss_priv = (void *)gd->start_addr_sp;
83 memcpy(gd->arch.itss_priv, priv, sizeof(*priv));
84
Simon Glass8c0629b2019-12-08 17:40:08 -070085 return 0;
86}
87
88static void show_polarities(struct udevice *dev, const char *msg)
89{
90 int i;
91
92 log_info("ITSS IRQ Polarities %s:\n", msg);
93 for (i = 0; i < NUM_IPC_REGS; i++) {
94 uint reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i;
95
96 log_info("IPC%d: 0x%08x\n", i, pcr_read32(dev, reg));
97 }
98}
99
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100100static int restore_polarities(struct udevice *dev)
Simon Glass8c0629b2019-12-08 17:40:08 -0700101{
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100102 struct itss_priv *priv = dev_get_priv(dev);
Simon Glassd89f1932020-07-16 21:22:30 -0600103 struct itss_priv *old_priv;
Simon Glass8c0629b2019-12-08 17:40:08 -0700104 const int start = GPIO_IRQ_START;
105 const int end = GPIO_IRQ_END;
106 int reg_start;
107 int reg_end;
108 int i;
109
Simon Glassd89f1932020-07-16 21:22:30 -0600110 /* Get the snapshot which was stored by the pre-reloc device */
111 old_priv = gd->arch.itss_priv;
112 if (!old_priv)
113 return log_msg_ret("priv", -EFAULT);
114 memcpy(priv->irq_snapshot, old_priv->irq_snapshot,
115 sizeof(priv->irq_snapshot));
116
Simon Glass8c0629b2019-12-08 17:40:08 -0700117 show_polarities(dev, "Before");
Simon Glassd89f1932020-07-16 21:22:30 -0600118 log_info("priv->irq_snapshot %p\n", priv->irq_snapshot);
Simon Glass8c0629b2019-12-08 17:40:08 -0700119
120 reg_start = start / IRQS_PER_IPC;
Simon Glassd89f1932020-07-16 21:22:30 -0600121 reg_end = DIV_ROUND_UP(end, IRQS_PER_IPC);
122
Simon Glass8c0629b2019-12-08 17:40:08 -0700123
124 for (i = reg_start; i < reg_end; i++) {
125 u32 mask;
126 u16 reg;
127 int irq_start;
128 int irq_end;
129
130 irq_start = i * IRQS_PER_IPC;
131 irq_end = min(irq_start + IRQS_PER_IPC - 1, ITSS_MAX_IRQ);
132
133 if (start > irq_end)
134 continue;
135 if (end < irq_start)
136 break;
137
138 /* Track bits within the bounds of of the register */
139 irq_start = max(start, irq_start) % IRQS_PER_IPC;
140 irq_end = min(end, irq_end) % IRQS_PER_IPC;
141
142 /* Create bitmask of the inclusive range of start and end */
143 mask = (((1U << irq_end) - 1) | (1U << irq_end));
144 mask &= ~((1U << irq_start) - 1);
145
146 reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i;
Simon Glassd89f1932020-07-16 21:22:30 -0600147 log_debug(" - %d, reg %x: mask %x, irq_snapshot[i] %x\n",
148 i, reg, mask, priv->irq_snapshot[i]);
Simon Glass8c0629b2019-12-08 17:40:08 -0700149 pcr_clrsetbits32(dev, reg, mask, mask & priv->irq_snapshot[i]);
150 }
151
152 show_polarities(dev, "After");
153
154 return 0;
155}
156#endif
157
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100158static int route_pmc_gpio_gpe(struct udevice *dev, uint pmc_gpe_num)
Simon Glass8c0629b2019-12-08 17:40:08 -0700159{
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100160 struct itss_priv *priv = dev_get_priv(dev);
Simon Glass8c0629b2019-12-08 17:40:08 -0700161 struct pmc_route *route;
162 int i;
163
164 for (i = 0, route = priv->route; i < priv->route_count; i++, route++) {
165 if (pmc_gpe_num == route->pmc)
166 return route->gpio;
167 }
168
169 return -ENOENT;
170}
171
Simon Glassc51a0212020-02-06 09:54:59 -0700172static int itss_bind(struct udevice *dev)
173{
174 /* This is not set with of-platdata, so set it manually */
175 if (CONFIG_IS_ENABLED(OF_PLATDATA))
176 dev->driver_data = X86_IRQT_ITSS;
177
178 return 0;
179}
180
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100181static int itss_ofdata_to_platdata(struct udevice *dev)
Simon Glass8c0629b2019-12-08 17:40:08 -0700182{
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100183 struct itss_priv *priv = dev_get_priv(dev);
Simon Glass8c0629b2019-12-08 17:40:08 -0700184 int ret;
185
186#if CONFIG_IS_ENABLED(OF_PLATDATA)
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100187 struct itss_platdata *plat = dev_get_platdata(dev);
188 struct dtd_intel_itss *dtplat = &plat->dtplat;
Simon Glass8c0629b2019-12-08 17:40:08 -0700189
190 /*
191 * It would be nice to do this in the bind() method, but with
192 * of-platdata binding happens in the order that DM finds things in the
193 * linker list (i.e. alphabetical order by driver name). So the GPIO
194 * device may well be bound before its parent (p2sb), and this call
195 * will fail if p2sb is not bound yet.
196 *
197 * TODO(sjg@chromium.org): Add a parent pointer to child devices in dtoc
198 */
199 ret = p2sb_set_port_id(dev, dtplat->intel_p2sb_port_id);
200 if (ret)
201 return log_msg_ret("Could not set port id", ret);
202 priv->route = (struct pmc_route *)dtplat->intel_pmc_routes;
203 priv->route_count = ARRAY_SIZE(dtplat->intel_pmc_routes) /
204 sizeof(struct pmc_route);
205#else
206 int size;
207
208 size = dev_read_size(dev, "intel,pmc-routes");
209 if (size < 0)
210 return size;
211 priv->route = malloc(size);
212 if (!priv->route)
213 return -ENOMEM;
214 ret = dev_read_u32_array(dev, "intel,pmc-routes", (u32 *)priv->route,
215 size / sizeof(fdt32_t));
216 if (ret)
217 return log_msg_ret("Cannot read pmc-routes", ret);
218 priv->route_count = size / sizeof(struct pmc_route);
219#endif
220
221 return 0;
222}
223
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100224static const struct irq_ops itss_ops = {
225 .route_pmc_gpio_gpe = route_pmc_gpio_gpe,
226 .set_polarity = set_polarity,
Simon Glass8c0629b2019-12-08 17:40:08 -0700227#ifndef CONFIG_TPL_BUILD
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100228 .snapshot_polarities = snapshot_polarities,
229 .restore_polarities = restore_polarities,
Simon Glass8c0629b2019-12-08 17:40:08 -0700230#endif
231};
232
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100233static const struct udevice_id itss_ids[] = {
Simon Glass21bb12a2020-02-06 09:54:58 -0700234 { .compatible = "intel,itss", .data = X86_IRQT_ITSS },
Simon Glass8c0629b2019-12-08 17:40:08 -0700235 { }
236};
237
Simon Glassa055da82020-10-05 05:27:01 -0600238U_BOOT_DRIVER(intel_itss) = {
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100239 .name = "intel_itss",
Simon Glass8c0629b2019-12-08 17:40:08 -0700240 .id = UCLASS_IRQ,
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100241 .of_match = itss_ids,
242 .ops = &itss_ops,
Simon Glassc51a0212020-02-06 09:54:59 -0700243 .bind = itss_bind,
Wolfgang Wallner3767e7f2020-01-22 16:01:47 +0100244 .ofdata_to_platdata = itss_ofdata_to_platdata,
245 .platdata_auto_alloc_size = sizeof(struct itss_platdata),
246 .priv_auto_alloc_size = sizeof(struct itss_priv),
Simon Glass8c0629b2019-12-08 17:40:08 -0700247};