blob: 358107776d54337a898f383eb5c68d00acf9f992 [file] [log] [blame]
Minkyu Kangae6f0c62009-07-20 11:40:01 +09001/*
Steve Sakoman1ad21582010-06-08 13:07:46 -07002 * Board specific setup info
3 *
4 * (C) Copyright 2010
5 * Texas Instruments, <www.ti.com>
6 *
7 * Author :
8 * Aneesh V <aneesh@ti.com>
Minkyu Kangae6f0c62009-07-20 11:40:01 +09009 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
Sricharan9310ff72011-11-15 09:49:55 -050029#include <asm/arch/omap.h>
Joel A Fernandesb55759e2012-09-18 04:30:51 +000030#include <asm/arch/spl.h>
Aneesh Vfd8798b2012-03-08 07:20:18 +000031#include <linux/linkage.h>
Sricharan308fe922011-11-15 09:50:03 -050032
Aneesh Vfd8798b2012-03-08 07:20:18 +000033ENTRY(save_boot_params)
Aneesh V13a74c12011-07-21 09:10:27 -040034 /*
35 * See if the rom code passed pointer is valid:
36 * It is not valid if it is not in non-secure SRAM
37 * This may happen if you are booting with the help of
38 * debugger
39 */
40 ldr r2, =NON_SECURE_SRAM_START
41 cmp r2, r0
42 bgt 1f
43 ldr r2, =NON_SECURE_SRAM_END
44 cmp r2, r0
45 blt 1f
46
Sricharan308fe922011-11-15 09:50:03 -050047 /*
48 * store the boot params passed from rom code or saved
49 * and passed by SPL
50 */
51 cmp r0, #0
52 beq 1f
53 ldr r1, =boot_params
54 str r0, [r1]
55#ifdef CONFIG_SPL_BUILD
Tom Rini0be93ff2012-08-13 12:53:23 -070056 /* Store the boot device in spl_boot_device */
Sricharan308fe922011-11-15 09:50:03 -050057 ldrb r2, [r0, #BOOT_DEVICE_OFFSET] @ r1 <- value of boot device
Aneesh V13a74c12011-07-21 09:10:27 -040058 and r2, #BOOT_DEVICE_MASK
Sricharan308fe922011-11-15 09:50:03 -050059 ldr r3, =boot_params
Tom Rini0be93ff2012-08-13 12:53:23 -070060 strb r2, [r3, #BOOT_DEVICE_OFFSET] @ spl_boot_device <- r1
Aneesh V13a74c12011-07-21 09:10:27 -040061
Sricharan308fe922011-11-15 09:50:03 -050062 /* boot mode is passed only for devices that can raw/fat mode */
Joel A Fernandesb55759e2012-09-18 04:30:51 +000063 cmp r2, #BOOT_DEVICE_XIP
Sricharan308fe922011-11-15 09:50:03 -050064 blt 2f
Joel A Fernandesb55759e2012-09-18 04:30:51 +000065 cmp r2, #BOOT_DEVICE_MMC2
Sricharan308fe922011-11-15 09:50:03 -050066 bgt 2f
Tom Rini69fa4442012-08-14 09:20:06 -070067 /* Store the boot mode (raw/FAT) in omap_bootmode */
Aneesh V13a74c12011-07-21 09:10:27 -040068 ldr r2, [r0, #DEV_DESC_PTR_OFFSET] @ get the device descriptor ptr
69 ldr r2, [r2, #DEV_DATA_PTR_OFFSET] @ get the pDeviceData ptr
70 ldr r2, [r2, #BOOT_MODE_OFFSET] @ get the boot mode
Sricharan9310ff72011-11-15 09:49:55 -050071 ldr r3, =omap_bootmode
Aneesh V13a74c12011-07-21 09:10:27 -040072 str r2, [r3]
Sricharan308fe922011-11-15 09:50:03 -050073#endif
742:
75 ldrb r2, [r0, #CH_FLAGS_OFFSET]
76 ldr r3, =boot_params
77 strb r2, [r3, #CH_FLAGS_OFFSET]
Aneesh V13a74c12011-07-21 09:10:27 -0400781:
79 bx lr
Aneesh Vfd8798b2012-03-08 07:20:18 +000080ENDPROC(save_boot_params)
Sricharan308fe922011-11-15 09:50:03 -050081
Aneesh Vfd8798b2012-03-08 07:20:18 +000082ENTRY(set_pl310_ctrl_reg)
Aneesh Ve3405bd2011-06-16 23:30:52 +000083 PUSH {r4-r11, lr} @ save registers - ROM code may pollute
84 @ our registers
85 LDR r12, =0x102 @ Set PL310 control register - value in R0
86 .word 0xe1600070 @ SMC #0 - hand assembled because -march=armv5
87 @ call ROM Code API to set control register
88 POP {r4-r11, pc}
Aneesh Vfd8798b2012-03-08 07:20:18 +000089ENDPROC(set_pl310_ctrl_reg)