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SARTRE Leodce71762013-06-03 23:30:36 +00001/*
2 *
3 * Congatec Conga-QEVAl board configuration file.
4 *
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8 * Leo Sartre, <lsartre@adeneo-embedded.com>
9 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
SARTRE Leodce71762013-06-03 23:30:36 +000011 */
12
13#ifndef __CONFIG_CGTQMX6EVAL_H
14#define __CONFIG_CGTQMX6EVAL_H
15
SARTRE Leodce71762013-06-03 23:30:36 +000016#include "mx6_common.h"
17
SARTRE Leodce71762013-06-03 23:30:36 +000018#define CONFIG_MACH_TYPE 4122
19
Otavio Salvadore186b182015-11-19 19:02:36 -020020#ifdef CONFIG_SPL
Otavio Salvadore186b182015-11-19 19:02:36 -020021#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
22#define CONFIG_SPL_SPI_LOAD
23#include "imx6_spl.h"
24#endif
25
SARTRE Leodce71762013-06-03 23:30:36 +000026/* Size of malloc() pool */
27#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
28
SARTRE Leodce71762013-06-03 23:30:36 +000029#define CONFIG_MISC_INIT_R
SARTRE Leodce71762013-06-03 23:30:36 +000030
31#define CONFIG_MXC_UART
32#define CONFIG_MXC_UART_BASE UART2_BASE
33
34/* MMC Configs */
SARTRE Leodce71762013-06-03 23:30:36 +000035#define CONFIG_SYS_FSL_ESDHC_ADDR 0
36
Otavio Salvadorf594b552015-11-19 19:02:33 -020037/* SPI NOR */
Otavio Salvadorf594b552015-11-19 19:02:33 -020038#define CONFIG_SPI_FLASH
39#define CONFIG_SPI_FLASH_STMICRO
40#define CONFIG_SPI_FLASH_SST
41#define CONFIG_MXC_SPI
42#define CONFIG_SF_DEFAULT_BUS 0
43#define CONFIG_SF_DEFAULT_SPEED 20000000
44#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
45
SARTRE Leodce71762013-06-03 23:30:36 +000046/* Miscellaneous commands */
47#define CONFIG_CMD_BMODE
48
Otavio Salvador38881002015-07-23 11:02:27 -030049/* Thermal support */
Adrian Alonsoce08c362015-09-02 13:54:13 -050050#define CONFIG_IMX_THERMAL
Otavio Salvador38881002015-07-23 11:02:27 -030051
Otavio Salvador0378d632015-07-23 11:02:28 -030052/* I2C Configs */
Otavio Salvador0378d632015-07-23 11:02:28 -030053#define CONFIG_SYS_I2C
54#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020055#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
56#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Otavio Salvador0378d632015-07-23 11:02:28 -030057#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
58#define CONFIG_SYS_I2C_SPEED 100000
59
60/* PMIC */
61#define CONFIG_POWER
62#define CONFIG_POWER_I2C
63#define CONFIG_POWER_PFUZE100
64#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
65
Otavio Salvadorc8762d02015-07-23 11:02:29 -030066/* USB Configs */
Otavio Salvadorc8762d02015-07-23 11:02:29 -030067#define CONFIG_USB_EHCI
68#define CONFIG_USB_EHCI_MX6
Otavio Salvadorc8762d02015-07-23 11:02:29 -030069#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
70#define CONFIG_USB_HOST_ETHER
71#define CONFIG_USB_ETHER_ASIX
72#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
73#define CONFIG_MXC_USB_FLAGS 0
74#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
Otavio Salvadorc8762d02015-07-23 11:02:29 -030075#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
76
Otavio Salvadoredd28992015-09-17 15:13:20 -030077#define CONFIG_USBD_HS
Otavio Salvadoredd28992015-09-17 15:13:20 -030078
Otavio Salvadoredd28992015-09-17 15:13:20 -030079#define CONFIG_USB_FUNCTION_MASS_STORAGE
Otavio Salvadoredd28992015-09-17 15:13:20 -030080
Otavio Salvadorf62abc42015-11-19 19:02:35 -020081#define CONFIG_USB_FUNCTION_FASTBOOT
82#define CONFIG_CMD_FASTBOOT
83#define CONFIG_ANDROID_BOOT_IMAGE
84#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
85#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
86
Otavio Salvador6c46cd12015-07-23 11:02:30 -030087/* Framebuffer */
Otavio Salvador6c46cd12015-07-23 11:02:30 -030088#define CONFIG_VIDEO_IPUV3
Otavio Salvador6c46cd12015-07-23 11:02:30 -030089#define CONFIG_VIDEO_BMP_RLE8
90#define CONFIG_SPLASH_SCREEN
91#define CONFIG_SPLASH_SCREEN_ALIGN
92#define CONFIG_BMP_16BPP
93#define CONFIG_VIDEO_LOGO
94#define CONFIG_VIDEO_BMP_LOGO
95#ifdef CONFIG_MX6DL
96#define CONFIG_IPUV3_CLK 198000000
97#else
98#define CONFIG_IPUV3_CLK 264000000
99#endif
100#define CONFIG_IMX_HDMI
101
Otavio Salvadordf82d002015-07-23 11:02:31 -0300102/* SATA */
103#define CONFIG_CMD_SATA
104#define CONFIG_DWC_AHSATA
105#define CONFIG_SYS_SATA_MAX_DEVICE 1
106#define CONFIG_DWC_AHSATA_PORT_ID 0
107#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
108#define CONFIG_LBA48
109#define CONFIG_LIBATA
110
Otavio Salvadore6b47822015-07-28 20:24:41 -0300111/* Ethernet */
Otavio Salvadore6b47822015-07-28 20:24:41 -0300112#define CONFIG_FEC_MXC
113#define CONFIG_MII
114#define IMX_FEC_BASE ENET_BASE_ADDR
115#define CONFIG_FEC_XCV_TYPE RGMII
116#define CONFIG_ETHPRIME "FEC"
117#define CONFIG_FEC_MXC_PHYADDR 6
118#define CONFIG_PHYLIB
119#define CONFIG_PHY_ATHEROS
120
Otavio Salvador4ac01402015-07-23 11:02:33 -0300121/* Command definition */
122
123#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass4694a742016-10-17 20:12:39 -0600124#define CONSOLE_DEV "ttymxc1"
Otavio Salvador4ac01402015-07-23 11:02:33 -0300125#define CONFIG_MMCROOT "/dev/mmcblk0p2"
126#define CONFIG_SYS_MMC_ENV_DEV 0
SARTRE Leodce71762013-06-03 23:30:36 +0000127
Otavio Salvadore186b182015-11-19 19:02:36 -0200128#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
SARTRE Leodce71762013-06-03 23:30:36 +0000129#define CONFIG_EXTRA_ENV_SETTINGS \
130 "script=boot.scr\0" \
Otavio Salvador43465d92014-01-16 19:57:56 -0200131 "image=zImage\0" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200132 "fdtfile=undefined\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300133 "fdt_addr_r=0x18000000\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000134 "boot_fdt=try\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300135 "ip_dyn=yes\0" \
Simon Glass4694a742016-10-17 20:12:39 -0600136 "console=" CONSOLE_DEV "\0" \
Otavio Salvadorc102b9e2015-11-19 19:02:38 -0200137 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \
138 "dfu_alt_info_spl=spl raw 0x400\0" \
139 "dfu_alt_info_img=u-boot raw 0x10000\0" \
140 "dfu_alt_info=spl raw 0x400\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300141 "bootm_size=0x10000000\0" \
142 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000143 "mmcpart=1\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300144 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
145 "update_sd_firmware=" \
146 "if test ${ip_dyn} = yes; then " \
147 "setenv get_cmd dhcp; " \
148 "else " \
149 "setenv get_cmd tftp; " \
150 "fi; " \
151 "if mmc dev ${mmcdev}; then " \
152 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
153 "setexpr fw_sz ${filesize} / 0x200; " \
154 "setexpr fw_sz ${fw_sz} + 1; " \
155 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
156 "fi; " \
157 "fi\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000158 "mmcargs=setenv bootargs console=${console},${baudrate} " \
159 "root=${mmcroot}\0" \
160 "loadbootscript=" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300161 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000162 "bootscript=echo Running bootscript from mmc ...; " \
163 "source\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300164 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
165 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000166 "mmcboot=echo Booting from mmc ...; " \
167 "run mmcargs; " \
168 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
169 "if run loadfdt; then " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300170 "bootz ${loadaddr} - ${fdt_addr_r}; " \
SARTRE Leodce71762013-06-03 23:30:36 +0000171 "else " \
172 "if test ${boot_fdt} = try; then " \
Otavio Salvador43465d92014-01-16 19:57:56 -0200173 "bootz; " \
SARTRE Leodce71762013-06-03 23:30:36 +0000174 "else " \
175 "echo WARN: Cannot load the DT; " \
176 "fi; " \
177 "fi; " \
178 "else " \
Otavio Salvador43465d92014-01-16 19:57:56 -0200179 "bootz; " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300180 "fi;\0" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200181 "findfdt="\
182 "if test $board_rev = MX6Q ; then " \
183 "setenv fdtfile imx6q-qmx6.dtb; fi; " \
184 "if test $board_rev = MX6DL ; then " \
185 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \
186 "if test $fdtfile = undefined; then " \
187 "echo WARNING: Could not determine dtb to use; fi; \0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300188 "netargs=setenv bootargs console=${console},${baudrate} " \
189 "root=/dev/nfs " \
190 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
191 "netboot=echo Booting from net ...; " \
192 "run netargs; " \
193 "if test ${ip_dyn} = yes; then " \
194 "setenv get_cmd dhcp; " \
195 "else " \
196 "setenv get_cmd tftp; " \
197 "fi; " \
198 "${get_cmd} ${image}; " \
199 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
200 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
201 "bootz ${loadaddr} - ${fdt_addr_r}; " \
202 "else " \
203 "if test ${boot_fdt} = try; then " \
204 "bootz; " \
205 "else " \
206 "echo WARN: Cannot load the DT; " \
207 "fi; " \
208 "fi; " \
209 "else " \
210 "bootz; " \
211 "fi;\0" \
Otavio Salvadorf594b552015-11-19 19:02:33 -0200212 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
SARTRE Leodce71762013-06-03 23:30:36 +0000213
214#define CONFIG_BOOTCOMMAND \
Otavio Salvadorf594b552015-11-19 19:02:33 -0200215 "run spilock;" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200216 "run findfdt; " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300217 "mmc dev ${mmcdev};" \
218 "if mmc rescan; then " \
219 "if run loadbootscript; then " \
220 "run bootscript; " \
221 "else " \
222 "if run loadimage; then " \
223 "run mmcboot; " \
224 "else run netboot; " \
225 "fi; " \
226 "fi; " \
227 "else run netboot; fi"
SARTRE Leodce71762013-06-03 23:30:36 +0000228
SARTRE Leodce71762013-06-03 23:30:36 +0000229#define CONFIG_SYS_MEMTEST_START 0x10000000
230#define CONFIG_SYS_MEMTEST_END 0x10010000
231#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
232
SARTRE Leodce71762013-06-03 23:30:36 +0000233/* Physical Memory Map */
234#define CONFIG_NR_DRAM_BANKS 1
235#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
SARTRE Leodce71762013-06-03 23:30:36 +0000236
237#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
238#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
239#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
240
241#define CONFIG_SYS_INIT_SP_OFFSET \
242 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
243#define CONFIG_SYS_INIT_SP_ADDR \
244 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
245
Peter Robinson4b671502015-05-22 17:30:45 +0100246/* Environment organization */
Otavio Salvadorca4d60b2015-11-19 19:02:34 -0200247#if defined (CONFIG_ENV_IS_IN_MMC)
SARTRE Leodce71762013-06-03 23:30:36 +0000248#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
249#define CONFIG_SYS_MMC_ENV_DEV 0
Otavio Salvadorca4d60b2015-11-19 19:02:34 -0200250#endif
251
252#define CONFIG_ENV_SIZE (8 * 1024)
253
254#define CONFIG_ENV_IS_IN_SPI_FLASH
255#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
256#define CONFIG_ENV_OFFSET (768 * 1024)
257#define CONFIG_ENV_SECT_SIZE (64 * 1024)
258#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
259#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
260#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
261#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
262#endif
SARTRE Leodce71762013-06-03 23:30:36 +0000263
SARTRE Leodce71762013-06-03 23:30:36 +0000264#endif /* __CONFIG_CGTQMX6EVAL_H */