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SARTRE Leodce71762013-06-03 23:30:36 +00001/*
2 *
3 * Congatec Conga-QEVAl board configuration file.
4 *
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8 * Leo Sartre, <lsartre@adeneo-embedded.com>
9 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
SARTRE Leodce71762013-06-03 23:30:36 +000011 */
12
13#ifndef __CONFIG_CGTQMX6EVAL_H
14#define __CONFIG_CGTQMX6EVAL_H
15
SARTRE Leodce71762013-06-03 23:30:36 +000016#include "mx6_common.h"
17
SARTRE Leodce71762013-06-03 23:30:36 +000018#define CONFIG_MACH_TYPE 4122
19
Otavio Salvadore186b182015-11-19 19:02:36 -020020#ifdef CONFIG_SPL
21#define CONFIG_SPL_LIBCOMMON_SUPPORT
22#define CONFIG_SPL_MMC_SUPPORT
23#define CONFIG_SPL_SPI_SUPPORT
24#define CONFIG_SPL_SPI_FLASH_SUPPORT
25#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
26#define CONFIG_SPL_SPI_LOAD
27#include "imx6_spl.h"
28#endif
29
SARTRE Leodce71762013-06-03 23:30:36 +000030/* Size of malloc() pool */
31#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
32
33#define CONFIG_BOARD_EARLY_INIT_F
Otavio Salvadore186b182015-11-19 19:02:36 -020034#define CONFIG_BOARD_LATE_INIT
SARTRE Leodce71762013-06-03 23:30:36 +000035#define CONFIG_MISC_INIT_R
SARTRE Leodce71762013-06-03 23:30:36 +000036
37#define CONFIG_MXC_UART
38#define CONFIG_MXC_UART_BASE UART2_BASE
39
40/* MMC Configs */
SARTRE Leodce71762013-06-03 23:30:36 +000041#define CONFIG_SYS_FSL_ESDHC_ADDR 0
42
Otavio Salvadorf594b552015-11-19 19:02:33 -020043/* SPI NOR */
44#define CONFIG_CMD_SF
45#define CONFIG_SPI_FLASH
46#define CONFIG_SPI_FLASH_STMICRO
47#define CONFIG_SPI_FLASH_SST
48#define CONFIG_MXC_SPI
49#define CONFIG_SF_DEFAULT_BUS 0
50#define CONFIG_SF_DEFAULT_SPEED 20000000
51#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
52
SARTRE Leodce71762013-06-03 23:30:36 +000053/* Miscellaneous commands */
54#define CONFIG_CMD_BMODE
55
Otavio Salvador38881002015-07-23 11:02:27 -030056/* Thermal support */
Adrian Alonsoce08c362015-09-02 13:54:13 -050057#define CONFIG_IMX_THERMAL
Otavio Salvador38881002015-07-23 11:02:27 -030058
Otavio Salvador0378d632015-07-23 11:02:28 -030059/* I2C Configs */
60#define CONFIG_CMD_I2C
61#define CONFIG_SYS_I2C
62#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020063#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
64#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Otavio Salvador0378d632015-07-23 11:02:28 -030065#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
66#define CONFIG_SYS_I2C_SPEED 100000
67
68/* PMIC */
69#define CONFIG_POWER
70#define CONFIG_POWER_I2C
71#define CONFIG_POWER_PFUZE100
72#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
73
Otavio Salvadorc8762d02015-07-23 11:02:29 -030074/* USB Configs */
75#define CONFIG_CMD_USB
76#define CONFIG_CMD_FAT
77#define CONFIG_USB_EHCI
78#define CONFIG_USB_EHCI_MX6
79#define CONFIG_USB_STORAGE
80#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
81#define CONFIG_USB_HOST_ETHER
82#define CONFIG_USB_ETHER_ASIX
83#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
84#define CONFIG_MXC_USB_FLAGS 0
85#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
86#define CONFIG_USB_KEYBOARD
87#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
88
Otavio Salvadoredd28992015-09-17 15:13:20 -030089#define CONFIG_CI_UDC
90#define CONFIG_USBD_HS
91#define CONFIG_USB_GADGET_DUALSPEED
92
93#define CONFIG_USB_GADGET
94#define CONFIG_CMD_USB_MASS_STORAGE
95#define CONFIG_USB_FUNCTION_MASS_STORAGE
96#define CONFIG_USB_GADGET_DOWNLOAD
97#define CONFIG_USB_GADGET_VBUS_DRAW 2
98
99#define CONFIG_G_DNL_VENDOR_NUM 0x0525
100#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
101#define CONFIG_G_DNL_MANUFACTURER "Congatec"
102
Otavio Salvadorf62abc42015-11-19 19:02:35 -0200103#define CONFIG_USB_FUNCTION_FASTBOOT
104#define CONFIG_CMD_FASTBOOT
105#define CONFIG_ANDROID_BOOT_IMAGE
106#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
107#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
108
Otavio Salvador6c46cd12015-07-23 11:02:30 -0300109/* Framebuffer */
110#define CONFIG_VIDEO
111#define CONFIG_VIDEO_IPUV3
112#define CONFIG_CFB_CONSOLE
113#define CONFIG_VGA_AS_SINGLE_DEVICE
114#define CONFIG_SYS_CONSOLE_IS_IN_ENV
115#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
116#define CONFIG_VIDEO_BMP_RLE8
117#define CONFIG_SPLASH_SCREEN
118#define CONFIG_SPLASH_SCREEN_ALIGN
119#define CONFIG_BMP_16BPP
120#define CONFIG_VIDEO_LOGO
121#define CONFIG_VIDEO_BMP_LOGO
122#ifdef CONFIG_MX6DL
123#define CONFIG_IPUV3_CLK 198000000
124#else
125#define CONFIG_IPUV3_CLK 264000000
126#endif
127#define CONFIG_IMX_HDMI
128
Otavio Salvadordf82d002015-07-23 11:02:31 -0300129/* SATA */
130#define CONFIG_CMD_SATA
131#define CONFIG_DWC_AHSATA
132#define CONFIG_SYS_SATA_MAX_DEVICE 1
133#define CONFIG_DWC_AHSATA_PORT_ID 0
134#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
135#define CONFIG_LBA48
136#define CONFIG_LIBATA
137
Otavio Salvadore6b47822015-07-28 20:24:41 -0300138/* Ethernet */
139#define CONFIG_CMD_PING
140#define CONFIG_CMD_DHCP
141#define CONFIG_CMD_MII
142#define CONFIG_FEC_MXC
143#define CONFIG_MII
144#define IMX_FEC_BASE ENET_BASE_ADDR
145#define CONFIG_FEC_XCV_TYPE RGMII
146#define CONFIG_ETHPRIME "FEC"
147#define CONFIG_FEC_MXC_PHYADDR 6
148#define CONFIG_PHYLIB
149#define CONFIG_PHY_ATHEROS
150
Otavio Salvador4ac01402015-07-23 11:02:33 -0300151/* Command definition */
152
153#define CONFIG_MXC_UART_BASE UART2_BASE
154#define CONFIG_CONSOLE_DEV "ttymxc1"
155#define CONFIG_MMCROOT "/dev/mmcblk0p2"
156#define CONFIG_SYS_MMC_ENV_DEV 0
SARTRE Leodce71762013-06-03 23:30:36 +0000157
Otavio Salvadore186b182015-11-19 19:02:36 -0200158#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
SARTRE Leodce71762013-06-03 23:30:36 +0000159#define CONFIG_EXTRA_ENV_SETTINGS \
160 "script=boot.scr\0" \
Otavio Salvador43465d92014-01-16 19:57:56 -0200161 "image=zImage\0" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200162 "fdtfile=undefined\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300163 "fdt_addr_r=0x18000000\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000164 "boot_fdt=try\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300165 "ip_dyn=yes\0" \
166 "console=" CONFIG_CONSOLE_DEV "\0" \
167 "bootm_size=0x10000000\0" \
168 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000169 "mmcpart=1\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300170 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
171 "update_sd_firmware=" \
172 "if test ${ip_dyn} = yes; then " \
173 "setenv get_cmd dhcp; " \
174 "else " \
175 "setenv get_cmd tftp; " \
176 "fi; " \
177 "if mmc dev ${mmcdev}; then " \
178 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
179 "setexpr fw_sz ${filesize} / 0x200; " \
180 "setexpr fw_sz ${fw_sz} + 1; " \
181 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
182 "fi; " \
183 "fi\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000184 "mmcargs=setenv bootargs console=${console},${baudrate} " \
185 "root=${mmcroot}\0" \
186 "loadbootscript=" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300187 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000188 "bootscript=echo Running bootscript from mmc ...; " \
189 "source\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300190 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
191 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000192 "mmcboot=echo Booting from mmc ...; " \
193 "run mmcargs; " \
194 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
195 "if run loadfdt; then " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300196 "bootz ${loadaddr} - ${fdt_addr_r}; " \
SARTRE Leodce71762013-06-03 23:30:36 +0000197 "else " \
198 "if test ${boot_fdt} = try; then " \
Otavio Salvador43465d92014-01-16 19:57:56 -0200199 "bootz; " \
SARTRE Leodce71762013-06-03 23:30:36 +0000200 "else " \
201 "echo WARN: Cannot load the DT; " \
202 "fi; " \
203 "fi; " \
204 "else " \
Otavio Salvador43465d92014-01-16 19:57:56 -0200205 "bootz; " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300206 "fi;\0" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200207 "findfdt="\
208 "if test $board_rev = MX6Q ; then " \
209 "setenv fdtfile imx6q-qmx6.dtb; fi; " \
210 "if test $board_rev = MX6DL ; then " \
211 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \
212 "if test $fdtfile = undefined; then " \
213 "echo WARNING: Could not determine dtb to use; fi; \0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300214 "netargs=setenv bootargs console=${console},${baudrate} " \
215 "root=/dev/nfs " \
216 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
217 "netboot=echo Booting from net ...; " \
218 "run netargs; " \
219 "if test ${ip_dyn} = yes; then " \
220 "setenv get_cmd dhcp; " \
221 "else " \
222 "setenv get_cmd tftp; " \
223 "fi; " \
224 "${get_cmd} ${image}; " \
225 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
226 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
227 "bootz ${loadaddr} - ${fdt_addr_r}; " \
228 "else " \
229 "if test ${boot_fdt} = try; then " \
230 "bootz; " \
231 "else " \
232 "echo WARN: Cannot load the DT; " \
233 "fi; " \
234 "fi; " \
235 "else " \
236 "bootz; " \
237 "fi;\0" \
Otavio Salvadorf594b552015-11-19 19:02:33 -0200238 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
SARTRE Leodce71762013-06-03 23:30:36 +0000239
240#define CONFIG_BOOTCOMMAND \
Otavio Salvadorf594b552015-11-19 19:02:33 -0200241 "run spilock;" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200242 "run findfdt; " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300243 "mmc dev ${mmcdev};" \
244 "if mmc rescan; then " \
245 "if run loadbootscript; then " \
246 "run bootscript; " \
247 "else " \
248 "if run loadimage; then " \
249 "run mmcboot; " \
250 "else run netboot; " \
251 "fi; " \
252 "fi; " \
253 "else run netboot; fi"
SARTRE Leodce71762013-06-03 23:30:36 +0000254
SARTRE Leodce71762013-06-03 23:30:36 +0000255#define CONFIG_SYS_MEMTEST_START 0x10000000
256#define CONFIG_SYS_MEMTEST_END 0x10010000
257#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
258
SARTRE Leodce71762013-06-03 23:30:36 +0000259/* Physical Memory Map */
260#define CONFIG_NR_DRAM_BANKS 1
261#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
262#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
263
264#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
265#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
266#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
267
268#define CONFIG_SYS_INIT_SP_OFFSET \
269 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
270#define CONFIG_SYS_INIT_SP_ADDR \
271 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
272
Peter Robinson4b671502015-05-22 17:30:45 +0100273/* Environment organization */
Otavio Salvadorca4d60b2015-11-19 19:02:34 -0200274#if defined (CONFIG_ENV_IS_IN_MMC)
SARTRE Leodce71762013-06-03 23:30:36 +0000275#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
276#define CONFIG_SYS_MMC_ENV_DEV 0
Otavio Salvadorca4d60b2015-11-19 19:02:34 -0200277#endif
278
279#define CONFIG_ENV_SIZE (8 * 1024)
280
281#define CONFIG_ENV_IS_IN_SPI_FLASH
282#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
283#define CONFIG_ENV_OFFSET (768 * 1024)
284#define CONFIG_ENV_SECT_SIZE (64 * 1024)
285#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
286#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
287#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
288#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
289#endif
SARTRE Leodce71762013-06-03 23:30:36 +0000290
SARTRE Leodce71762013-06-03 23:30:36 +0000291#endif /* __CONFIG_CGTQMX6EVAL_H */