blob: f70a46967e2b450b0a072c4e8df10300a6417b47 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
4 */
5
6/dts-v1/;
7
8#include "meson-g12a.dtsi"
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/gpio/meson-g12a-gpio.h>
11#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
12#include <dt-bindings/sound/meson-g12a-toacodec.h>
13
14/ {
15 compatible = "amlogic,u200", "amlogic,g12a";
16 model = "Amlogic Meson G12A U200 Development Board";
17
18 aliases {
19 serial0 = &uart_AO;
20 ethernet0 = &ethmac;
21 };
22
23 dioo2133: audio-amplifier-0 {
24 compatible = "simple-audio-amplifier";
25 enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
26 VCC-supply = <&vcc_5v>;
Tom Rini53633a82024-02-29 12:33:36 -050027 sound-name-prefix = "10U2";
28 };
29
30 spdif_dir: audio-codec-0 {
31 compatible = "linux,spdif-dir";
32 #sound-dai-cells = <0>;
33 sound-name-prefix = "DIR";
34 };
35
36 spdif_dit: audio-codec-1 {
37 compatible = "linux,spdif-dit";
38 #sound-dai-cells = <0>;
39 sound-name-prefix = "DIT";
40 };
41
42 chosen {
43 stdout-path = "serial0:115200n8";
44 };
45
46 cvbs-connector {
47 compatible = "composite-video-connector";
48
49 port {
50 cvbs_connector_in: endpoint {
51 remote-endpoint = <&cvbs_vdac_out>;
52 };
53 };
54 };
55
56 emmc_pwrseq: emmc-pwrseq {
57 compatible = "mmc-pwrseq-emmc";
58 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
59 };
60
61 hdmi-connector {
62 compatible = "hdmi-connector";
63 type = "a";
64
65 port {
66 hdmi_connector_in: endpoint {
67 remote-endpoint = <&hdmi_tx_tmds_out>;
68 };
69 };
70 };
71
72 memory@0 {
73 device_type = "memory";
74 reg = <0x0 0x0 0x0 0x40000000>;
75 };
76
Tom Rini6bb92fc2024-05-20 09:54:58 -060077 flash_1v8: regulator-flash-1v8 {
Tom Rini53633a82024-02-29 12:33:36 -050078 compatible = "regulator-fixed";
79 regulator-name = "FLASH_1V8";
80 regulator-min-microvolt = <1800000>;
81 regulator-max-microvolt = <1800000>;
82 vin-supply = <&vcc_3v3>;
83 regulator-always-on;
84 };
85
Tom Rini6bb92fc2024-05-20 09:54:58 -060086 main_12v: regulator-main-12v {
Tom Rini53633a82024-02-29 12:33:36 -050087 compatible = "regulator-fixed";
88 regulator-name = "12V";
89 regulator-min-microvolt = <12000000>;
90 regulator-max-microvolt = <12000000>;
91 regulator-always-on;
92 };
93
Tom Rini6bb92fc2024-05-20 09:54:58 -060094 usb_pwr_en: regulator-usb-pwr-en {
Tom Rini53633a82024-02-29 12:33:36 -050095 compatible = "regulator-fixed";
96 regulator-name = "USB_PWR_EN";
97 regulator-min-microvolt = <5000000>;
98 regulator-max-microvolt = <5000000>;
99 vin-supply = <&vcc_5v>;
100
101 gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
102 enable-active-high;
103 };
104
Tom Rini6bb92fc2024-05-20 09:54:58 -0600105 vcc_1v8: regulator-vcc-1v8 {
Tom Rini53633a82024-02-29 12:33:36 -0500106 compatible = "regulator-fixed";
107 regulator-name = "VCC_1V8";
108 regulator-min-microvolt = <1800000>;
109 regulator-max-microvolt = <1800000>;
110 vin-supply = <&vcc_3v3>;
111 regulator-always-on;
112 };
113
Tom Rini6bb92fc2024-05-20 09:54:58 -0600114 vcc_3v3: regulator-vcc-3v3 {
Tom Rini53633a82024-02-29 12:33:36 -0500115 compatible = "regulator-fixed";
116 regulator-name = "VCC_3V3";
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
119 vin-supply = <&vddao_3v3>;
120 regulator-always-on;
121 /* FIXME: actually controlled by VDDCPU_B_EN */
122 };
123
Tom Rini6bb92fc2024-05-20 09:54:58 -0600124 vcc_5v: regulator-vcc-5v {
Tom Rini53633a82024-02-29 12:33:36 -0500125 compatible = "regulator-fixed";
126 regulator-name = "VCC_5V";
127 regulator-min-microvolt = <5000000>;
128 regulator-max-microvolt = <5000000>;
129 vin-supply = <&main_12v>;
130
131 gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
132 enable-active-high;
133 };
134
Tom Rini6bb92fc2024-05-20 09:54:58 -0600135 vddao_1v8: regulator-vddao-1v8 {
Tom Rini53633a82024-02-29 12:33:36 -0500136 compatible = "regulator-fixed";
137 regulator-name = "VDDAO_1V8";
138 regulator-min-microvolt = <1800000>;
139 regulator-max-microvolt = <1800000>;
140 vin-supply = <&vddao_3v3>;
141 regulator-always-on;
142 };
143
Tom Rini6bb92fc2024-05-20 09:54:58 -0600144 vddao_3v3: regulator-vddao-3v3 {
Tom Rini53633a82024-02-29 12:33:36 -0500145 compatible = "regulator-fixed";
146 regulator-name = "VDDAO_3V3";
147 regulator-min-microvolt = <3300000>;
148 regulator-max-microvolt = <3300000>;
149 vin-supply = <&main_12v>;
150 regulator-always-on;
151 };
152
153 vddcpu: regulator-vddcpu {
154 /*
155 * MP8756GD Regulator.
156 */
157 compatible = "pwm-regulator";
158
159 regulator-name = "VDDCPU";
160 regulator-min-microvolt = <721000>;
161 regulator-max-microvolt = <1022000>;
162
163 pwm-supply = <&main_12v>;
164
165 pwms = <&pwm_AO_cd 1 1250 0>;
166 pwm-dutycycle-range = <100 0>;
167
168 regulator-boot-on;
169 regulator-always-on;
170 };
171
172 sound {
173 compatible = "amlogic,axg-sound-card";
174 model = "U200";
175 audio-widgets = "Line", "Lineout";
176 audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmout_c>,
177 <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
178 <&tdmin_lb>, <&dioo2133>;
179 audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
180 "TDMOUT_A IN 1", "FRDDR_B OUT 0",
181 "TDMOUT_A IN 2", "FRDDR_C OUT 0",
182 "TDM_A Playback", "TDMOUT_A OUT",
183 "TDMOUT_B IN 0", "FRDDR_A OUT 1",
184 "TDMOUT_B IN 1", "FRDDR_B OUT 1",
185 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
186 "TDM_B Playback", "TDMOUT_B OUT",
187 "TDMOUT_C IN 0", "FRDDR_A OUT 2",
188 "TDMOUT_C IN 1", "FRDDR_B OUT 2",
189 "TDMOUT_C IN 2", "FRDDR_C OUT 2",
190 "TDM_C Playback", "TDMOUT_C OUT",
191 "SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
192 "SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
193 "SPDIFOUT_A IN 2", "FRDDR_C OUT 3",
194 "SPDIFOUT_B IN 0", "FRDDR_A OUT 4",
195 "SPDIFOUT_B IN 1", "FRDDR_B OUT 4",
196 "SPDIFOUT_B IN 2", "FRDDR_C OUT 4",
197 "TDMIN_A IN 0", "TDM_A Capture",
198 "TDMIN_A IN 1", "TDM_B Capture",
199 "TDMIN_A IN 2", "TDM_C Capture",
200 "TDMIN_A IN 3", "TDM_A Loopback",
201 "TDMIN_A IN 4", "TDM_B Loopback",
202 "TDMIN_A IN 5", "TDM_C Loopback",
203 "TDMIN_B IN 0", "TDM_A Capture",
204 "TDMIN_B IN 1", "TDM_B Capture",
205 "TDMIN_B IN 2", "TDM_C Capture",
206 "TDMIN_B IN 3", "TDM_A Loopback",
207 "TDMIN_B IN 4", "TDM_B Loopback",
208 "TDMIN_B IN 5", "TDM_C Loopback",
209 "TDMIN_C IN 0", "TDM_A Capture",
210 "TDMIN_C IN 1", "TDM_B Capture",
211 "TDMIN_C IN 2", "TDM_C Capture",
212 "TDMIN_C IN 3", "TDM_A Loopback",
213 "TDMIN_C IN 4", "TDM_B Loopback",
214 "TDMIN_C IN 5", "TDM_C Loopback",
215 "TDMIN_LB IN 3", "TDM_A Capture",
216 "TDMIN_LB IN 4", "TDM_B Capture",
217 "TDMIN_LB IN 5", "TDM_C Capture",
218 "TDMIN_LB IN 0", "TDM_A Loopback",
219 "TDMIN_LB IN 1", "TDM_B Loopback",
220 "TDMIN_LB IN 2", "TDM_C Loopback",
221 "TODDR_A IN 0", "TDMIN_A OUT",
222 "TODDR_B IN 0", "TDMIN_A OUT",
223 "TODDR_C IN 0", "TDMIN_A OUT",
224 "TODDR_A IN 1", "TDMIN_B OUT",
225 "TODDR_B IN 1", "TDMIN_B OUT",
226 "TODDR_C IN 1", "TDMIN_B OUT",
227 "TODDR_A IN 2", "TDMIN_C OUT",
228 "TODDR_B IN 2", "TDMIN_C OUT",
229 "TODDR_C IN 2", "TDMIN_C OUT",
230 "TODDR_A IN 3", "SPDIFIN Capture",
231 "TODDR_B IN 3", "SPDIFIN Capture",
232 "TODDR_C IN 3", "SPDIFIN Capture",
233 "TODDR_A IN 6", "TDMIN_LB OUT",
234 "TODDR_B IN 6", "TDMIN_LB OUT",
235 "TODDR_C IN 6", "TDMIN_LB OUT",
236 "10U2 INL", "ACODEC LOLP",
237 "10U2 INR", "ACODEC LORP",
238 "Lineout", "10U2 OUTL",
239 "Lineout", "10U2 OUTR";
240
Tom Rini9c8af152024-12-24 12:03:04 -0600241 clocks = <&clkc CLKID_MPLL2>,
242 <&clkc CLKID_MPLL0>,
243 <&clkc CLKID_MPLL1>;
244
Tom Rini53633a82024-02-29 12:33:36 -0500245 assigned-clocks = <&clkc CLKID_MPLL2>,
246 <&clkc CLKID_MPLL0>,
247 <&clkc CLKID_MPLL1>;
248 assigned-clock-parents = <0>, <0>, <0>;
249 assigned-clock-rates = <294912000>,
250 <270950400>,
251 <393216000>;
252
253 dai-link-0 {
254 sound-dai = <&frddr_a>;
255 };
256
257 dai-link-1 {
258 sound-dai = <&frddr_b>;
259 };
260
261 dai-link-2 {
262 sound-dai = <&frddr_c>;
263 };
264
265 dai-link-3 {
266 sound-dai = <&toddr_a>;
267 };
268
269 dai-link-4 {
270 sound-dai = <&toddr_b>;
271 };
272
273 dai-link-5 {
274 sound-dai = <&toddr_c>;
275 };
276
277 /* Connected to the WIFI/BT chip */
278 dai-link-6 {
279 sound-dai = <&tdmif_a>;
280 dai-format = "dsp_a";
281 dai-tdm-slot-tx-mask-0 = <1 1>;
282 mclk-fs = <256>;
283
284 codec-0 {
285 sound-dai = <&toacodec TOACODEC_IN_A>;
286 };
287
288 codec-1 {
289 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
290 };
291 };
292
293 /* Connected to the onboard AD82584F DAC */
294 dai-link-7 {
295 sound-dai = <&tdmif_b>;
296 dai-format = "i2s";
297 dai-tdm-slot-tx-mask-0 = <1 1>;
298 mclk-fs = <256>;
299
300 codec-0 {
301 sound-dai = <&toacodec TOACODEC_IN_B>;
302 };
303
304 codec-1 {
305 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
306 };
307 };
308
309 /* 8ch HDMI interface */
310 dai-link-8 {
311 sound-dai = <&tdmif_c>;
312 dai-format = "i2s";
313 dai-tdm-slot-tx-mask-0 = <1 1>;
314 dai-tdm-slot-tx-mask-1 = <1 1>;
315 dai-tdm-slot-tx-mask-2 = <1 1>;
316 dai-tdm-slot-tx-mask-3 = <1 1>;
317 mclk-fs = <256>;
318
319 codec-0 {
320 sound-dai = <&toacodec TOACODEC_IN_C>;
321 };
322
323 codec-1 {
324 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
325 };
326 };
327
328 /* spdif hdmi and coax output */
329 dai-link-9 {
330 sound-dai = <&spdifout_a>;
331
332 codec-0 {
333 sound-dai = <&spdif_dit>;
334 };
335
336 codec-1 {
337 sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
338 };
339 };
340
341 /* spdif hdmi interface */
342 dai-link-10 {
343 sound-dai = <&spdifout_b>;
344
345 codec {
346 sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
347 };
348 };
349
350 /* hdmi glue */
351 dai-link-11 {
352 sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
353
354 codec {
355 sound-dai = <&hdmi_tx>;
356 };
357 };
358
359 /* internal codec glue */
360 dai-link-12 {
361 sound-dai = <&toacodec TOACODEC_OUT>;
362
363 codec {
364 sound-dai = <&acodec>;
365 };
366 };
367
368 /* spdif coax input */
369 dai-link-13 {
370 sound-dai = <&spdifin>;
371
372 codec {
373 sound-dai = <&spdif_dir>;
374 };
375 };
376 };
377};
378
379&acodec {
Tom Rini6b642ac2024-10-01 12:20:28 -0600380 AVDD-supply = <&vddao_1v8>;
Tom Rini53633a82024-02-29 12:33:36 -0500381 status = "okay";
382};
383
384&arb {
385 status = "okay";
386};
387
388&cec_AO {
389 pinctrl-0 = <&cec_ao_a_h_pins>;
390 pinctrl-names = "default";
391 status = "disabled";
392 hdmi-phandle = <&hdmi_tx>;
393};
394
395&cecb_AO {
396 pinctrl-0 = <&cec_ao_b_h_pins>;
397 pinctrl-names = "default";
398 status = "okay";
399 hdmi-phandle = <&hdmi_tx>;
400};
401
402&clkc_audio {
403 status = "okay";
404};
405
406&cpu0 {
407 cpu-supply = <&vddcpu>;
408 operating-points-v2 = <&cpu_opp_table>;
409 clocks = <&clkc CLKID_CPU_CLK>;
410 clock-latency = <50000>;
411};
412
413&cpu1 {
414 cpu-supply = <&vddcpu>;
415 operating-points-v2 = <&cpu_opp_table>;
416 clocks = <&clkc CLKID_CPU_CLK>;
417 clock-latency = <50000>;
418};
419
420&cpu2 {
421 cpu-supply = <&vddcpu>;
422 operating-points-v2 = <&cpu_opp_table>;
423 clocks = <&clkc CLKID_CPU_CLK>;
424 clock-latency = <50000>;
425};
426
427&cpu3 {
428 cpu-supply = <&vddcpu>;
429 operating-points-v2 = <&cpu_opp_table>;
430 clocks = <&clkc CLKID_CPU_CLK>;
431 clock-latency = <50000>;
432};
433
434&clkc_audio {
435 status = "okay";
436};
437
438&cvbs_vdac_port {
439 cvbs_vdac_out: endpoint {
440 remote-endpoint = <&cvbs_connector_in>;
441 };
442};
443
444&ethmac {
445 status = "okay";
446 phy-handle = <&internal_ephy>;
447 phy-mode = "rmii";
448};
449
450&frddr_a {
451 status = "okay";
452};
453
454&frddr_b {
455 status = "okay";
456};
457
458&frddr_c {
459 status = "okay";
460};
461
462&hdmi_tx {
463 status = "okay";
464 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
465 pinctrl-names = "default";
466 hdmi-supply = <&vcc_5v>;
467};
468
469&hdmi_tx_tmds_port {
470 hdmi_tx_tmds_out: endpoint {
471 remote-endpoint = <&hdmi_connector_in>;
472 };
473};
474
475&ir {
476 status = "okay";
477 pinctrl-0 = <&remote_input_ao_pins>;
478 pinctrl-names = "default";
479};
480
481/* i2c Touch */
482&i2c0 {
483 status = "okay";
484 pinctrl-0 = <&i2c0_sda_z0_pins>, <&i2c0_sck_z1_pins>;
485 pinctrl-names = "default";
486};
487
488/* i2c CM */
489&i2c2 {
490 status = "okay";
491 pinctrl-0 = <&i2c2_sda_z_pins>, <&i2c2_sck_z_pins>;
492 pinctrl-names = "default";
493};
494
495/* i2c Audio */
496&i2c3 {
497 status = "okay";
498 pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
499 pinctrl-names = "default";
500};
501
502&pwm_AO_cd {
503 pinctrl-0 = <&pwm_ao_d_e_pins>;
504 pinctrl-names = "default";
505 clocks = <&xtal>;
506 clock-names = "clkin1";
507 status = "okay";
508};
509
510/* SD card */
511&sd_emmc_b {
512 status = "okay";
513 pinctrl-0 = <&sdcard_c_pins>;
514 pinctrl-1 = <&sdcard_clk_gate_c_pins>;
515 pinctrl-names = "default", "clk-gate";
516
517 bus-width = <4>;
518 cap-sd-highspeed;
519 max-frequency = <50000000>;
520 disable-wp;
521
522 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
523 vmmc-supply = <&vddao_3v3>;
524 vqmmc-supply = <&vddao_3v3>;
525};
526
527/* eMMC */
528&sd_emmc_c {
529 status = "okay";
530 pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
531 pinctrl-1 = <&emmc_clk_gate_pins>;
532 pinctrl-names = "default", "clk-gate";
533
534 bus-width = <8>;
535 cap-mmc-highspeed;
536 mmc-ddr-1_8v;
537 mmc-hs200-1_8v;
538 max-frequency = <200000000>;
539 non-removable;
540 disable-wp;
541
542 mmc-pwrseq = <&emmc_pwrseq>;
543 vmmc-supply = <&vcc_3v3>;
544 vqmmc-supply = <&flash_1v8>;
545};
546
547&spdifin {
548 pinctrl-0 = <&spdif_in_h_pins>;
549 pinctrl-names = "default";
550 status = "okay";
551};
552
553&spdifout_a {
554 pinctrl-0 = <&spdif_ao_out_pins>;
555 pinctrl-names = "default";
556 status = "okay";
557};
558
559&spdifout_b {
560 status = "okay";
561};
562
563&tdmif_a {
564 pinctrl-0 = <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>, <&tdm_a_dout0_pins> ;
565 pinctrl-names = "default";
566 status = "okay";
567};
568
569&tdmif_b {
570 pinctrl-0 = <&mclk0_a_pins>, <&tdm_b_fs_pins>, <&tdm_b_sclk_pins>,
571 <&tdm_b_dout0_pins>;
572 pinctrl-names = "default";
573 status = "okay";
574
575 assigned-clocks = <&clkc_audio AUD_CLKID_TDM_MCLK_PAD0>,
576 <&clkc_audio AUD_CLKID_TDM_SCLK_PAD1>,
577 <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD1>;
578 assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
579 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
580 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
581 assigned-clock-rates = <0>, <0>, <0>;
582};
583
584&tdmif_c {
585 status = "okay";
586};
587
588&tdmin_a {
589 status = "okay";
590};
591
592&tdmin_b {
593 status = "okay";
594};
595
596&tdmin_c {
597 status = "okay";
598};
599
600&tdmin_lb {
601 status = "okay";
602};
603
604&tdmout_a {
605 status = "okay";
606};
607
608&tdmout_b {
609 status = "okay";
610};
611
612&tdmout_c {
613 status = "okay";
614};
615
616&toacodec {
617 status = "okay";
618};
619
620&toddr_a {
621 status = "okay";
622};
623
624&toddr_b {
625 status = "okay";
626};
627
628&toddr_c {
629 status = "okay";
630};
631
632&tohdmitx {
633 status = "okay";
634};
635
636&uart_AO {
637 status = "okay";
638 pinctrl-0 = <&uart_ao_a_pins>;
639 pinctrl-names = "default";
640};
641
642&usb {
643 status = "okay";
644 vbus-supply = <&usb_pwr_en>;
645};
646
647&usb2_phy0 {
648 phy-supply = <&vcc_5v>;
649};
650
651&usb2_phy1 {
652 phy-supply = <&vcc_5v>;
653};