Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2018 Amlogic, Inc. All rights reserved. |
| 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include "meson-g12a.dtsi" |
| 9 | #include <dt-bindings/gpio/gpio.h> |
| 10 | #include <dt-bindings/gpio/meson-g12a-gpio.h> |
| 11 | #include <dt-bindings/sound/meson-g12a-tohdmitx.h> |
| 12 | #include <dt-bindings/sound/meson-g12a-toacodec.h> |
| 13 | |
| 14 | / { |
| 15 | compatible = "amlogic,u200", "amlogic,g12a"; |
| 16 | model = "Amlogic Meson G12A U200 Development Board"; |
| 17 | |
| 18 | aliases { |
| 19 | serial0 = &uart_AO; |
| 20 | ethernet0 = ðmac; |
| 21 | }; |
| 22 | |
| 23 | dioo2133: audio-amplifier-0 { |
| 24 | compatible = "simple-audio-amplifier"; |
| 25 | enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; |
| 26 | VCC-supply = <&vcc_5v>; |
| 27 | #sound-dai-cells = <0>; |
| 28 | sound-name-prefix = "10U2"; |
| 29 | }; |
| 30 | |
| 31 | spdif_dir: audio-codec-0 { |
| 32 | compatible = "linux,spdif-dir"; |
| 33 | #sound-dai-cells = <0>; |
| 34 | sound-name-prefix = "DIR"; |
| 35 | }; |
| 36 | |
| 37 | spdif_dit: audio-codec-1 { |
| 38 | compatible = "linux,spdif-dit"; |
| 39 | #sound-dai-cells = <0>; |
| 40 | sound-name-prefix = "DIT"; |
| 41 | }; |
| 42 | |
| 43 | chosen { |
| 44 | stdout-path = "serial0:115200n8"; |
| 45 | }; |
| 46 | |
| 47 | cvbs-connector { |
| 48 | compatible = "composite-video-connector"; |
| 49 | |
| 50 | port { |
| 51 | cvbs_connector_in: endpoint { |
| 52 | remote-endpoint = <&cvbs_vdac_out>; |
| 53 | }; |
| 54 | }; |
| 55 | }; |
| 56 | |
| 57 | emmc_pwrseq: emmc-pwrseq { |
| 58 | compatible = "mmc-pwrseq-emmc"; |
| 59 | reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; |
| 60 | }; |
| 61 | |
| 62 | hdmi-connector { |
| 63 | compatible = "hdmi-connector"; |
| 64 | type = "a"; |
| 65 | |
| 66 | port { |
| 67 | hdmi_connector_in: endpoint { |
| 68 | remote-endpoint = <&hdmi_tx_tmds_out>; |
| 69 | }; |
| 70 | }; |
| 71 | }; |
| 72 | |
| 73 | memory@0 { |
| 74 | device_type = "memory"; |
| 75 | reg = <0x0 0x0 0x0 0x40000000>; |
| 76 | }; |
| 77 | |
| 78 | flash_1v8: regulator-flash_1v8 { |
| 79 | compatible = "regulator-fixed"; |
| 80 | regulator-name = "FLASH_1V8"; |
| 81 | regulator-min-microvolt = <1800000>; |
| 82 | regulator-max-microvolt = <1800000>; |
| 83 | vin-supply = <&vcc_3v3>; |
| 84 | regulator-always-on; |
| 85 | }; |
| 86 | |
| 87 | main_12v: regulator-main_12v { |
| 88 | compatible = "regulator-fixed"; |
| 89 | regulator-name = "12V"; |
| 90 | regulator-min-microvolt = <12000000>; |
| 91 | regulator-max-microvolt = <12000000>; |
| 92 | regulator-always-on; |
| 93 | }; |
| 94 | |
| 95 | usb_pwr_en: regulator-usb_pwr_en { |
| 96 | compatible = "regulator-fixed"; |
| 97 | regulator-name = "USB_PWR_EN"; |
| 98 | regulator-min-microvolt = <5000000>; |
| 99 | regulator-max-microvolt = <5000000>; |
| 100 | vin-supply = <&vcc_5v>; |
| 101 | |
| 102 | gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; |
| 103 | enable-active-high; |
| 104 | }; |
| 105 | |
| 106 | vcc_1v8: regulator-vcc_1v8 { |
| 107 | compatible = "regulator-fixed"; |
| 108 | regulator-name = "VCC_1V8"; |
| 109 | regulator-min-microvolt = <1800000>; |
| 110 | regulator-max-microvolt = <1800000>; |
| 111 | vin-supply = <&vcc_3v3>; |
| 112 | regulator-always-on; |
| 113 | }; |
| 114 | |
| 115 | vcc_3v3: regulator-vcc_3v3 { |
| 116 | compatible = "regulator-fixed"; |
| 117 | regulator-name = "VCC_3V3"; |
| 118 | regulator-min-microvolt = <3300000>; |
| 119 | regulator-max-microvolt = <3300000>; |
| 120 | vin-supply = <&vddao_3v3>; |
| 121 | regulator-always-on; |
| 122 | /* FIXME: actually controlled by VDDCPU_B_EN */ |
| 123 | }; |
| 124 | |
| 125 | vcc_5v: regulator-vcc_5v { |
| 126 | compatible = "regulator-fixed"; |
| 127 | regulator-name = "VCC_5V"; |
| 128 | regulator-min-microvolt = <5000000>; |
| 129 | regulator-max-microvolt = <5000000>; |
| 130 | vin-supply = <&main_12v>; |
| 131 | |
| 132 | gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; |
| 133 | enable-active-high; |
| 134 | }; |
| 135 | |
| 136 | vddao_1v8: regulator-vddao_1v8 { |
| 137 | compatible = "regulator-fixed"; |
| 138 | regulator-name = "VDDAO_1V8"; |
| 139 | regulator-min-microvolt = <1800000>; |
| 140 | regulator-max-microvolt = <1800000>; |
| 141 | vin-supply = <&vddao_3v3>; |
| 142 | regulator-always-on; |
| 143 | }; |
| 144 | |
| 145 | vddao_3v3: regulator-vddao_3v3 { |
| 146 | compatible = "regulator-fixed"; |
| 147 | regulator-name = "VDDAO_3V3"; |
| 148 | regulator-min-microvolt = <3300000>; |
| 149 | regulator-max-microvolt = <3300000>; |
| 150 | vin-supply = <&main_12v>; |
| 151 | regulator-always-on; |
| 152 | }; |
| 153 | |
| 154 | vddcpu: regulator-vddcpu { |
| 155 | /* |
| 156 | * MP8756GD Regulator. |
| 157 | */ |
| 158 | compatible = "pwm-regulator"; |
| 159 | |
| 160 | regulator-name = "VDDCPU"; |
| 161 | regulator-min-microvolt = <721000>; |
| 162 | regulator-max-microvolt = <1022000>; |
| 163 | |
| 164 | pwm-supply = <&main_12v>; |
| 165 | |
| 166 | pwms = <&pwm_AO_cd 1 1250 0>; |
| 167 | pwm-dutycycle-range = <100 0>; |
| 168 | |
| 169 | regulator-boot-on; |
| 170 | regulator-always-on; |
| 171 | }; |
| 172 | |
| 173 | sound { |
| 174 | compatible = "amlogic,axg-sound-card"; |
| 175 | model = "U200"; |
| 176 | audio-widgets = "Line", "Lineout"; |
| 177 | audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmout_c>, |
| 178 | <&tdmin_a>, <&tdmin_b>, <&tdmin_c>, |
| 179 | <&tdmin_lb>, <&dioo2133>; |
| 180 | audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", |
| 181 | "TDMOUT_A IN 1", "FRDDR_B OUT 0", |
| 182 | "TDMOUT_A IN 2", "FRDDR_C OUT 0", |
| 183 | "TDM_A Playback", "TDMOUT_A OUT", |
| 184 | "TDMOUT_B IN 0", "FRDDR_A OUT 1", |
| 185 | "TDMOUT_B IN 1", "FRDDR_B OUT 1", |
| 186 | "TDMOUT_B IN 2", "FRDDR_C OUT 1", |
| 187 | "TDM_B Playback", "TDMOUT_B OUT", |
| 188 | "TDMOUT_C IN 0", "FRDDR_A OUT 2", |
| 189 | "TDMOUT_C IN 1", "FRDDR_B OUT 2", |
| 190 | "TDMOUT_C IN 2", "FRDDR_C OUT 2", |
| 191 | "TDM_C Playback", "TDMOUT_C OUT", |
| 192 | "SPDIFOUT_A IN 0", "FRDDR_A OUT 3", |
| 193 | "SPDIFOUT_A IN 1", "FRDDR_B OUT 3", |
| 194 | "SPDIFOUT_A IN 2", "FRDDR_C OUT 3", |
| 195 | "SPDIFOUT_B IN 0", "FRDDR_A OUT 4", |
| 196 | "SPDIFOUT_B IN 1", "FRDDR_B OUT 4", |
| 197 | "SPDIFOUT_B IN 2", "FRDDR_C OUT 4", |
| 198 | "TDMIN_A IN 0", "TDM_A Capture", |
| 199 | "TDMIN_A IN 1", "TDM_B Capture", |
| 200 | "TDMIN_A IN 2", "TDM_C Capture", |
| 201 | "TDMIN_A IN 3", "TDM_A Loopback", |
| 202 | "TDMIN_A IN 4", "TDM_B Loopback", |
| 203 | "TDMIN_A IN 5", "TDM_C Loopback", |
| 204 | "TDMIN_B IN 0", "TDM_A Capture", |
| 205 | "TDMIN_B IN 1", "TDM_B Capture", |
| 206 | "TDMIN_B IN 2", "TDM_C Capture", |
| 207 | "TDMIN_B IN 3", "TDM_A Loopback", |
| 208 | "TDMIN_B IN 4", "TDM_B Loopback", |
| 209 | "TDMIN_B IN 5", "TDM_C Loopback", |
| 210 | "TDMIN_C IN 0", "TDM_A Capture", |
| 211 | "TDMIN_C IN 1", "TDM_B Capture", |
| 212 | "TDMIN_C IN 2", "TDM_C Capture", |
| 213 | "TDMIN_C IN 3", "TDM_A Loopback", |
| 214 | "TDMIN_C IN 4", "TDM_B Loopback", |
| 215 | "TDMIN_C IN 5", "TDM_C Loopback", |
| 216 | "TDMIN_LB IN 3", "TDM_A Capture", |
| 217 | "TDMIN_LB IN 4", "TDM_B Capture", |
| 218 | "TDMIN_LB IN 5", "TDM_C Capture", |
| 219 | "TDMIN_LB IN 0", "TDM_A Loopback", |
| 220 | "TDMIN_LB IN 1", "TDM_B Loopback", |
| 221 | "TDMIN_LB IN 2", "TDM_C Loopback", |
| 222 | "TODDR_A IN 0", "TDMIN_A OUT", |
| 223 | "TODDR_B IN 0", "TDMIN_A OUT", |
| 224 | "TODDR_C IN 0", "TDMIN_A OUT", |
| 225 | "TODDR_A IN 1", "TDMIN_B OUT", |
| 226 | "TODDR_B IN 1", "TDMIN_B OUT", |
| 227 | "TODDR_C IN 1", "TDMIN_B OUT", |
| 228 | "TODDR_A IN 2", "TDMIN_C OUT", |
| 229 | "TODDR_B IN 2", "TDMIN_C OUT", |
| 230 | "TODDR_C IN 2", "TDMIN_C OUT", |
| 231 | "TODDR_A IN 3", "SPDIFIN Capture", |
| 232 | "TODDR_B IN 3", "SPDIFIN Capture", |
| 233 | "TODDR_C IN 3", "SPDIFIN Capture", |
| 234 | "TODDR_A IN 6", "TDMIN_LB OUT", |
| 235 | "TODDR_B IN 6", "TDMIN_LB OUT", |
| 236 | "TODDR_C IN 6", "TDMIN_LB OUT", |
| 237 | "10U2 INL", "ACODEC LOLP", |
| 238 | "10U2 INR", "ACODEC LORP", |
| 239 | "Lineout", "10U2 OUTL", |
| 240 | "Lineout", "10U2 OUTR"; |
| 241 | |
| 242 | assigned-clocks = <&clkc CLKID_MPLL2>, |
| 243 | <&clkc CLKID_MPLL0>, |
| 244 | <&clkc CLKID_MPLL1>; |
| 245 | assigned-clock-parents = <0>, <0>, <0>; |
| 246 | assigned-clock-rates = <294912000>, |
| 247 | <270950400>, |
| 248 | <393216000>; |
| 249 | |
| 250 | dai-link-0 { |
| 251 | sound-dai = <&frddr_a>; |
| 252 | }; |
| 253 | |
| 254 | dai-link-1 { |
| 255 | sound-dai = <&frddr_b>; |
| 256 | }; |
| 257 | |
| 258 | dai-link-2 { |
| 259 | sound-dai = <&frddr_c>; |
| 260 | }; |
| 261 | |
| 262 | dai-link-3 { |
| 263 | sound-dai = <&toddr_a>; |
| 264 | }; |
| 265 | |
| 266 | dai-link-4 { |
| 267 | sound-dai = <&toddr_b>; |
| 268 | }; |
| 269 | |
| 270 | dai-link-5 { |
| 271 | sound-dai = <&toddr_c>; |
| 272 | }; |
| 273 | |
| 274 | /* Connected to the WIFI/BT chip */ |
| 275 | dai-link-6 { |
| 276 | sound-dai = <&tdmif_a>; |
| 277 | dai-format = "dsp_a"; |
| 278 | dai-tdm-slot-tx-mask-0 = <1 1>; |
| 279 | mclk-fs = <256>; |
| 280 | |
| 281 | codec-0 { |
| 282 | sound-dai = <&toacodec TOACODEC_IN_A>; |
| 283 | }; |
| 284 | |
| 285 | codec-1 { |
| 286 | sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>; |
| 287 | }; |
| 288 | }; |
| 289 | |
| 290 | /* Connected to the onboard AD82584F DAC */ |
| 291 | dai-link-7 { |
| 292 | sound-dai = <&tdmif_b>; |
| 293 | dai-format = "i2s"; |
| 294 | dai-tdm-slot-tx-mask-0 = <1 1>; |
| 295 | mclk-fs = <256>; |
| 296 | |
| 297 | codec-0 { |
| 298 | sound-dai = <&toacodec TOACODEC_IN_B>; |
| 299 | }; |
| 300 | |
| 301 | codec-1 { |
| 302 | sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; |
| 303 | }; |
| 304 | }; |
| 305 | |
| 306 | /* 8ch HDMI interface */ |
| 307 | dai-link-8 { |
| 308 | sound-dai = <&tdmif_c>; |
| 309 | dai-format = "i2s"; |
| 310 | dai-tdm-slot-tx-mask-0 = <1 1>; |
| 311 | dai-tdm-slot-tx-mask-1 = <1 1>; |
| 312 | dai-tdm-slot-tx-mask-2 = <1 1>; |
| 313 | dai-tdm-slot-tx-mask-3 = <1 1>; |
| 314 | mclk-fs = <256>; |
| 315 | |
| 316 | codec-0 { |
| 317 | sound-dai = <&toacodec TOACODEC_IN_C>; |
| 318 | }; |
| 319 | |
| 320 | codec-1 { |
| 321 | sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>; |
| 322 | }; |
| 323 | }; |
| 324 | |
| 325 | /* spdif hdmi and coax output */ |
| 326 | dai-link-9 { |
| 327 | sound-dai = <&spdifout_a>; |
| 328 | |
| 329 | codec-0 { |
| 330 | sound-dai = <&spdif_dit>; |
| 331 | }; |
| 332 | |
| 333 | codec-1 { |
| 334 | sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>; |
| 335 | }; |
| 336 | }; |
| 337 | |
| 338 | /* spdif hdmi interface */ |
| 339 | dai-link-10 { |
| 340 | sound-dai = <&spdifout_b>; |
| 341 | |
| 342 | codec { |
| 343 | sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>; |
| 344 | }; |
| 345 | }; |
| 346 | |
| 347 | /* hdmi glue */ |
| 348 | dai-link-11 { |
| 349 | sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; |
| 350 | |
| 351 | codec { |
| 352 | sound-dai = <&hdmi_tx>; |
| 353 | }; |
| 354 | }; |
| 355 | |
| 356 | /* internal codec glue */ |
| 357 | dai-link-12 { |
| 358 | sound-dai = <&toacodec TOACODEC_OUT>; |
| 359 | |
| 360 | codec { |
| 361 | sound-dai = <&acodec>; |
| 362 | }; |
| 363 | }; |
| 364 | |
| 365 | /* spdif coax input */ |
| 366 | dai-link-13 { |
| 367 | sound-dai = <&spdifin>; |
| 368 | |
| 369 | codec { |
| 370 | sound-dai = <&spdif_dir>; |
| 371 | }; |
| 372 | }; |
| 373 | }; |
| 374 | }; |
| 375 | |
| 376 | &acodec { |
| 377 | status = "okay"; |
| 378 | }; |
| 379 | |
| 380 | &arb { |
| 381 | status = "okay"; |
| 382 | }; |
| 383 | |
| 384 | &cec_AO { |
| 385 | pinctrl-0 = <&cec_ao_a_h_pins>; |
| 386 | pinctrl-names = "default"; |
| 387 | status = "disabled"; |
| 388 | hdmi-phandle = <&hdmi_tx>; |
| 389 | }; |
| 390 | |
| 391 | &cecb_AO { |
| 392 | pinctrl-0 = <&cec_ao_b_h_pins>; |
| 393 | pinctrl-names = "default"; |
| 394 | status = "okay"; |
| 395 | hdmi-phandle = <&hdmi_tx>; |
| 396 | }; |
| 397 | |
| 398 | &clkc_audio { |
| 399 | status = "okay"; |
| 400 | }; |
| 401 | |
| 402 | &cpu0 { |
| 403 | cpu-supply = <&vddcpu>; |
| 404 | operating-points-v2 = <&cpu_opp_table>; |
| 405 | clocks = <&clkc CLKID_CPU_CLK>; |
| 406 | clock-latency = <50000>; |
| 407 | }; |
| 408 | |
| 409 | &cpu1 { |
| 410 | cpu-supply = <&vddcpu>; |
| 411 | operating-points-v2 = <&cpu_opp_table>; |
| 412 | clocks = <&clkc CLKID_CPU_CLK>; |
| 413 | clock-latency = <50000>; |
| 414 | }; |
| 415 | |
| 416 | &cpu2 { |
| 417 | cpu-supply = <&vddcpu>; |
| 418 | operating-points-v2 = <&cpu_opp_table>; |
| 419 | clocks = <&clkc CLKID_CPU_CLK>; |
| 420 | clock-latency = <50000>; |
| 421 | }; |
| 422 | |
| 423 | &cpu3 { |
| 424 | cpu-supply = <&vddcpu>; |
| 425 | operating-points-v2 = <&cpu_opp_table>; |
| 426 | clocks = <&clkc CLKID_CPU_CLK>; |
| 427 | clock-latency = <50000>; |
| 428 | }; |
| 429 | |
| 430 | &clkc_audio { |
| 431 | status = "okay"; |
| 432 | }; |
| 433 | |
| 434 | &cvbs_vdac_port { |
| 435 | cvbs_vdac_out: endpoint { |
| 436 | remote-endpoint = <&cvbs_connector_in>; |
| 437 | }; |
| 438 | }; |
| 439 | |
| 440 | ðmac { |
| 441 | status = "okay"; |
| 442 | phy-handle = <&internal_ephy>; |
| 443 | phy-mode = "rmii"; |
| 444 | }; |
| 445 | |
| 446 | &frddr_a { |
| 447 | status = "okay"; |
| 448 | }; |
| 449 | |
| 450 | &frddr_b { |
| 451 | status = "okay"; |
| 452 | }; |
| 453 | |
| 454 | &frddr_c { |
| 455 | status = "okay"; |
| 456 | }; |
| 457 | |
| 458 | &hdmi_tx { |
| 459 | status = "okay"; |
| 460 | pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; |
| 461 | pinctrl-names = "default"; |
| 462 | hdmi-supply = <&vcc_5v>; |
| 463 | }; |
| 464 | |
| 465 | &hdmi_tx_tmds_port { |
| 466 | hdmi_tx_tmds_out: endpoint { |
| 467 | remote-endpoint = <&hdmi_connector_in>; |
| 468 | }; |
| 469 | }; |
| 470 | |
| 471 | &ir { |
| 472 | status = "okay"; |
| 473 | pinctrl-0 = <&remote_input_ao_pins>; |
| 474 | pinctrl-names = "default"; |
| 475 | }; |
| 476 | |
| 477 | /* i2c Touch */ |
| 478 | &i2c0 { |
| 479 | status = "okay"; |
| 480 | pinctrl-0 = <&i2c0_sda_z0_pins>, <&i2c0_sck_z1_pins>; |
| 481 | pinctrl-names = "default"; |
| 482 | }; |
| 483 | |
| 484 | /* i2c CM */ |
| 485 | &i2c2 { |
| 486 | status = "okay"; |
| 487 | pinctrl-0 = <&i2c2_sda_z_pins>, <&i2c2_sck_z_pins>; |
| 488 | pinctrl-names = "default"; |
| 489 | }; |
| 490 | |
| 491 | /* i2c Audio */ |
| 492 | &i2c3 { |
| 493 | status = "okay"; |
| 494 | pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; |
| 495 | pinctrl-names = "default"; |
| 496 | }; |
| 497 | |
| 498 | &pwm_AO_cd { |
| 499 | pinctrl-0 = <&pwm_ao_d_e_pins>; |
| 500 | pinctrl-names = "default"; |
| 501 | clocks = <&xtal>; |
| 502 | clock-names = "clkin1"; |
| 503 | status = "okay"; |
| 504 | }; |
| 505 | |
| 506 | /* SD card */ |
| 507 | &sd_emmc_b { |
| 508 | status = "okay"; |
| 509 | pinctrl-0 = <&sdcard_c_pins>; |
| 510 | pinctrl-1 = <&sdcard_clk_gate_c_pins>; |
| 511 | pinctrl-names = "default", "clk-gate"; |
| 512 | |
| 513 | bus-width = <4>; |
| 514 | cap-sd-highspeed; |
| 515 | max-frequency = <50000000>; |
| 516 | disable-wp; |
| 517 | |
| 518 | cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; |
| 519 | vmmc-supply = <&vddao_3v3>; |
| 520 | vqmmc-supply = <&vddao_3v3>; |
| 521 | }; |
| 522 | |
| 523 | /* eMMC */ |
| 524 | &sd_emmc_c { |
| 525 | status = "okay"; |
| 526 | pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; |
| 527 | pinctrl-1 = <&emmc_clk_gate_pins>; |
| 528 | pinctrl-names = "default", "clk-gate"; |
| 529 | |
| 530 | bus-width = <8>; |
| 531 | cap-mmc-highspeed; |
| 532 | mmc-ddr-1_8v; |
| 533 | mmc-hs200-1_8v; |
| 534 | max-frequency = <200000000>; |
| 535 | non-removable; |
| 536 | disable-wp; |
| 537 | |
| 538 | mmc-pwrseq = <&emmc_pwrseq>; |
| 539 | vmmc-supply = <&vcc_3v3>; |
| 540 | vqmmc-supply = <&flash_1v8>; |
| 541 | }; |
| 542 | |
| 543 | &spdifin { |
| 544 | pinctrl-0 = <&spdif_in_h_pins>; |
| 545 | pinctrl-names = "default"; |
| 546 | status = "okay"; |
| 547 | }; |
| 548 | |
| 549 | &spdifout_a { |
| 550 | pinctrl-0 = <&spdif_ao_out_pins>; |
| 551 | pinctrl-names = "default"; |
| 552 | status = "okay"; |
| 553 | }; |
| 554 | |
| 555 | &spdifout_b { |
| 556 | status = "okay"; |
| 557 | }; |
| 558 | |
| 559 | &tdmif_a { |
| 560 | pinctrl-0 = <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>, <&tdm_a_dout0_pins> ; |
| 561 | pinctrl-names = "default"; |
| 562 | status = "okay"; |
| 563 | }; |
| 564 | |
| 565 | &tdmif_b { |
| 566 | pinctrl-0 = <&mclk0_a_pins>, <&tdm_b_fs_pins>, <&tdm_b_sclk_pins>, |
| 567 | <&tdm_b_dout0_pins>; |
| 568 | pinctrl-names = "default"; |
| 569 | status = "okay"; |
| 570 | |
| 571 | assigned-clocks = <&clkc_audio AUD_CLKID_TDM_MCLK_PAD0>, |
| 572 | <&clkc_audio AUD_CLKID_TDM_SCLK_PAD1>, |
| 573 | <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD1>; |
| 574 | assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_B_MCLK>, |
| 575 | <&clkc_audio AUD_CLKID_MST_B_SCLK>, |
| 576 | <&clkc_audio AUD_CLKID_MST_B_LRCLK>; |
| 577 | assigned-clock-rates = <0>, <0>, <0>; |
| 578 | }; |
| 579 | |
| 580 | &tdmif_c { |
| 581 | status = "okay"; |
| 582 | }; |
| 583 | |
| 584 | &tdmin_a { |
| 585 | status = "okay"; |
| 586 | }; |
| 587 | |
| 588 | &tdmin_b { |
| 589 | status = "okay"; |
| 590 | }; |
| 591 | |
| 592 | &tdmin_c { |
| 593 | status = "okay"; |
| 594 | }; |
| 595 | |
| 596 | &tdmin_lb { |
| 597 | status = "okay"; |
| 598 | }; |
| 599 | |
| 600 | &tdmout_a { |
| 601 | status = "okay"; |
| 602 | }; |
| 603 | |
| 604 | &tdmout_b { |
| 605 | status = "okay"; |
| 606 | }; |
| 607 | |
| 608 | &tdmout_c { |
| 609 | status = "okay"; |
| 610 | }; |
| 611 | |
| 612 | &toacodec { |
| 613 | status = "okay"; |
| 614 | }; |
| 615 | |
| 616 | &toddr_a { |
| 617 | status = "okay"; |
| 618 | }; |
| 619 | |
| 620 | &toddr_b { |
| 621 | status = "okay"; |
| 622 | }; |
| 623 | |
| 624 | &toddr_c { |
| 625 | status = "okay"; |
| 626 | }; |
| 627 | |
| 628 | &tohdmitx { |
| 629 | status = "okay"; |
| 630 | }; |
| 631 | |
| 632 | &uart_AO { |
| 633 | status = "okay"; |
| 634 | pinctrl-0 = <&uart_ao_a_pins>; |
| 635 | pinctrl-names = "default"; |
| 636 | }; |
| 637 | |
| 638 | &usb { |
| 639 | status = "okay"; |
| 640 | vbus-supply = <&usb_pwr_en>; |
| 641 | }; |
| 642 | |
| 643 | &usb2_phy0 { |
| 644 | phy-supply = <&vcc_5v>; |
| 645 | }; |
| 646 | |
| 647 | &usb2_phy1 { |
| 648 | phy-supply = <&vcc_5v>; |
| 649 | }; |