| Patrick Delaunay | d6e53c7 | 2018-10-26 09:02:52 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | # |
| Stephen Warren | 185ad87 | 2016-06-17 09:43:58 -0600 | [diff] [blame] | 3 | # Copyright (c) 2016, NVIDIA CORPORATION. |
| 4 | # |
| Stephen Warren | 185ad87 | 2016-06-17 09:43:58 -0600 | [diff] [blame] | 5 | |
| 6 | obj-$(CONFIG_DM_RESET) += reset-uclass.o |
| Stephen Warren | 6488e64 | 2016-06-17 09:43:59 -0600 | [diff] [blame] | 7 | obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o |
| 8 | obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o |
| Patrice Chotard | 1235aa0 | 2017-03-22 10:54:03 +0100 | [diff] [blame] | 9 | obj-$(CONFIG_STI_RESET) += sti-reset.o |
| Patrice Chotard | 5c121e1 | 2017-09-13 18:00:07 +0200 | [diff] [blame] | 10 | obj-$(CONFIG_STM32_RESET) += stm32-reset.o |
| Stephen Warren | 3017ab5 | 2016-09-13 10:45:58 -0600 | [diff] [blame] | 11 | obj-$(CONFIG_TEGRA_CAR_RESET) += tegra-car-reset.o |
| Stephen Warren | fccc9c5 | 2016-08-08 11:28:25 -0600 | [diff] [blame] | 12 | obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o |
| Andreas Dannenberg | 4cfdf4d | 2018-08-27 15:57:41 +0530 | [diff] [blame] | 13 | obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o |
| Eugeniy Paltsev | 062da42 | 2019-10-08 19:29:30 +0300 | [diff] [blame] | 14 | obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o |
| Álvaro Fernández Rojas | 5161bd3 | 2017-05-03 15:10:21 +0200 | [diff] [blame] | 15 | obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o |
| Masahiro Yamada | 2aa4b5b | 2016-10-08 13:25:31 +0900 | [diff] [blame] | 16 | obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o |
| Chia-Wei, Wang | b39ef89 | 2020-10-15 10:25:14 +0800 | [diff] [blame] | 17 | obj-$(CONFIG_RESET_AST2500) += reset-ast2500.o |
| Chia-Wei, Wang | 7114051 | 2020-12-14 13:54:26 +0800 | [diff] [blame] | 18 | obj-$(CONFIG_RESET_AST2600) += reset-ast2600.o |
| Eugen Hristev | 2f55082 | 2023-05-15 13:55:04 +0300 | [diff] [blame] | 19 | obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o rst-rk3588.o |
| Neil Armstrong | 4f03d6b | 2018-03-29 14:55:25 +0200 | [diff] [blame] | 20 | obj-$(CONFIG_RESET_MESON) += reset-meson.o |
| Dinh Nguyen | 5427f5a | 2018-04-04 17:18:20 -0500 | [diff] [blame] | 21 | obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o |
| developer | d48dd9a | 2018-12-20 16:12:51 +0800 | [diff] [blame] | 22 | obj-$(CONFIG_RESET_MEDIATEK) += reset-mediatek.o |
| developer | 074393a | 2019-09-25 17:45:29 +0800 | [diff] [blame] | 23 | obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o |
| Jim Liu | eb08c4b | 2024-01-03 15:29:33 +0800 | [diff] [blame] | 24 | obj-$(CONFIG_RESET_NPCM) += reset-npcm.o |
| Jagan Teki | 7f6c2a8 | 2019-01-18 22:18:13 +0530 | [diff] [blame] | 25 | obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o |
| Shawn Guo | 8aa8f30 | 2019-03-20 15:32:39 +0800 | [diff] [blame] | 26 | obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o |
| Patrick Wildt | dbc644f | 2019-10-03 16:08:35 +0200 | [diff] [blame] | 27 | obj-$(CONFIG_RESET_IMX7) += reset-imx7.o |
| Sagar Shrikant Kadam | 2732b2d | 2020-07-29 02:36:14 -0700 | [diff] [blame] | 28 | obj-$(CONFIG_RESET_SIFIVE) += reset-sifive.o |
| Sean Anderson | 0c1f6bf | 2020-06-24 06:41:14 -0400 | [diff] [blame] | 29 | obj-$(CONFIG_RESET_SYSCON) += reset-syscon.o |
| Nicolas Saenz Julienne | 057bbbd | 2020-06-29 18:37:23 +0200 | [diff] [blame] | 30 | obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o |
| Etienne Carriere | c6e9af3 | 2020-09-09 18:44:06 +0200 | [diff] [blame] | 31 | obj-$(CONFIG_RESET_SCMI) += reset-scmi.o |
| Michal Simek | f0e4769 | 2021-07-30 08:00:10 +0200 | [diff] [blame] | 32 | obj-$(CONFIG_RESET_ZYNQMP) += reset-zynqmp.o |
| Keerthy | 0c0bdbb | 2022-01-27 13:16:51 +0100 | [diff] [blame] | 33 | obj-$(CONFIG_RESET_DRA7) += reset-dra7.o |
| Sergiu Moga | bdcfc7d | 2023-01-04 16:03:18 +0200 | [diff] [blame] | 34 | obj-$(CONFIG_RESET_AT91) += reset-at91.o |
| Simon Glass | 4cafa21 | 2024-09-29 19:49:54 -0600 | [diff] [blame] | 35 | obj-$(CONFIG_$(PHASE_)RESET_JH7110) += reset-jh7110.o |